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    • 2. 发明授权
    • Air conditioning display system for vehicles
    • 汽车空调显示系统
    • US4174749A
    • 1979-11-20
    • US881783
    • 1978-02-27
    • Hideo Oishi
    • Hideo Oishi
    • B60H1/00H02B15/02F28F27/00
    • B60H1/00985H02B15/02Y10S165/007
    • An air conditioning display system for a vehicle comprising a vehicle's air conditioner proper including a plurality of air intake ducts, a plurality of air discharge ducts, a plurality of dampers, and a fan unit, an air conditioner actuator actuating the dampers and the fan unit thereby introducing and discharging air into and out of the air conditioner proper, and a display device including a display panel carrying the picture of the vehicle body portions around the front seat for displaying the flowing patterns of air out of the air conditioner proper. Illuminating means is disposed behind the display panel and is selectively energized so that the occupant can readily visually confirm the flow air from the duct outlets.
    • 一种用于车辆的空调显示系统,包括:车辆空调机,其包括多个进气管道,多个排气管道,多个阻尼器和风扇单元;致动所述风门和风扇单元的空调致动器 从而引入和排出空气调节器本身的显示装置,以及显示装置,该显示装置包括显示面板,该显示面板承载着前座椅周围的车体部分的图像,用于将空气流出的图案从空调器本体中显示出来。 照明装置设置在显示面板的后面并且被选择性地通电,使得乘客可以容易地目视地确认来自导管出口的流动空气。
    • 4. 发明申请
    • Semiconductor wafer test system
    • 半导体晶圆测试系统
    • US20070077667A1
    • 2007-04-05
    • US11607909
    • 2006-12-04
    • Hideo Oishi
    • Hideo Oishi
    • H01L21/66G01R31/26
    • G01R31/2879G01R31/2831G01R31/30G01R31/303
    • A semiconductor wafer test system for carrying out a burn-in test on a semiconductor wafer including multiple semiconductor devices thereon. A metal interconnect is connected to the gate electrode of each of those devices. A power supply applies an ac voltage of predetermined amplitude to a conductive plate, which creates an ac electric field to be placed on the devices. The ac field should have an intensity at least equal to a minimum value required for the burn-in test and less than a critical value, below which no breakdown occurs in the gate oxide film of each device. By changing the amount of time for which the devices are exposed to the ac field, the burn-in period can be changed freely. In addition, forward and reverse fields are both placed on the gate oxide film of each device. Thus, failures can be screened out very effectively.
    • 一种用于在其上包括多个半导体器件的半导体晶片上进行老化测试的半导体晶片测试系统。 金属互连连接到这些器件中的每一个的栅电极。 电源对导电板施加预定幅度的交流电压,从而产生要置于器件上的交流电场。 交流场应该具有至少等于老化测试所需的最小值的强度,并且小于临界值,低于每个器件的栅极氧化膜中不发生击穿。 通过改变设备暴露于交流电场的时间量,可以自由地改变老化周期。 此外,正向和反向场均放置在每个器件的栅极氧化膜上。 因此,可以非常有效地筛选故障。
    • 5. 发明授权
    • Electro-magnetic relay
    • 电磁继电器
    • US4914411A
    • 1990-04-03
    • US295704
    • 1989-01-09
    • Hiroshi HikitaKatsumi ShibataHideo OishiHiroshi Yoshikawa
    • Hiroshi HikitaKatsumi ShibataHideo OishiHiroshi Yoshikawa
    • H01H50/04
    • H01H50/042
    • The electro-magnet relay of the present invention utilizes an iron core and an armature both formed as flat plates stacked together. Further, a stationary leaf spring and a moveable leaf spring are provided in the middle section of the iron core having two legs and being shaped as an inverted U. The armature is supported in a hole located in the insulating substrate and may swing to a degree determined by a striking piece formed on the armature. Coil terminals and contact terminals protruding from the bottom of the insulating substrate are arranged in a single line in the electro-magnetic relay of the present invention and may be installed on a high density printed circuit board.
    • 本发明的电磁继电器利用铁芯和电枢,两者均形成为平板堆叠在一起。 此外,在具有两个腿的铁芯的中间部分中设置有固定的板簧和可动的板簧,并且成形为倒U形。电枢被支撑在位于绝缘衬底中的孔中,并且可以摆动到一定程度 由形成在电枢上的撞击件确定。 从绝缘基板的底部突出的线圈端子和接触端子以本发明的电磁继电器为单线布置,并且可以安装在高密度印刷电路板上。
    • 6. 发明授权
    • Semiconductor wafer test system
    • 半导体晶圆测试系统
    • US07355266B2
    • 2008-04-08
    • US11607909
    • 2006-12-04
    • Hideo Oishi
    • Hideo Oishi
    • H01L29/06
    • G01R31/2879G01R31/2831G01R31/30G01R31/303
    • A semiconductor wafer test system for carrying out a burn-in test on a semiconductor wafer including multiple semiconductor devices thereon. A metal interconnect is connected to the gate electrode of each of those devices. A power supply applies an ac voltage of predetermined amplitude to a conductive plate, which creates an ac electric field to be placed on the devices. The ac field should have an intensity at least equal to a minimum value required for the burn-in test and less than a critical value, below which no breakdown occurs in the gate oxide film of each device. By changing the amount of time for which the devices are exposed to the ac field, the burn-in period can be changed freely. In addition, forward and reverse fields are both placed on the gate oxide film of each device. Thus, failures can be screened out very effectively.
    • 一种用于在其上包括多个半导体器件的半导体晶片上进行老化测试的半导体晶片测试系统。 金属互连连接到这些器件中的每一个的栅电极。 电源对导电板施加预定幅度的交流电压,从而产生要置于设备上的交流电场。 交流场应该具有至少等于老化测试所需的最小值的强度,并且小于临界值,低于每个器件的栅极氧化膜中不发生击穿。 通过改变设备暴露于交流电场的时间量,可以自由地改变老化周期。 此外,正向和反向场均放置在每个器件的栅极氧化膜上。 因此,可以非常有效地筛选故障。
    • 7. 发明授权
    • Semiconductor wafer test system
    • 半导体晶圆测试系统
    • US07151003B2
    • 2006-12-19
    • US10602878
    • 2003-06-25
    • Hideo Oishi
    • Hideo Oishi
    • H01L21/66
    • G01R31/2879G01R31/2831G01R31/30G01R31/303
    • A semiconductor wafer test system for carrying out a burn-in test on a semiconductor wafer including multiple semiconductor devices thereon. A metal interconnect is connected to the gate electrode of each of those devices. A power supply applies an ac voltage of predetermined amplitude to a conductive plate, which creates an ac electric field to be placed on the devices. The ac field should have an intensity at least equal to a minimum value required for the burn-in test and less than a critical value, below which no break-down occurs in the gate oxide film of each device. By changing the amount of time for which the devices are exposed to the ac field, the burn-in period can be changed freely. In addition, forward and reverse fields are both placed on the gate oxide film of each device. Thus, failures can be screened out very effectively.
    • 一种用于在其上包括多个半导体器件的半导体晶片上进行老化测试的半导体晶片测试系统。 金属互连件连接到这些器件中的每一个的栅电极。 电源对导电板施加预定幅度的交流电压,从而产生要置于设备上的交流电场。 交流场应该具有至少等于老化测试所需的最小值的强度,并且小于临界值,低于此值时,在每个器件的栅极氧化膜中不会发生分解。 通过改变设备暴露于交流电场的时间量,可以自由地改变老化周期。 此外,正向和反向场均放置在每个器件的栅极氧化膜上。 因此,可以非常有效地筛选故障。
    • 9. 发明申请
    • Semiconductor wafer test system
    • 半导体晶圆测试系统
    • US20050099854A1
    • 2005-05-12
    • US10602878
    • 2003-06-25
    • Hideo Oishi
    • Hideo Oishi
    • G01R31/26G01R31/28G01R31/30H01L21/66G11C29/00
    • G01R31/2879G01R31/2831G01R31/30G01R31/303
    • A semiconductor wafer test system for carrying out a burn-in test on a semiconductor wafer including multiple semiconductor devices thereon. A metal interconnect is connected to the gate electrode of each of those devices. A power supply applies an ac voltage of predetermined amplitude to a conductive plate, which creates an ac electric field to be placed on the devices. The ac field should have an intensity at least equal to a minimum value required for the burn-in test and less than a critical value, below which no break-down occurs in the gate oxide film of each device. By changing the amount of time for which the devices are exposed to the ac field, the burn-in period can be changed freely. In addition, forward and reverse fields are both placed on the gate oxide film of each device. Thus, failures can be screened out very effectively.
    • 一种用于在其上包括多个半导体器件的半导体晶片上进行老化测试的半导体晶片测试系统。 金属互连连接到这些器件中的每一个的栅电极。 电源对导电板施加预定幅度的交流电压,从而产生要置于器件上的交流电场。 交流场应该具有至少等于老化测试所需的最小值的强度,并且小于临界值,低于此值时,在每个器件的栅极氧化膜中不会发生分解。 通过改变设备暴露于交流电场的时间量,可以自由地改变老化周期。 此外,正向和反向场均放置在每个器件的栅极氧化膜上。 因此,可以非常有效地筛选故障。