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1. 发明授权

US07355126B2 Electronic parts packaging method and electronic parts package 失效
标题翻译：电子零件包装方法和电子零件包装
公开(公告)号：US07355126B2
公开(公告)日：2008-04-08
申请号：US10311476
申请日：2001-06-14
申请人： Hidenobu Nishikawa , Kazuto Nishida , Kazumichi Shimizu , Shuji Ono , Hiroyuki Otani
发明人： Hidenobu Nishikawa , Kazuto Nishida , Kazumichi Shimizu , Shuji Ono , Hiroyuki Otani
IPC分类号： H05K1/16
CPC分类号： H01L24/32 , H01L21/563 , H01L23/3142 , H01L24/06 , H01L24/14 , H01L24/29 , H01L24/81 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05554 , H01L2224/06136 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/16227 , H01L2224/26145 , H01L2224/26175 , H01L2224/27013 , H01L2224/32225 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/81136 , H01L2224/81191 , H01L2224/81801 , H01L2224/83051 , H01L2224/83192 , H01L2924/00013 , H01L2924/01004 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H01L2924/00014 , H01L2224/13099 , H01L2924/00 , H01L2924/00012
摘要： An electronic component and a circuit formation article are bonded together with a bonding material containing resin interposed therebetween. In a state that bumps of an electronic-component bonding region and electrodes of the circuit formation article are in mutual electrical contact, the electronic component and the circuit formation article are thermocompression-bonded to each other upon curing of the bonding material. A bonding-material flow regulating member of the electronic-component bonding region regulates flow of the bonding material toward a peripheral portion of the electronic-component bonding region during bonding of the circuit formation article to the electronic component.
摘要翻译：电子部件和电路形成用物品通过含有树脂的接合材料接合在一起。在电子部件接合区域和电路形成用品的电极的凸点相互电接触的状态下，电子部件和电路形成用品在接合材料固化时彼此热压接合。电子部件接合区域的接合材料流动调节部件在电路形成物品与电子部件接合期间调节接合材料向电子部件接合区域的周边部分的流动。

2. 发明授权

US07060528B2 Method for mounting a semiconductor element to an interposer by compression bonding 失效
标题翻译：通过压接法将半导体元件安装到插入件的方法
公开(公告)号：US07060528B2
公开(公告)日：2006-06-13
申请号：US10253604
申请日：2002-09-25
申请人： Hidenobu Nishikawa , Kazuto Nishida , Kazumichi Shimizu , Hiroyuki Otani
发明人： Hidenobu Nishikawa , Kazuto Nishida , Kazumichi Shimizu , Hiroyuki Otani
IPC分类号： H01L21/48
CPC分类号： H01L24/742 , H01L21/563 , H01L23/544 , H01L24/11 , H01L24/27 , H01L24/29 , H01L24/31 , H01L24/83 , H01L24/90 , H01L24/94 , H01L25/50 , H01L2223/54406 , H01L2223/54413 , H01L2223/54426 , H01L2223/5448 , H01L2224/05571 , H01L2224/05573 , H01L2224/1134 , H01L2224/13099 , H01L2224/13144 , H01L2224/16145 , H01L2224/16225 , H01L2224/274 , H01L2224/2919 , H01L2224/45144 , H01L2224/73104 , H01L2224/73204 , H01L2224/83101 , H01L2224/8319 , H01L2224/83855 , H01L2224/83856 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/00 , H01L2924/3512 , H01L2224/05599
摘要： A semiconductor element mounting method is provided with high productivity. The method includes forming bumps on electrodes of a wafer in which a plurality of semiconductor elements have been formed, temporarily compression-bonding the wafer and an interposer via an insulative resin, curing the resin by performing heating and pressurization so that the wafer and the interposer are finally compression-bonded, wherein the electrodes of the wafer and electrodes of the interposer are bonded to each other, respectively, and wherein insulative resin overflowing from between the wafer and the interposer flows into grooves disposed so as to be coincident with dicing lines of the wafer, thus providing a uniform flow of the insulative resin, and thereafter, cutting and separating this bonded unit into individual semiconductor elements.
摘要翻译：提供了高生产率的半导体元件安装方法。该方法包括在其上形成有多个半导体元件的晶片的电极上形成凸块，通过绝缘树脂临时压接晶片和插入件，通过进行加热和加压来固化树脂，使得晶片和插入件最后压接，其中晶片的电极和插入器的电极分别相互粘合，并且其中从晶片和插入件之间溢出的绝缘树脂流入设置为与切割线重合的槽晶片，从而提供均匀的绝缘树脂流动，然后将该结合单元切割并分离成单独的半导体元件。

3. 发明授权

US07683482B2 Electronic component unit 失效
标题翻译：电子元件单元
公开(公告)号：US07683482B2
公开(公告)日：2010-03-23
申请号：US11527461
申请日：2006-09-27
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L23/48 , H01L21/44 , H05K3/32
CPC分类号： H01L24/27 , H01L21/563 , H01L23/295 , H01L24/29 , H01L24/31 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13023 , H01L2224/13099 , H01L2224/13118 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29399 , H01L2224/29499 , H01L2224/32225 , H01L2224/45 , H01L2224/45118 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48 , H01L2224/48624 , H01L2224/48824 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81191 , H01L2224/81801 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/83856 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不小于20gf的压力将芯片压在板上，同时连接芯片和板的翘曲，凸起被压缩，绝缘树脂硬化。

4. 发明申请

US20070013067A1 Electronic component mounting method and apparatus 失效
标题翻译：电子元件安装方法和装置
公开(公告)号：US20070013067A1
公开(公告)日：2007-01-18
申请号：US11527461
申请日：2006-09-27
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L24/27 , H01L21/563 , H01L23/295 , H01L24/29 , H01L24/31 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05568 , H01L2224/05571 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13023 , H01L2224/13099 , H01L2224/13118 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/293 , H01L2224/29399 , H01L2224/29499 , H01L2224/32225 , H01L2224/45 , H01L2224/45118 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48 , H01L2224/48624 , H01L2224/48824 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81191 , H01L2224/81801 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83851 , H01L2224/83856 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不小于20gf的压力将芯片压在板上，同时连接芯片和板的翘曲，凸起被压缩，绝缘树脂硬化。

5. 发明授权

US06926796B1 Electronic parts mounting method and device therefor 失效
标题翻译：电子零件安装方法及其装置
公开(公告)号：US06926796B1
公开(公告)日：2005-08-09
申请号：US09890066
申请日：2000-01-26
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L21/60 , H05K3/32
CPC分类号： H01L24/31 , H01L21/563 , H01L23/295 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13124 , H01L2224/13144 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/2949 , H01L2224/29499 , H01L2224/32225 , H01L2224/45144 , H01L2224/48624 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81048 , H01L2224/81191 , H01L2224/81801 , H01L2224/81903 , H01L2224/83048 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83194 , H01L2224/83851 , H01L2224/83856 , H01L2224/9211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , Y10T29/4913 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is corrected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不超过20gf的压力将芯片压靠在板上，同时校正芯片和板的翘曲，凸块被压缩，绝缘树脂硬化。

6. 发明申请

US20050224974A1 Electronic component mounting method and apparatus 审中-公开
公开(公告)号：US20050224974A1
公开(公告)日：2005-10-13
申请号：US11150383
申请日：2005-06-13
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L21/60 , H05K3/32 , H01L23/52 , H01L21/44
CPC分类号： H01L24/31 , H01L21/563 , H01L23/295 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13124 , H01L2224/13144 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/2949 , H01L2224/29499 , H01L2224/32225 , H01L2224/45144 , H01L2224/48624 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81048 , H01L2224/81191 , H01L2224/81801 , H01L2224/81903 , H01L2224/83048 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83194 , H01L2224/83851 , H01L2224/83856 , H01L2224/9211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , Y10T29/4913 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.

7. 发明授权

US08007627B2 Electronic component mounting method and apparatus 失效
标题翻译：电子元件安装方法和装置
公开(公告)号：US08007627B2
公开(公告)日：2011-08-30
申请号：US11064122
申请日：2005-02-23
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： B32B37/00 , B29C65/00
CPC分类号： H01L24/31 , H01L21/563 , H01L23/295 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13124 , H01L2224/13144 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/2949 , H01L2224/29499 , H01L2224/32225 , H01L2224/45144 , H01L2224/48624 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81048 , H01L2224/81191 , H01L2224/81801 , H01L2224/81903 , H01L2224/83048 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83194 , H01L2224/83851 , H01L2224/83856 , H01L2224/9211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , Y10T29/4913 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip is corrected and the board is connected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不超过20gf的压力将该芯片压靠在板上，同时校正芯片的翘曲并且板被连接，凸块被压缩，并且绝缘树脂硬化。

8. 发明申请

US20050155706A1 Electronic component mounting method and apparatus 失效
标题翻译：电子元件安装方法和装置
公开(公告)号：US20050155706A1
公开(公告)日：2005-07-21
申请号：US11064122
申请日：2005-02-23
申请人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
发明人： Kazuto Nishida , Hidenobu Nishikawa , Yoshinori Wada , Hiroyuki Otani
IPC分类号： H01L21/60 , H05K3/32 , C09J5/00 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/31 , H01L21/563 , H01L23/295 , H01L24/11 , H01L24/13 , H01L24/27 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/81 , H01L24/83 , H01L2224/0401 , H01L2224/05624 , H01L2224/11 , H01L2224/1134 , H01L2224/13 , H01L2224/13099 , H01L2224/13124 , H01L2224/13144 , H01L2224/16225 , H01L2224/29082 , H01L2224/29083 , H01L2224/29101 , H01L2224/2919 , H01L2224/2929 , H01L2224/29344 , H01L2224/2949 , H01L2224/29499 , H01L2224/32225 , H01L2224/45144 , H01L2224/48624 , H01L2224/73104 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/78301 , H01L2224/81048 , H01L2224/81191 , H01L2224/81801 , H01L2224/81903 , H01L2224/83048 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83194 , H01L2224/83851 , H01L2224/83856 , H01L2224/9211 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/07811 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3011 , H01L2924/3511 , H05K3/323 , Y10T29/4913 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： A chip is bonded on a circuit board by aligning in position bumps with board electrodes with interposition of an anisotropic conductive layer between the chip and the circuit board. The anisotropic conductive layer is a mixture of an insulating resin, conductive particles and an inorganic filler. The chip is pressed against the board with a pressure force of not smaller than 20 gf per bump by virtue of a tool, while warp of the chip and the board is connected, the bumps are compressed, and the insulating resin is hardened.
摘要翻译：芯片通过在位置凸块与板电极之间对准而在电路板上粘合，在芯片和电路板之间插入各向异性导电层。各向异性导电层是绝缘树脂，导电颗粒和无机填料的混合物。利用工具，以每个凸起不小于20gf的压力将芯片压在板上，同时连接芯片和板的翘曲，凸起被压缩，绝缘树脂硬化。

9. 发明授权

US07090502B2 Board connecting component and three-dimensional connecting structure using thereof 失效
标题翻译：板连接部件及其三维连接结构
公开(公告)号：US07090502B2
公开(公告)日：2006-08-15
申请号：US11118403
申请日：2005-05-02
申请人： Masahiro Ono , Shigeru Kondou , Kazuhiro Nishikawa , Kazuto Nishida , Hiroyuki Inoue , Osamu Miyazaki , Hiroshi Takeda , Tsuneyuki Ejima
发明人： Masahiro Ono , Shigeru Kondou , Kazuhiro Nishikawa , Kazuto Nishida , Hiroyuki Inoue , Osamu Miyazaki , Hiroshi Takeda , Tsuneyuki Ejima
IPC分类号： H01R12/00 , H05K1/00
CPC分类号： H05K1/144 , H01L2224/16225 , H01L2924/19105 , H01R12/52 , H05K3/3426 , H05K2201/042 , H05K2201/10189 , H05K2201/10424 , H05K2201/2018
摘要： The present invention includes a plurality of lead terminals made of a conductive material having spring elasticity; and insulative housing that buries a part of the region of lead terminal and fixedly retains a plurality of lead terminals in an arrangement having been set in advance. Lead terminal is composed of a buried part that is a part of lead terminal buried in housing; bottom end joint that is extended from one end of the buried part, is exposed through bottom end surface of housing, and extracted in width direction of bottom end surface; and flexibly changing part that is exposed from another end of the buried part through one wall surface orthogonal to bottom end surface, and is extended along this wall surface to top end surface facing to bottom end surface, being spaced from wall surface and top end surface.
摘要翻译：本发明包括由具有弹性弹性的导电材料制成的多个引线端子; 绝缘壳体，其埋设引线端子区域的一部分，并且在预先设置的布置中固定地保持多个引线端子。引线端子由掩埋在壳体中的引线端子的一部分构成; 从埋藏部分的一端延伸的底端接头通过壳体的底端表面暴露，并在底端表面的宽度方向上提取; 以及通过与底端表面正交的一个壁面暴露于埋藏部分的另一端的柔性变化部分，并且沿着该壁表面延伸到面向底端表面的顶端表面，与壁表面和顶端表面间隔开。

10. 发明授权

US07771561B2 Apparatus and method for surface treatment to substrate 失效
标题翻译：用于表面处理至衬底的装置和方法
公开(公告)号：US07771561B2
公开(公告)日：2010-08-10
申请号：US11598067
申请日：2006-11-13
申请人： Naoki Suzuki , Kazuto Nishida , Kazuyuki Tomita
发明人： Naoki Suzuki , Kazuto Nishida , Kazuyuki Tomita
IPC分类号： H01L21/00 , C23C16/00 , C23C14/00
CPC分类号： H05K3/26 , H01J37/32009 , H01J37/32935 , H01J37/3299 , H05K3/323 , H05K2203/095
摘要： An apparatus and a method for surface treatment of substrates whereby the quality of substrates can be maintained by preventing excessive plasma treatment of substrates. In carrying out the plasma treatment on a surface of the substrate in a reaction chamber, there are provided an emission spectroscopic analysis device or a mass analyzer, and a controller, so that the energy of ions in plasma is controlled to decrease when, e.g., bromine included in the substrate is detected, and the surface treatment to the substrate is controlled to stop when the removal of impurities of the substrate is detected to end. The bromine once separated from the substrate is prevented from adhering again to the substrate and corroding the substrate. Moreover, ions are prevented from being excessively irradiated to the substrate when the removal of impurities ends, thereby reducing damage to the substrate.
摘要翻译：用于表面处理基板的装置和方法，由此通过防止基板的过度等离子体处理可以保持基板的质量。在反应室中对基板的表面进行等离子体处理时，设置有发光光谱分析装置或质量分析装置以及控制器，使得等离子体中的离子的能量被控制为减少，例如，检测包含在基板中的溴，并且当检测到去除基板的杂质结束时，控制对基板的表面处理以停止。与基板分离的溴被防止再次粘附到基板上并腐蚀基板。此外，当去除杂质结束时，防止离子过度照射到基板，从而减少对基板的损坏。

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