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1. 发明申请

US20060214529A1 Three-phase DC brushless motor and winding method 有权
公开(公告)号：US20060214529A1
公开(公告)日：2006-09-28
申请号：US11385334
申请日：2006-03-21
申请人： Hideki Nishino , Kiyotaka Tanimoto , Taishi Iwanaga , Shinichi Kuroshima , Yoshiaki Igarashi
发明人： Hideki Nishino , Kiyotaka Tanimoto , Taishi Iwanaga , Shinichi Kuroshima , Yoshiaki Igarashi
IPC分类号： H02K3/00 , G05B11/28
CPC分类号： H02K3/28
摘要： A three-phase DC brushless motor and coil winding method provide a coil winding enabling consistent starting with PWM sensorless driving by suppressing the DC offset component of the induced voltage resulting from an imbalance in the motor coil windings. The method of winding the armature winding of the three-phase DC brushless motor renders the difference in mutual inductance substantially zero.

2. 发明申请

US20070138987A1 Apparatus and method for driving motor 审中-公开
标题翻译：电机驱动装置及方法
公开(公告)号：US20070138987A1
公开(公告)日：2007-06-21
申请号：US11637741
申请日：2006-12-13
申请人： Hideki Nishino , Kiyotaka Tanimoto , Taishi Iwanaga
发明人： Hideki Nishino , Kiyotaka Tanimoto , Taishi Iwanaga
IPC分类号： H02P7/06
CPC分类号： H02P27/08
摘要： An oscillation frequency selecting section selects any of a first oscillation section and a second oscillation section, depending on whether a signal of a current-passage direction switching section is a forward rotation signal or a brake signal. When the second oscillation section has an oscillation frequency lower than that of the first oscillation section, noise and vibration can be reduced by, for example, selecting the first oscillation section during forward rotation, and the second oscillation section during braking.
摘要翻译：振荡频率选择部根据电流通过方向切换部的信号是正转信号还是制动信号，选择第一振荡部和第二振动部中的任一个。当第二振荡部分的振荡频率低于第一振荡部分的振荡频率时，通过例如在正转中选择第一振动部分和制动期间的第二振荡部分可以降低噪声和振动。

3. 发明申请

US20060028161A1 Motor driving apparatus and motor driving method 有权
标题翻译：电机驱动装置及电机驱动方式
公开(公告)号：US20060028161A1
公开(公告)日：2006-02-09
申请号：US11191853
申请日：2005-07-27
申请人： Yasunori Yamamoto , Hideaki Mori , Shinichi Kuroshima , Hideki Nishino , Taishi Iwanaga
发明人： Yasunori Yamamoto , Hideaki Mori , Shinichi Kuroshima , Hideki Nishino , Taishi Iwanaga
IPC分类号： H02P7/00
CPC分类号： H02P6/10 , H02P6/18 , H02P2209/07
摘要： A motor driving apparatus has a driver circuit configuration capable of individually adjusting three phase coil currents. Coil current waveforms are formed to have a total of three phase shaft direction forces to be zero in compliance with predetermined mathematical expressions, and thus, three phase coil current profiles can be made independent of one another, and vibration-causing factors attributed to the fact that a certain phase is in an non-energized state are corrected by adjusting the current profiles of the other phases. Consequently, the vibration and the noise can be reduced.
摘要翻译：电动机驱动装置具有能够分别调节三相线圈电流的驱动电路结构。线圈电流波形形成为具有符合预定数学表达式的总共三相轴方向力为零，因此可以使三相线圈电流分布彼此独立，并且由于事实引起的振动引起因素通过调整其它相的电流曲线来校正某一相位处于非通电状态。因此，可以降低振动和噪音。

4. 发明授权

US06979970B2 Sensorless motor driving device and its driving method 有权
标题翻译：无传感器电机驱动装置及其驱动方法
公开(公告)号：US06979970B2
公开(公告)日：2005-12-27
申请号：US10878442
申请日：2004-06-29
申请人： Taishi Iwanaga , Yasunori Yamamoto , Hideki Nishino
发明人： Taishi Iwanaga , Yasunori Yamamoto , Hideki Nishino
IPC分类号： H02P27/08 , H02P3/08 , H02P5/00 , H02P6/08 , H02P6/18 , H02P6/20 , H02P7/00
CPC分类号： H02P6/182
摘要： A PWM control section (1) gently changes phase currents (Iu, Iv, and Iw) under a current driving control over a pre-drive circuit (2) and an output circuit (3). The pre-drive circuit (2) suspends energizing of the specific motor coil (Mu, Mv, and Mw) according to a PWM disable signal (NPWM) at PWM disable periods. A self-commutation circuit (5) performs zero crossing detection according to a BEMF detection signal (DZC) during BEMF detection periods. A count section (7) selects either a self-commutation signal (SC) or a forced commutation signal (FC) as a commutation signal (CS), whichever enters earlier, and, based on its intervals, generates the PWM disable signal (NPWM) and the BEMF detection signal (DZC). The BEMF detection period starts after the start of the PWM disable period, and finishes together with the PWM disable period at the switching of the energization phases.
摘要翻译： PWM控制部分（1）在电流驱动控制下在预驱动电路（2）和输出电路（3）上轻轻地改变相电流（Iu，Iv和Iw）。在PWM禁止期间，预驱动电路（2）根据PWM禁止信号（NPWM）暂停特定电动机线圈的通电（Mu，Mv和Mw）。自整流电路（5）在BEMF检测期间根据BEMF检测信号（DZC）进行过零检测。计数部分（7）选择自换换信号（SC）或强制换向信号（FC）作为换向信号（CS），以较早者为准，并且基于其间隔产生PWM禁止信号（NPWM ）和BEMF检测信号（DZC）。 BEMF检测周期在PWM禁止周期开始后开始，并在通电阶段切换时与PWM禁止周期一起完成。

5. 发明授权

US07088067B2 Motor driving apparatus and motor driving method 有权
公开(公告)号：US07088067B2
公开(公告)日：2006-08-08
申请号：US11191853
申请日：2005-07-27
申请人： Yasunori Yamamoto , Hideaki Mori , Shinichi Kuroshima , Hideki Nishino , Taishi Iwanaga
发明人： Yasunori Yamamoto , Hideaki Mori , Shinichi Kuroshima , Hideki Nishino , Taishi Iwanaga
IPC分类号： H02P7/00
CPC分类号： H02P6/10 , H02P6/18 , H02P2209/07
摘要： A motor driving apparatus has a driver circuit configuration capable of individually adjusting three phase coil currents. Coil current waveforms are formed to have a total of three phase shaft direction forces to be zero in compliance with predetermined mathematical expressions, and thus, three phase coil current profiles can be made independent of one another, and vibration-causing factors attributed to the fact that a certain phase is in an non-energized state are corrected by adjusting the current profiles of the other phases. Consequently, the vibration and the noise can be reduced.

6. 发明授权

US07579736B2 Three-phase DC brushless motor and winding method 有权
标题翻译：三相直流无刷电机和绕组方式
公开(公告)号：US07579736B2
公开(公告)日：2009-08-25
申请号：US11385334
申请日：2006-03-21
申请人： Hideki Nishino , Kiyotaka Tanimoto , Taishii Iwanaga , Shinichi Kuroshima , Yoshiaki Igarashi
发明人： Hideki Nishino , Kiyotaka Tanimoto , Taishii Iwanaga , Shinichi Kuroshima , Yoshiaki Igarashi
IPC分类号： H02K17/12
CPC分类号： H02K3/28
摘要： A three-phase DC brushless motor and coil winding method provide a coil winding enabling consistent starting with PWM sensorless driving by suppressing the DC offset component of the induced voltage resulting from an imbalance in the motor coil windings. The method of winding the armature winding of the three-phase DC brushless motor renders the difference in mutual inductance substantially zero.
摘要翻译：三相DC无刷电动机和线圈绕组方法提供了一种线圈绕组，其通过抑制由于电动机线圈绕组的不平衡而引起的感应电压的DC偏移分量，从而能够与PWM无传感器驱动一致。绕组三相直流无刷电机的电枢绕组的方法使互感差异基本为零。

7. 发明授权

US4308561A Miniature computer 失效
标题翻译：微型计算机
公开(公告)号：US4308561A
公开(公告)日：1981-12-29
申请号：US149582
申请日：1980-05-14
申请人： Toru Onodera , Akira Ohsawa , Hideki Nishino , Masao Watari
发明人： Toru Onodera , Akira Ohsawa , Hideki Nishino , Masao Watari
IPC分类号： G06F9/455 , G06F15/02 , G06F15/78 , H05K1/14 , G11B5/09 , G11B5/02
CPC分类号： G06F15/7864 , H05K1/14
摘要： A reproducing circuit is provided for reproducing digital information recorded in a cassette tape by frequency modulation in which different first and second digital logic levels are respectively represented by first and second repeated signals having respective first and second repeated frequencies, the first repeated frequency being higher than the second. A pulse forming circuit produces first and second pulse signals having the first and second repeated frequencies in response to the signals recorded on the cassette tape. The first or second pulse signals are applied to a one-shot circuit as a trigger signal and to the control input terminal of a flip-flop circuit as a control signal. The output of the one-shot circuit is supplied to the data input terminal of the flip-flop circuit, whereby reproduced digital information corresponding to the digital information recorded on the cassette tape is derived from the output terminal of the flip-flop circuit.
摘要翻译：再现电路用于通过频率调制再现记录在盒式磁带中的数字信息，其中不同的第一和第二数字逻辑电平分别由具有相应的第一和第二重复频率的第一和第二重复信号表示，第一重复频率高于第二。脉冲形成电路响应于记录在盒式磁带上的信号产生具有第一和第二重复频率的第一和第二脉冲信号。第一或第二脉冲信号作为触发信号施加到单触发电路，并作为控制信号施加到触发器电路的控制输入端。单触发电路的输出被提供给触发器电路的数据输入端，由此从触发器电路的输出端导出与记录在盒式磁带上的数字信息对应的再现的数字信息。

8. 发明申请

US20080128826A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND FABRICATION METHOD FOR THE SAME 审中-公开
标题翻译：半导体集成电路及其制造方法
公开(公告)号：US20080128826A1
公开(公告)日：2008-06-05
申请号：US11945605
申请日：2007-11-27
申请人： Shingo Fukamizu , Yutaka Nabeshima , Hideki Nishino
发明人： Shingo Fukamizu , Yutaka Nabeshima , Hideki Nishino
IPC分类号： H01L29/78 , H01L21/4763
CPC分类号： H01L23/49562 , H01L23/4952 , H01L24/03 , H01L24/05 , H01L24/48 , H01L24/49 , H01L2224/02166 , H01L2224/04042 , H01L2224/05009 , H01L2224/05552 , H01L2224/05553 , H01L2224/05647 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48463 , H01L2224/48465 , H01L2224/49111 , H01L2224/49113 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/19043 , H01L2924/00 , H01L2224/45099
摘要： The semiconductor integrated circuit includes: a power transistor formed on a semiconductor substrate; a plurality of first metal patterns and a plurality of second metal patterns formed right above the power transistor for acting as first and second electrodes of the power transistor; a first bus electrically connected with the first metal patterns; a second bus electrically connected with the second metal patterns; and one contact pad provided for each of the first and second buses. Each of the first and second buses has at least one slit.
摘要翻译：半导体集成电路包括：形成在半导体衬底上的功率晶体管; 形成在功率晶体管正上方的多个第一金属图形和多个第二金属图案，用作功率晶体管的第一和第二电极; 与所述第一金属图案电连接的第一总线; 与所述第二金属图案电连接的第二总线; 以及为第一和第二总线中的每一个设置的一个接触垫。第一和第二总线中的每一个具有至少一个狭缝。

9. 发明授权

US06874744B2 Stand for supporting a display in multiple orientations and a display used in combination with said stand 有权
公开(公告)号：US06874744B2
公开(公告)日：2005-04-05
申请号：US10080518
申请日：2002-02-25
申请人： Scott Rawlings , Hideki Nishino , Konrad Pollmann , David Sayler
发明人： Scott Rawlings , Hideki Nishino , Konrad Pollmann , David Sayler
IPC分类号： G01S19/05 , F16M11/06 , F16M11/10 , E04G3/00 , A47F5/02
CPC分类号： F16M13/00 , F16M11/041 , F16M11/105 , F16M11/2021 , F16M2200/024 , F16M2200/044 , F16M2200/08 , Y10S248/919 , Y10S248/922
摘要： An adjustable stand for rotatably and releaseably supporting a flat panel display is disclosed together with a display device usable with the stand. The display includes a boss projecting from a rear surface thereof, which boss is received in an arc-shaped channel in a plate portion of the stand. The stand further includes two hingedly connected legs and selective locking devices for controlling the angle between the legs, thereby allowing the stand hold the display in a variety of orientations with respect to a horizontal support surface.

10. 发明授权

US4253143A Miniature computer capable of using a conventional audio cassette tape deck as an auxiliary memory 失效
标题翻译：能够使用传统音频盒式磁带录像机作为辅助存储器的微型计算机
公开(公告)号：US4253143A
公开(公告)日：1981-02-24
申请号：US898996
申请日：1978-04-21
申请人： Toru Onodera , Akira Ohsawa , Hideki Nishino , Masao Watari
发明人： Toru Onodera , Akira Ohsawa , Hideki Nishino , Masao Watari
IPC分类号： G06F9/455 , G06F15/02 , G06F15/78 , H05K1/14 , G06F3/023 , G06F3/147 , G06F9/22
CPC分类号： G06F15/7864 , H05K1/14
摘要： A minature computer comprising a main section which includes a central processor, a read only memory storing a monitor program, a random access memory for executing the monitor program and a controlling circuit for peripheral equipments developed which has a hand-held controller electrically connected to the main section through a flat cable, having a keyboard and display device such that the keyboard has keys of a numeral 0 to 9 and the alpha characters A to Z for enabling symbolic languages to be input according to an assembler program. The assembler program is stored in the read only memory and the symbolic languages are converted to corresponding machine languages. The main section has a first jack capable of inputting a program from a audio cassette tape deck and a second jack capable of storing a program in a audio cassette tape deck. The main section also has third and fourth jacks which control the operation of the audio cassette tape decks connected to the first two jacks.
摘要翻译：一种微型计算机，包括主部分，其包括中央处理器，存储监视程序的只读存储器，用于执行监视程序的随机存取存储器和用于开发的用于外围设备的控制电路，其具有电连接到主要部分通过扁平电缆，具有键盘和显示装置，使得键盘具有数字0至9的键和用于使符号语言根据汇编程序输入的字母A至Z。汇编程序存储在只读存储器中，符号语言被转换为相应的机器语言。主要部分具有能够从音频盒式磁带卡座输入程序的第一插孔和能够将程序存储在音频盒式磁带卡座中的第二插孔。主要部分还具有第三和第四插孔，其控制连接到前两个插孔的音频盒式磁带机的操作。

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