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1. 发明授权

US06458237B1 Mounting method of semiconductor device 失效
标题翻译：半导体器件的安装方法
公开(公告)号：US06458237B1
公开(公告)日：2002-10-01
申请号：US09045115
申请日：1998-03-20
申请人： Kazuhisa Tsunoi , Hidehiko Kira , Shunji Baba , Akira Fujii , Toshihiro Kusagaya , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
发明人： Kazuhisa Tsunoi , Hidehiko Kira , Shunji Baba , Akira Fujii , Toshihiro Kusagaya , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
IPC分类号： B32B700
CPC分类号： H01L24/81 , H01L21/563 , H01L24/11 , H01L24/29 , H01L24/75 , H01L2224/1134 , H01L2224/11822 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/81001 , H01L2224/81203 , H01L2224/81801 , H01L2224/83101 , H01L2224/83192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01079 , H01L2924/07802 , H01L2924/07811 , H01L2924/00
摘要： A method of mounting a semiconductor device having bumps on a board having pads so that each of the bumps is joined to a corresponding one of the pads is provided. Adhesive to be hardened by heat is provided between the semiconductor device and the board. The method includes the steps of pressing the bumps of the semiconductor device on the pads of the board, and heating a portion in which each of the bumps and a corresponding one of the pads are in contact with each other. A pressure of the bumps to the pads reaches a predetermined value before a temperature of the adhesive to which heat is supplied in the above step reaches a temperature at which the adhesive is hardened.
摘要翻译：提供了一种将具有凸块的半导体器件安装在具有焊盘的板上，使得每个凸起接合到相应的一个焊盘的方法。在半导体器件和电路板之间提供通过加热硬化的粘合剂。该方法包括以下步骤：将半导体器件的凸起按压在板的焊盘上，并且加热其中每个凸块和相应的一个焊盘彼此接触的部分。在上述步骤中供应热量的粘合剂的温度达到粘合剂硬化的温度之前，焊盘的凸块的压力达到预定值。

2. 发明授权

US06240634B1 Method of producing a multichip package module in which rough-pitch and fine-pitch chips are mounted on a board 有权
标题翻译：一种多芯片封装模块的制造方法，其中将粗间距和细间距芯片安装在板上
公开(公告)号：US06240634B1
公开(公告)日：2001-06-05
申请号：US09460727
申请日：1999-12-14
申请人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
发明人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
IPC分类号： H05K330
CPC分类号： H01L24/83 , H01L21/563 , H01L24/27 , H01L24/29 , H01L24/743 , H01L24/75 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/743 , H01L2224/75 , H01L2224/75252 , H01L2224/75743 , H01L2224/75745 , H01L2224/81191 , H01L2224/81801 , H01L2224/83192 , H01L2224/8385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , Y10T29/4913 , Y10T29/49137 , Y10T29/49144 , Y10T29/53178 , H01L2924/00
摘要： In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
摘要翻译：在制造多芯片封装模块的方法中，将粗间距裸芯片定位在印刷电路板上的第一位置处，并且在第一位置将粗糙间距裸芯片暂时附接到板上。通过同时向粗糙的裸芯片施加热量和压力，同时将粗糙的裸芯片安装在板上。微细间距裸芯片中的相应一个位于除了第一位置之外的板上的第二位置中的相应一个处，并且通过向第一位置施加热和压力将精细间距裸芯片中的相应一个安装在板上单芯片的裸芯片，以生产多芯片封装模块。

3. 发明授权

US6122823A Apparatus to produce a multichip package module in which rough-pitch and fine-pitch chips are mounted on a board 有权
标题翻译：一种用于制造多芯片封装模块的装置，其中将粗间距和细间距芯片安装在板上
公开(公告)号：US6122823A
公开(公告)日：2000-09-26
申请号：US401985
申请日：1999-09-23
申请人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
发明人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
IPC分类号： H01L21/56 , H01L21/58 , H01L21/60 , H01L21/603 , H01L25/04 , H01L25/18 , H05K3/34
CPC分类号： H01L24/83 , H01L21/563 , H01L24/27 , H01L24/29 , H01L24/743 , H01L24/75 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/743 , H01L2224/75 , H01L2224/75252 , H01L2224/75743 , H01L2224/75745 , H01L2224/81191 , H01L2224/81801 , H01L2224/83192 , H01L2224/8385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , Y10T29/4913 , Y10T29/49137 , Y10T29/49144 , Y10T29/53178
摘要： In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
摘要翻译：在制造多芯片封装模块的方法中，将粗间距裸芯片定位在印刷电路板上的第一位置处，并且在第一位置将粗糙间距裸芯片临时附接到板上。通过同时向粗糙的裸芯片施加热量和压力，同时将粗糙的裸芯片安装在板上。微细间距裸芯片中的相应一个位于除了第一位置之外的板上的第二位置中的相应一个处，并且通过向第一位置施加热和压力将精细间距裸芯片中的相应一个安装在板上单芯片的裸芯片，以生产多芯片封装模块。

4. 发明授权

US6006426A Method of producing a multichip package module in which rough-pitch and fine-pitch chips are mounted on a board 失效
标题翻译：一种多芯片封装模块的制造方法，其中将粗间距和细间距芯片安装在板上
公开(公告)号：US6006426A
公开(公告)日：1999-12-28
申请号：US26490
申请日：1998-02-19
申请人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
发明人： Hidehiko Kira , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
IPC分类号： H01L21/56 , H01L21/58 , H01L21/60 , H01L21/603 , H01L25/04 , H01L25/18 , H05K3/30
CPC分类号： H01L24/83 , H01L21/563 , H01L24/27 , H01L24/29 , H01L24/743 , H01L24/75 , H01L24/81 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/2919 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/743 , H01L2224/75 , H01L2224/75252 , H01L2224/75743 , H01L2224/75745 , H01L2224/81191 , H01L2224/81801 , H01L2224/83192 , H01L2224/8385 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , Y10T29/4913 , Y10T29/49137 , Y10T29/49144 , Y10T29/53178
摘要： In a method of production of a multichip package module, rough-pitch bare chips are positioned at first locations on a printed-circuit board, and the rough-pitch bare chips are temporarily attached to the board at the first locations. The rough-pitch bare chips are mounted on the board at the same time by applying heat and pressure to the rough-pitch bare chips simultaneously. A respective one of fine-pitch bare chips is positioned at a respective one of second locations on the board other than the first locations, and the respective one of the fine-pitch bare chips is mounted on the board by applying heat and pressure to the fine-pitch bare chips individually, in order to produce the multichip package module.
摘要翻译：在制造多芯片封装模块的方法中，将粗间距裸芯片定位在印刷电路板上的第一位置处，并且在第一位置将粗糙间距裸芯片临时附接到板上。通过同时向粗糙的裸芯片施加热量和压力，同时将粗糙的裸芯片安装在板上。微细间距裸芯片中的相应一个位于除了第一位置之外的板上的第二位置中的相应一个处，并且通过向第一位置施加热和压力将精细间距裸芯片中的相应一个安装在板上单芯片的裸芯片，以生产多芯片封装模块。

5. 发明授权

US06787925B2 Mounting method of semiconductor device 有权
标题翻译：半导体器件的安装方法
公开(公告)号：US06787925B2
公开(公告)日：2004-09-07
申请号：US09805559
申请日：2001-03-14
申请人： Kazuhisa Tsunoi , Hidehiko Kira , Shunji Baba , Akira Fujii , Toshihiro Kusagaya , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
发明人： Kazuhisa Tsunoi , Hidehiko Kira , Shunji Baba , Akira Fujii , Toshihiro Kusagaya , Kenji Kobae , Norio Kainuma , Naoki Ishikawa , Satoshi Emoto
IPC分类号： H01L2348
CPC分类号： H01L24/81 , H01L21/563 , H01L24/11 , H01L24/29 , H01L24/75 , H01L2224/1134 , H01L2224/11822 , H01L2224/13099 , H01L2224/13144 , H01L2224/16225 , H01L2224/32225 , H01L2224/45144 , H01L2224/73203 , H01L2224/73204 , H01L2224/75 , H01L2224/75251 , H01L2224/75252 , H01L2224/81001 , H01L2224/81203 , H01L2224/81801 , H01L2224/83101 , H01L2224/83192 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01061 , H01L2924/01079 , H01L2924/07802 , H01L2924/07811 , H01L2924/00
摘要： A method of mounting a semiconductor device having bumps on a board having pads so that each of the bumps is joined to a corresponding one of the pads is provided. Adhesive to be hardened by heat is provided between the semiconductor device and the board. The method includes the steps of pressing the bumps of the semiconductor device on the pads of the board, and heating a portion in which each of the bumps and a corresponding one of the pads are in contact with each other. A pressure of the bumps to the pads reaches a predetermined value before a temperature of the adhesive to which heat is supplied in the above step reaches a temperature at which the adhesive is hardened.
摘要翻译：提供了一种将具有凸块的半导体器件安装在具有焊盘的板上，使得每个凸起接合到相应的一个焊盘的方法。在半导体器件和电路板之间提供通过加热硬化的粘合剂。该方法包括以下步骤：将半导体器件的凸起按压在板的焊盘上，并且加热其中每个凸块和相应的一个焊盘彼此接触的部分。在上述步骤中供应热量的粘合剂的温度达到粘合剂硬化的温度之前，焊盘的凸块的压力达到预定值。

6. 发明申请

US20150007876A1 COLLECTOR SHEET FOR SOLAR CELL, AND SOLAR CELL MODULE USING COLLECTOR SHEET FOR SOLAR CELL 审中-公开
标题翻译：太阳能电池收集板和使用太阳能电池收集板的太阳能电池模块
公开(公告)号：US20150007876A1
公开(公告)日：2015-01-08
申请号：US14238831
申请日：2012-03-29
申请人： Takayuki Komai , Satoshi Emoto
发明人： Takayuki Komai , Satoshi Emoto
IPC分类号： H01L31/052 , H01L31/02
CPC分类号： H01L31/02008 , H01L31/049 , H01L31/0516 , H01L31/0547 , Y02E10/52
摘要： Provided is a collector sheet for a solar cell, and contributing to improvement of power generation efficiency. A collector sheet (5) for a solar cell is disposed on the rear surface side of a solar cell element (4), and is provided with: a circuit (54), which is formed on the front surface of a resin base material (53), and which is configured of a wiring section (541) composed of a metal, and a non-wiring section (542); and an insulating layer (52), which is formed on the circuit (54). Light extraction to the solar cell element (4) due to reflection from the insulating layer (52) is increased, said insulating layer being disposed at the element periphery of the solar cell element (4), by having a white pigment contained in the insulating layer (52), and power generation efficiency is improved even in a back contact solar cell element.
摘要翻译：提供一种太阳能电池用集电体片，有助于提高发电效率。在太阳能电池元件（4）的背面侧配置有用于太阳能电池的集电片（5），并且设置有形成在树脂基材的表面上的电路（54） 53），由金属构成的配线部（541）和非配线部（542）构成。以及形成在电路（54）上的绝缘层（52）。由于绝缘层（52）的反射而向太阳能电池元件（4）的光提取增加，所述绝缘层通过在绝缘层（52）中包含白色颜料而设置在太阳能电池元件（4）的元件周围层（52），即使在背接触太阳能电池元件中也能够提高发电效率。

7. 发明申请

US20140186989A1 CONDUCTIVE BASE FOR FORMING WIRING PATTERN OF COLLECTOR SHEET FOR SOLAR CELLS, AND METHOD FOR PRODUCING COLLECTOR SHEET FOR SOLAR CELLS 有权
标题翻译：用于形成用于太阳能电池的收集板的布线图案的导电基板和用于生产太阳能电池的收集板的方法
公开(公告)号：US20140186989A1
公开(公告)日：2014-07-03
申请号：US14126366
申请日：2012-06-14
申请人： Takayuki Komai , Satoshi Emoto
发明人： Takayuki Komai , Satoshi Emoto
IPC分类号： H01L31/18 , H01L31/05 , B32B15/01
CPC分类号： H01L31/18 , B32B15/01 , C23C30/00 , C25D3/22 , C25D5/48 , C25D7/0607 , H01L31/05 , H01L31/0516 , H05K1/09 , H05K3/06 , H05K2201/0338 , H05K2201/0355 , H05K2201/10143 , Y02E10/50 , Y10T428/12792
摘要： Provided are: a conductive base for forming a wiring pattern of a collector sheet for solar cells, which has good rust inhibiting properties and solderability without using an organic rust inhibitor that may harm a solar cell element; and a method for producing a collector sheet for solar cells, said method using the conductive base. A conductive base for forming a wiring pattern of a collector sheet for solar cells, which is a conductive base (30) wherein a zinc layer (320) composed of zinc is formed on the surface of a copper foil (310), is used. The conductive base for forming a wiring pattern of a collector sheet for solar cells is characterized in that the zinc layer (320) does not contain chromium and the amount of zinc therein is more than 20 mg/m2 but 40 mg/m2 or less.
摘要翻译：提供：用于形成太阳能电池用集电体片的布线图案的导电性基材，其具有良好的防锈性和可焊性，而不使用可能损害太阳能电池元件的有机防锈剂; 以及太阳能电池用集电体片的制造方法，使用该导电性基材的方法。使用在铜箔（310）的表面上形成由锌构成的锌层（320）的导电性基体（30）形成太阳能电池用集电体片的布线图形的导电性基材。用于形成太阳能电池用集电体片的布线图案的导电性基材的特征在于，锌层（320）不含铬，锌的含量超过20mg / m 2，但为40mg / m 2以下。

8. 发明申请

US20100006325A1 PRINTED WIRING BOARD 失效
标题翻译：印刷线路板
公开(公告)号：US20100006325A1
公开(公告)日：2010-01-14
申请号：US12495860
申请日：2009-07-01
申请人： Masayuki KITAJIMA , Takeshi Ishitsuka , Satoshi Emoto
发明人： Masayuki KITAJIMA , Takeshi Ishitsuka , Satoshi Emoto
IPC分类号： H05K1/09 , H01B1/00 , H01B1/22 , H01B1/24 , H05K3/00 , H05K1/00 , H05K1/03
CPC分类号： H05K3/249 , H05K1/118 , H05K2201/0272 , H05K2201/035 , H05K2201/0769 , H05K2203/1105
摘要： A printed wiring board includes a first conductive paste forming a wiring pattern, and a second conductive paste including kneaded first conductive material and second conductive material whose particles are finer than those of the first conductive material.
摘要翻译：印刷布线板包括形成布线图案的第一导电浆料和包含捏合的第一导电材料的第二导电浆料和其颗粒比第一导电材料的颗粒更细的第二导电材料。

9. 发明申请

US20090195933A1 HEAD ASSEMBLY 审中-公开
标题翻译：总部组织
公开(公告)号：US20090195933A1
公开(公告)日：2009-08-06
申请号：US12361233
申请日：2009-01-28
申请人： Takuma Kido , Atsushi Koga , Satoshi Emoto , Kenrou Yamamoto , Takeshi Ohwe
发明人： Takuma Kido , Atsushi Koga , Satoshi Emoto , Kenrou Yamamoto , Takeshi Ohwe
IPC分类号： G11B5/48
CPC分类号： G11B5/4826 , G11B5/455 , G11B5/4853 , H05K3/305 , H05K3/326 , H05K3/3442 , H05K3/4015 , H05K2201/09427 , H05K2201/09781 , H05K2201/1025 , H05K2201/10727 , Y02P70/613
摘要： A head assembly for writing or reading information to or from a recording medium. The head assembly includes a suspension having an electrode pad; a mounting member placed on the suspension; a head mounted on the mounting member and having an electrode, for writing or reading information; and a first bonding member made of a hot-melt adhesive and fixing the electrode to the electrode pad.
摘要翻译：用于向或从记录介质读取信息的头组件。头组件包括具有电极垫的悬架; 放置在悬架上的安装构件; 安装在所述安装构件上并具有用于写入或读取信息的电极的头部; 以及由热熔粘合剂制成的第一粘接部件，并将该电极固定在电极焊盘上。

10. 发明授权

US09666746B2 Conductive base for forming wiring pattern of collector sheet for solar cells, and method for producing collector sheet for solar cells 有权
公开(公告)号：US09666746B2
公开(公告)日：2017-05-30
申请号：US14126366
申请日：2012-06-14
申请人： Takayuki Komai , Satoshi Emoto
发明人： Takayuki Komai , Satoshi Emoto
IPC分类号： H01L31/18 , H01L31/05 , B32B15/01 , C25D5/48 , C25D7/06 , C23C30/00 , H05K1/09 , C25D3/22 , H05K3/06
CPC分类号： H01L31/18 , B32B15/01 , C23C30/00 , C25D3/22 , C25D5/48 , C25D7/0607 , H01L31/05 , H01L31/0516 , H05K1/09 , H05K3/06 , H05K2201/0338 , H05K2201/0355 , H05K2201/10143 , Y02E10/50 , Y10T428/12792
摘要： Provided are: a conductive base for forming a wiring pattern of a collector sheet for solar cells, which has good rust inhibiting properties and solderability without using an organic rust inhibitor that may harm a solar cell element; and a method for producing a collector sheet for solar cells, said method using the conductive base. A conductive base for forming a wiring pattern of a collector sheet for solar cells, which is a conductive base (30) wherein a zinc layer (320) composed of zinc is formed on the surface of a copper foil (310), is used. The conductive base for forming a wiring pattern of a collector sheet for solar cells is characterized in that the zinc layer (320) does not contain chromium and the amount of zinc therein is more than 20 mg/m2 but 40 mg/m2 or less.

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