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1. 发明申请

US20110237009A1 LCOS DISPLAY UNIT AND METHOD FOR FORMING THE SAME 有权
标题翻译： LCOS显示单元及其形成方法
公开(公告)号：US20110237009A1
公开(公告)日：2011-09-29
申请号：US13155870
申请日：2011-06-08
申请人： Herb He HUANG , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
发明人： Herb He HUANG , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
IPC分类号： H01L31/18
CPC分类号： G02F1/136277 , G02F1/133553 , G02F1/136209 , H01L27/12 , H01L27/1214 , H01L27/13 , H01L29/78633 , H01L29/78654
摘要： An embodiment of the present invention discloses a Liquid Crystal on Silicon (LCOS) display unit, in which a Metal-Insulator-Metal (MIM) capacitor consisting of a micromirror layer, a insulation layer and a light shielding layer is formed by grounding the light shielding layer on a pixel switch circuit layer. Therefore the pixel switch circuit and the capacitor are in vertical distribution, that is, the switch circuit and the capacitor both have an allowable design area of the size of one pixel. Another embodiment of the present invention provides a method for forming a Liquid Crystal on Silicon (LCOS) display unit.
摘要翻译：本发明的实施例公开了一种液晶硅（LCOS）显示单元，其中通过将光接地而形成由微镜层，绝缘层和遮光层组成的金属 - 绝缘体 - 金属（MIM）电容器像素开关电路层上的屏蔽层。因此，像素开关电路和电容器处于垂直分布，即开关电路和电容器都具有允许的一个像素尺寸的设计区域。本发明的另一个实施例提供了一种用于形成硅晶体（LCOS）显示单元的方法。

2. 发明授权

US07995165B2 LCOS display unit and method for forming the same 有权
标题翻译： LCOS显示单元及其形成方法
公开(公告)号：US07995165B2
公开(公告)日：2011-08-09
申请号：US11851331
申请日：2007-09-06
申请人： Herb He Huang , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
发明人： Herb He Huang , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
IPC分类号： G02F1/1335
CPC分类号： G02F1/136277 , G02F1/133553 , G02F1/136209 , H01L27/12 , H01L27/1214 , H01L27/13 , H01L29/78633 , H01L29/78654
摘要： An embodiment of the present invention discloses a Liquid Crystal on Silicon (LCOS) display unit, in which a Metal-Insulator-Metal (MIM) capacitor consisting of a micromirror layer, a insulation layer and a light shielding layer is formed by grounding the light shielding layer on a pixel switch circuit layer. Therefore the pixel switch circuit and the capacitor are in vertical distribution, that is, the switch circuit and the capacitor both have an allowable design area of the size of one pixel. Another embodiment of the present invention provides a method for forming a Liquid Crystal on Silicon (LCOS) display unit.
摘要翻译：本发明的实施例公开了一种液晶硅（LCOS）显示单元，其中通过将光接地而形成由微镜层，绝缘层和遮光层组成的金属 - 绝缘体 - 金属（MIM）电容器像素开关电路层上的屏蔽层。因此，像素开关电路和电容器处于垂直分布，即开关电路和电容器都具有允许的一个像素尺寸的设计区域。本发明的另一个实施例提供了一种用于形成硅晶体（LCOS）显示单元的方法。

3. 发明授权

US08379183B2 LCOS display unit and method for forming the same 有权
标题翻译： LCOS显示单元及其形成方法
公开(公告)号：US08379183B2
公开(公告)日：2013-02-19
申请号：US13155870
申请日：2011-06-08
申请人： Herb He Huang , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
发明人： Herb He Huang , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
IPC分类号： G02F1/13 , G02F1/1335
CPC分类号： G02F1/136277 , G02F1/133553 , G02F1/136209 , H01L27/12 , H01L27/1214 , H01L27/13 , H01L29/78633 , H01L29/78654
摘要： An embodiment of the present invention discloses a Liquid Crystal on Silicon (LCOS) display unit, in which a Metal-Insulator-Metal (MIM) capacitor consisting of a micromirror layer, a insulation layer and a light shielding layer is formed by grounding the light shielding layer on a pixel switch circuit layer. Therefore the pixel switch circuit and the capacitor are in vertical distribution, that is, the switch circuit and the capacitor both have an allowable design area of the size of one pixel. Another embodiment of the present invention provides a method for forming a Liquid Crystal on Silicon (LCOS) display unit.
摘要翻译：本发明的实施例公开了一种液晶硅（LCOS）显示单元，其中通过将光接地而形成由微镜层，绝缘层和遮光层组成的金属 - 绝缘体 - 金属（MIM）电容器像素开关电路层上的屏蔽层。因此，像素开关电路和电容器处于垂直分布，即开关电路和电容器都具有允许的一个像素尺寸的设计区域。本发明的另一个实施例提供了一种用于形成硅晶体（LCOS）显示单元的方法。

4. 发明申请

US20080129911A1 LCOS DISPLAY UNIT AND METHOD FOR FORMING THE SAME 有权
标题翻译： LCOS显示单元及其形成方法
公开(公告)号：US20080129911A1
公开(公告)日：2008-06-05
申请号：US11851331
申请日：2007-09-06
申请人： Herb He HUANG , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
发明人： Herb He HUANG , Xianyong Pu , Jianhong Mao , Yiqun Chen , Jing Fu , Zhongshan Hong , Yanghui Xiang
IPC分类号： G02F1/136 , H01L21/77
CPC分类号： G02F1/136277 , G02F1/133553 , G02F1/136209 , H01L27/12 , H01L27/1214 , H01L27/13 , H01L29/78633 , H01L29/78654
摘要： An embodiment of the present invention discloses a Liquid Crystal on Silicon (LCOS) display unit, in which a Metal-Insulator-Metal (MIM) capacitor consisting of a micromirror layer, a insulation layer and a light shielding layer is formed by grounding the light shielding layer on a pixel switch circuit layer. Therefore the pixel switch circuit and the capacitor are in vertical distribution, that is, the switch circuit and the capacitor both have an allowable design area of the size of one pixel. Another embodiment of the present invention provides a method for forming a Liquid Crystal on Silicon (LCOS) display unit.
摘要翻译：本发明的实施例公开了一种液晶硅（LCOS）显示单元，其中通过将光接地而形成由微镜层，绝缘层和遮光层组成的金属 - 绝缘体 - 金属（MIM）电容器像素开关电路层上的屏蔽层。因此，像素开关电路和电容器处于垂直分布，即开关电路和电容器都具有允许的一个像素尺寸的设计区域。本发明的另一个实施例提供了一种用于形成硅晶体（LCOS）显示单元的方法。

5. 发明授权

US08828868B2 Method for forming hard mask in semiconductor device fabrication 有权
标题翻译：在半导体器件制造中形成硬掩模的方法
公开(公告)号：US08828868B2
公开(公告)日：2014-09-09
申请号：US13314000
申请日：2011-12-07
申请人： Zhongshan Hong
发明人： Zhongshan Hong
IPC分类号： H01L21/033 , H01L21/3213
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/28132 , H01L21/32139
摘要： A method for forming a hard mask in semiconductor device fabrication comprises: forming first and second patterned material layers on a third material layer, the second patterned material layer only covering the top of predetermined regions of the first patterned material layer; changing a property of exposed top and side portions of the first patterned material layer using the second patterned material layer as a mask, forming property-changed roofs at the exposed top portions of the first patterned material layer and forming property-changed sidewalls with a predetermined width at the exposed side portions of the first patterned material layer; removing the second patterned material layer and portions of the first patterned material layer with exposed tops and an unchanged property located between the property-changed sidewalls, to form the hard mask.
摘要翻译：在半导体器件制造中形成硬掩模的方法包括：在第三材料层上形成第一和第二图案化材料层，第二图案化材料层仅覆盖第一图案化材料层的预定区域的顶部; 使用第二图案化材料层作为掩模改变第一图案化材料层的暴露的顶部和侧部的性质，在第一图案化材料层的暴露的顶部部分形成特性改变的屋顶，并以预定的宽度在第一图案化材料层的暴露侧部分; 用暴露的顶部去除第二图案化材料层和第一图案化材料层的部分，以及位于属性变化的侧壁之间的不变特性，以形成硬掩模。

6. 发明授权

US08435900B2 Method for manufacturing a transistor 有权
标题翻译：制造晶体管的方法
公开(公告)号：US08435900B2
公开(公告)日：2013-05-07
申请号：US13243977
申请日：2011-09-23
申请人： Qun Shao , Zhongshan Hong
发明人： Qun Shao , Zhongshan Hong
IPC分类号： H01L21/331 , H01L21/461
CPC分类号： H01L21/823412 , H01L21/31053 , H01L21/31056 , H01L21/823456 , H01L21/823468
摘要： The invention provides a method for manufacturing a transistor which includes: providing a substrate having a plurality of transistors formed thereon, wherein each transistor includes a gate; forming a stressed layer and a first oxide layer on the transistors and on the substrate successively; forming a sacrificial layer on the first oxide layer; patterning the sacrificial layer to remove a part of the sacrificial layer which covers on the gates of the transistors; forming a second oxide layer on the residual sacrificial layer and on a part of the first oxide layer which is exposed after the part of the sacrificial layer is removed; performing a first planarization process to remove a part of the second oxide layer located on the gates of the transistors; performing a second planarization process to remove the residual second oxide layer; and performing a third planarization process to remove the stressed layer.
摘要翻译：本发明提供了一种制造晶体管的方法，包括：提供其上形成有多个晶体管的衬底，其中每个晶体管包括栅极; 依次在晶体管和基板上形成应力层和第一氧化物层; 在所述第一氧化物层上形成牺牲层; 图案化牺牲层以去除覆盖在晶体管的栅极上的牺牲层的一部分; 在所述牺牲层的所述部分被去除之后，在所述残留牺牲层上和所述第一氧化物层的一部分上暴露的第二氧化物层; 执行第一平坦化处理以去除位于晶体管的栅极上的第二氧化物层的一部分; 执行第二平坦化处理以去除残留的第二氧化物层; 并执行第三平面化处理以去除应力层。

7. 发明授权

US08975167B2 Semiconductor device and manufacturing method 有权
标题翻译：半导体器件及制造方法
公开(公告)号：US08975167B2
公开(公告)日：2015-03-10
申请号：US13686019
申请日：2012-11-27
申请人： Zhongshan Hong
发明人： Zhongshan Hong
IPC分类号： H01L21/00 , H01L29/78 , H01L21/36 , H01L29/66
CPC分类号： H01L29/785 , H01L29/0649 , H01L29/1033 , H01L29/16 , H01L29/1608 , H01L29/161 , H01L29/20 , H01L29/495 , H01L29/4966 , H01L29/51 , H01L29/517 , H01L29/518 , H01L29/66545 , H01L29/66795 , H01L29/78
摘要： A fabrication process of a semiconductor device is disclosed. The method includes providing a semiconductor substrate with a first insulation layer formed on the semiconductor substrate and a fin formed on the surface of the first insulation layer, and forming a fully-depleted semiconductor layer on sidewalls of the fin, and the fully-depleted semiconductor layer having a material different from that of the fin. The method also includes forming a second insulation layer covering the fully-depleted semiconductor layer, and removing the fin to form an opening exposing sidewalls of the fully-depleted semiconductor layer. Further, the method includes forming a gate dielectric layer on part of the sidewalls of the fully-depleted semiconductor layer such that the part of the sidewalls of the fully-depleted semiconductor layer form channel regions of the semiconductor device, and forming a gate electrode layer covering the gate dielectric layer.
摘要翻译：公开了半导体器件的制造工艺。该方法包括提供半导体衬底，其具有形成在半导体衬底上的第一绝缘层和形成在第一绝缘层的表面上的鳍，以及在鳍的侧壁上形成完全耗尽的半导体层，以及完全耗尽的半导体层具有不同于翅片的材料。该方法还包括形成覆盖完全耗尽的半导体层的第二绝缘层，以及去除鳍以形成暴露完全耗尽的半导体层的侧壁的开口。此外，该方法包括在完全耗尽的半导体层的侧壁的一部分上形成栅极电介质层，使得全部耗尽的半导体层的侧壁的一部分形成半导体器件的沟道区，并且形成栅电极层覆盖栅介电层。

8. 发明授权

US08610175B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08610175B2
公开(公告)日：2013-12-17
申请号：US13316217
申请日：2011-12-09
申请人： Zhongshan Hong , Huojin Tu
发明人： Zhongshan Hong , Huojin Tu
IPC分类号： H01L31/06
CPC分类号： H01L29/165 , H01L21/02381 , H01L21/0243 , H01L21/0245 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L29/66636 , H01L29/7848
摘要： This invention relates to a semiconductor device and a manufacturing method thereof for reducing stacking faults caused by high content of Ge in an embedded SiGe structure. The semiconductor device comprises a Si substrate with a recess formed therein. A first SiGe layer having a Ge content gradually increased from bottom to top is formed on the recess bottom, a SiGe seed layer is formed on sidewalls of the recess and a second SiGe layer having a constant content of Ge is formed on the first SiGe layer. The thickness of the first SiGe layer is less than the depth of the recess. The Ge content in the SiGe seed layer is less than the Ge content in the second SiGe layer and the Ge content at the upper surface of the first SiGe layer is less than or equal to the Ge content in the second SiGe layer.
摘要翻译：本发明涉及一种用于在嵌入式SiGe结构中减少Ge含量高的堆垛层错的半导体器件及其制造方法。半导体器件包括其中形成有凹部的Si衬底。在凹部底部形成具有从底部到顶部逐渐增加的Ge含量的第一SiGe层，在凹槽的侧壁上形成SiGe晶种层，并且在第一SiGe层上形成具有恒定Ge含量的第二SiGe层。第一SiGe层的厚度小于凹槽的深度。 SiGe种子层中的Ge含量小于第二SiGe层中的Ge含量，并且第一SiGe层的上表面处的Ge含量小于或等于第二SiGe层中的Ge含量。

9. 发明授权

US08563432B2 Method for forming through silicon via structure 有权
标题翻译：硅通孔结构形成方法
公开(公告)号：US08563432B2
公开(公告)日：2013-10-22
申请号：US13304268
申请日：2011-11-23
申请人： Zhongshan Hong
发明人： Zhongshan Hong
IPC分类号： H01L21/44 , H01L21/4763
CPC分类号： H01L21/76898
摘要： A method for forming a TSV structure includes providing a silicon substrate with an interlayer dielectric layer formed thereon, forming a hard mask structure including a first hard mask layer including a metal element on the interlayer dielectric layer and a second hard mask layer on the first hard mask layer; forming an opening through the hard mask structure and the interlayer dielectric layer, the opening has a bottom and sidewalls in the silicon substrate. The method further includes depositing an insulating material on the hard mask structure and on the bottom and the sidewalls of the opening, subsequently removing the insulating material and the second hard mask layer until the first hard mask layer is exposed, and filling a conductive material into the opening. The method also includes removing the conductive material and the first hard mask layer by a CMP process until the interlayer dielectric layer is exposed.
摘要翻译：形成TSV结构的方法包括：在硅衬底上形成有层间电介质层，形成硬掩模结构，该硬掩模结构包括在该层间绝缘层上包括金属元素的第一硬掩模层和第一硬掩模层掩模层; 通过硬掩模结构和层间电介质层形成开口，开口在硅衬底中具有底部和侧壁。所述方法还包括在所述硬掩模结构上以及所述开口的底部和所述侧壁上沉积绝缘材料，随后除去所述绝缘材料和所述第二硬掩模层直到所述第一硬掩模层露出，并将导电材料填充到开幕。该方法还包括通过CMP工艺去除导电材料和第一硬掩模层，直到暴露层间电介质层。

10. 发明申请

US20120326320A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120326320A1
公开(公告)日：2012-12-27
申请号：US13307766
申请日：2011-11-30
申请人： Zhongshan Hong
发明人： Zhongshan Hong
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L21/76898 , H01L24/05 , H01L2924/13091 , H01L2924/00
摘要： The present invention relates to a semiconductor device and the manufacturing method thereof. First, a hole is formed on a first side of a substrate. Then, an isolation layer is formed on an inner side of the hole and the hole is filled with a semiconductor material. Next, functional structures are formed on the first side of the substrate, the substrate is thinned from its second side opposite to the first side to expose the semiconductor material in the hole, and then the semiconductor material in the hole is removed to form a through hole penetrating through the substrate. The through hole is filled with a conductive material, thereby obtaining a final through substrate via (TSV) for facilitating electrical connection between different chips. By using a semiconductor material as TSV dummy material before filling the TSV with metal, the method can be better compatible with the standard process flow.
摘要翻译：半导体器件及其制造方法技术领域本发明涉及半导体器件及其制造方法。首先，在基板的第一面上形成孔。然后，在孔的内侧形成隔离层，并且填充有半导体材料。接下来，在基板的第一侧上形成功能结构，从与第一侧相反的第二侧减薄基板，露出孔内的半导体材料，然后去除孔内的半导体材料，形成通孔穿透衬底的孔。通孔填充有导电材料，从而获得最终通过衬底通孔（TSV），以促进不同芯片之间的电连接。通过在用金属填充TSV之前使用半导体材料作为TSV虚拟材料，该方法可以更好地与标准工艺流程兼容。

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