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1. 发明申请

US20060267172A1 Memory-Module Board Layout for Use With Memory Chips of Different Data Widths 有权
标题翻译：内存模块板布局，用于不同数据宽度的内存芯片
公开(公告)号：US20060267172A1
公开(公告)日：2006-11-30
申请号：US10908718
申请日：2005-05-24
申请人： Henry Nguyen , Mark Burlington
发明人： Henry Nguyen , Mark Burlington
IPC分类号： H01L23/02
CPC分类号： G11C5/04 , G11C8/12 , G11C2029/1804 , H01L2924/0002 , H05K1/181 , H05K2201/09245 , H05K2201/09954 , H05K2201/10689 , H05K2203/1572 , Y02P70/611 , H01L2924/00
摘要： A memory module substrate printed-circuit board (PCB) has multi-type footprints and an edge connector for mating with a memory module socket on a motherboard. Two or more kinds of dynamic-random-access memory (DRAM) chips with different data I/O widths can be soldered to solder pads around the multi-type footprints. When ×4 DRAM chips with 4 data I/O pins are soldered over the multi-type footprints, the memory module has a rank-select signal that drives chip-select inputs to all DRAM chips. When ×8 DRAM chips with 8 data I/O pins are soldered over the multi-type footprints, the memory module has two rank-select signals. One rank-select drives chip-select inputs to front-side DRAM chips while the second rank-select drives chip-select inputs to back-side DRAM chips. Wiring traces on the PCB cross-over data nibbles between the solder pads and the connector to allow two ×4 chips to drive a byte driven by only one ×8 chip.
摘要翻译：存储器模块基板印刷电路板（PCB）具有多种类型的印迹和用于与主板上的存储器模块插座配合的边缘连接器。可以将具有不同数据I / O宽度的两种或更多种动态随机存取存储器（DRAM）芯片焊接到多类型脚印周围的焊盘。当具有4个数据I / O引脚的x4 DRAM芯片通过多种封装焊接时，存储器模块具有驱动芯片选择输入到所有DRAM芯片的等级选择信号。当具有8个数据I / O引脚的x8 DRAM芯片通过多种封装焊接时，存储器模块具有两个等级选择信号。一级选择驱动芯片选择输入到前端DRAM芯片，而第二级选择驱动芯片选择输入到后端DRAM芯片。 PCB交叉数据上的接线迹线在焊盘和连接器之间勉强化，以允许两个x4芯片驱动一个仅由一个x8芯片驱动的字节。

2. 发明授权

US09167696B2 Low profile memory module 有权
标题翻译：低调内存模块
公开(公告)号：US09167696B2
公开(公告)日：2015-10-20
申请号：US14094605
申请日：2013-12-02
申请人： Mark Kuanyu Cheng , Mark Burlington , Henry Hai Dang Nguyen
发明人： Mark Kuanyu Cheng , Mark Burlington , Henry Hai Dang Nguyen
IPC分类号： H01R9/00 , H05K1/18 , G06F1/16 , H05K1/14 , H01R12/71
CPC分类号： H05K1/141 , H01R12/716 , H05K2201/10159 , H05K2201/10189
摘要： An electronic component module according to an embodiment of the present invention includes a printed circuit board including a low-profile plug and at least one memory component thereon, and a connector for connecting the printed circuit board to a motherboard, the connector being mateable with the plug on the printed circuit board and having a z-height of no more than about 1.5 mm. The low-profile plug includes one hundred seventy pins and the number of pins allocated for VSS is no more than twenty-two and the number of pins allocated for VDD is no more than sixteen. Further, the low-profile plug includes an insulative portion protruding from a surface of the printed circuit board and having a “”-like or inverted “”-like profile in its center. The connector includes two sub-connectors, and an insulative portion having a “”-like or inverted “m”-like profile in the center.
摘要翻译：根据本发明实施例的电子部件模块包括：印刷电路板，包括薄型插头及其上的至少一个存储部件;以及用于将印刷电路板连接到主板的连接器，所述连接器可与插上印刷电路板，并具有不超过约1.5毫米的z高度。低端插头包括一百七十个引脚，分配给VSS的引脚数不超过二十二个，分配给VDD的引脚数不超过十六个。此外，低剖面插头包括从印刷电路板的表面突出并且在其中心具有“类似或倒置”状的绝缘部分。连接器包括两个子连接器和在中心具有“”状或倒“m”状轮廓的绝缘部分。

3. 发明授权

US07414312B2 Memory-module board layout for use with memory chips of different data widths 有权
标题翻译：内存模块板布局，用于不同数据宽度的内存芯片
公开(公告)号：US07414312B2
公开(公告)日：2008-08-19
申请号：US10908718
申请日：2005-05-24
申请人： Henry H. D. Nguyen , Mark Burlington
发明人： Henry H. D. Nguyen , Mark Burlington
IPC分类号： H01L23/34 , H05K7/00 , G11C5/06
CPC分类号： G11C5/04 , G11C8/12 , G11C2029/1804 , H01L2924/0002 , H05K1/181 , H05K2201/09245 , H05K2201/09954 , H05K2201/10689 , H05K2203/1572 , Y02P70/611 , H01L2924/00
摘要： A memory module substrate printed-circuit board (PCB) has multi-type footprints and an edge connector for mating with a memory module socket on a motherboard. Two or more kinds of dynamic-random-access memory (DRAM) chips with different data I/O widths can be soldered to solder pads around the multi-type footprints. When ×4 DRAM chips with 4 data I/O pins are soldered over the multi-type footprints, the memory module has a rank-select signal that drives chip-select inputs to all DRAM chips. When ×8 DRAM chips with 8 data I/O pins are soldered over the multi-type footprints, the memory module has two rank-select signals. One rank-select drives chip-select inputs to front-side DRAM chips while the second rank-select drives chip-select inputs to back-side DRAM chips. Wiring traces on the PCB cross-over data nibbles between the solder pads and the connector to allow two ×4 chips to drive a byte driven by only one ×8 chip.
摘要翻译：存储器模块基板印刷电路板（PCB）具有多种类型的印迹和用于与主板上的存储器模块插座配合的边缘连接器。可以将具有不同数据I / O宽度的两种或更多种动态随机存取存储器（DRAM）芯片焊接到多类型脚印周围的焊盘。当具有4个数据I / O引脚的x4 DRAM芯片通过多种封装焊接时，存储器模块具有驱动芯片选择输入到所有DRAM芯片的等级选择信号。当具有8个数据I / O引脚的x8 DRAM芯片通过多种封装焊接时，存储器模块具有两个等级选择信号。一级选择驱动芯片选择输入到前端DRAM芯片，而第二级选择驱动芯片选择输入到后端DRAM芯片。 PCB交叉数据上的接线迹线在焊盘和连接器之间勉强化，以允许两个x4芯片驱动一个仅由一个x8芯片驱动的字节。

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