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    • 5. 发明授权
    • Stochastic beating time-to-digital converter (TDC)
    • 随机抖动时间 - 数字转换器(TDC)
    • US08773182B1
    • 2014-07-08
    • US13756670
    • 2013-02-01
    • Ofir DeganiAshoke RaviHasnain LakdawalaRotem Banin
    • Ofir DeganiAshoke RaviHasnain LakdawalaRotem Banin
    • H03L7/06
    • H03L7/085G04F10/005H03L2207/50
    • A stochastic beating time-to-digital converter (TDC) can include triggered ring oscillator (TRO) and a stochastic TDC (sTDC). The TRO, when triggered by a reference signal edge, can generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The TRO period can be greater than or less than the VCO period by the specified ratio. The sTDC with an event triggered memory can include an sTDC component with a plurality of groups of latches. Each group of latches can be configured to sample and store a VCO state at an edge of a TRO signal. The sTDC component can trigger a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge.
    • 随机抖动时间 - 数字转换器(TDC)可以包括触发环形振荡器(TRO)和随机TDC(sTDC)。 当由参考信号沿触发时,TRO可以产生具有作为压控振荡器(VCO)周期的选定比率的TRO周期的周期性TRO信号。 TRO周期可以大于或小于VCO周期的指定比率。 具有事件触发的存储器的sTDC可以包括具有多组锁存器的sTDC组件。 每组锁存器可以配置为在TRO信号的边沿采样和存储VCO状态。 当锁存器组中的一个锁存器转变为被称为过渡沿的不同数字状态时,sTDC组件可以触发锁存器组的选定数量的VCO状态的捕获。
    • 8. 发明申请
    • Digital Voltage Ramp Generator
    • 数字电压斜坡发生器
    • US20150116012A1
    • 2015-04-30
    • US14066961
    • 2013-10-30
    • Hasnain LakdawalaEshel GordonOfir DeganiAshoke RaviThomas W. Brown
    • Hasnain LakdawalaEshel GordonOfir DeganiAshoke RaviThomas W. Brown
    • H03K4/12
    • H03K4/12H03K4/48H03K4/502
    • According to some embodiments, an all digital ramp generator may use a string of series connected delays or digital to time-based circuits to perform voltage ramp generation. Thus in some embodiments conventional operational amplifier circuits and relaxation oscillators may be replaced for generating triangular ramp waveforms for DC to DC or direct time-based DC to DC converters. The use of delay lines may produce sufficient resolution for many applications. Thus time domain techniques may afford a more digital approach that scales with process technology and allows high speed operation in some embodiments. A design based on use of inverters and capacitors may scale well with process technology. The decoder and drive logic may be integrated into the voltage ramp generation in some embodiments.
    • 根据一些实施例,全数字斜坡发生器可以使用串联连接的延迟串或数字到基于时间的电路来执行电压斜坡生成。 因此,在一些实施例中,常规运算放大器电路和弛豫振荡器可以被替换以产生用于直流到直流或直接基于时间的直流到直流转换器的三角形斜坡波形。 使用延迟线可以为许多应用产生足够的分辨率。 因此,时域技术可以提供与数字处理技术相比较的数字化方法,并且在一些实施例中允许高速操作。 基于逆变器和电容器的设计可以与工艺技术相结合。 在一些实施例中,解码器和驱动逻辑可以集成到电压斜坡生成中。