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1. 发明申请

US20070008208A1 Filter with gain 有权
公开(公告)号：US20070008208A1
公开(公告)日：2007-01-11
申请号：US11178625
申请日：2005-07-11
申请人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan Andersson , Krishnamurthy Soumyanath
发明人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan Andersson , Krishnamurthy Soumyanath
IPC分类号： H03M1/12
CPC分类号： H03H15/02
摘要： Embodiments of a filter with gain are presented herein.

2. 发明授权

US07212141B2 Filter with gain 有权
标题翻译：过滤增益
公开(公告)号：US07212141B2
公开(公告)日：2007-05-01
申请号：US11178625
申请日：2005-07-11
申请人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan H. Andersson , Krishnamurthy Soumyanath
发明人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan H. Andersson , Krishnamurthy Soumyanath
IPC分类号： H03M1/84 , H03M1/62
CPC分类号： H03H15/02
摘要： Embodiments of a filter with gain are presented herein.
摘要翻译：本文给出了具有增益的滤波器的实施例。

3. 发明申请

US20150181643A1 DIRECT DIGITAL FREQUENCY GENERATION USING TIME AND AMPLITUDE 有权
标题翻译：使用时间和幅度的直接数字频率生成
公开(公告)号：US20150181643A1
公开(公告)日：2015-06-25
申请号：US14138508
申请日：2013-12-23
申请人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Bernd-Ulrich Klepser , Zdravko Boos , Georgios Palaskas , Stefano Pellerano , Paolo Madoglio
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Bernd-Ulrich Klepser , Zdravko Boos , Georgios Palaskas , Stefano Pellerano , Paolo Madoglio
IPC分类号： H04W88/06 , H04L27/20 , H04B7/06
CPC分类号： H04L7/033 , H03K2005/00234 , H03L7/16 , H04B7/0413 , H04B7/06 , H04L27/152 , H04L27/1525 , H04L27/20 , H04W88/06
摘要： This application discusses, among other things, apparatus and methods for sharing a local oscillator between multiple wireless devices. In certain examples, an apparatus can include a central frequency synthesizer configured to provide a central oscillator signal having a first frequency, a first transmitter, the first transmitter including a first transmit digital-to-time converter (DTC) configured to receive the central oscillator signal and to provide a first transmitter signal having a second frequency, and a first receiver, the first receiver including a first receive DTC configured to receive the central oscillator signal and to provide a first receiver signal having a first receive frequency.
摘要翻译：本应用程序还讨论了用于在多个无线设备之间共享本地振荡器的装置和方法。在某些示例中，装置可以包括配置成提供具有第一频率的中心振荡器信号的中央频率合成器，第一发射机，第一发射机包括被配置为接收中心振荡器的第一发射数字 - 时间转换器（DTC）并且提供具有第二频率的第一发射机信号和第一接收机，所述第一接收机包括被配置为接收中心振荡器信号并提供具有第一接收频率的第一接收机信号的第一接收DTC。

4. 发明申请

US20090039981A1 System and Method for Controlling Resonance Frequency of Film Bulk Acoustic Resonator Devices 有权
标题翻译：用于控制膜体积声谐振器器件的谐振频率的系统和方法
公开(公告)号：US20090039981A1
公开(公告)日：2009-02-12
申请号：US11836538
申请日：2007-08-09
申请人： Hiroyuki Ito , Hasnain Lakdawala , Ashoke Ravi , Krishnamurthy Soumyanath
发明人： Hiroyuki Ito , Hasnain Lakdawala , Ashoke Ravi , Krishnamurthy Soumyanath
IPC分类号： H03H9/13
CPC分类号： H03H19/004 , H03H9/02007 , H03H2009/02204
摘要： Disclosed is a system and method for controlling a resonance frequency of a Film Bulk Acoustic Resonator (FBAR) device. The system includes at least one switching capacitor coupled to the FBAR device and a modulator. The at least one switching capacitor includes at least one capacitor and a switch configuration disposed in series with the FBAR device and the at least one capacitor, which is switch configuration capable of opening and closing connection of the at least one capacitor with the FBAR device. The modulator is coupled to the switch configuration, which generates a switching condition signal based on the manufacturing variation in the FBAR device and the environmental effects on the FBAR device. The switch configuration performs opening and closing of the connection of the at least one capacitor and the FBAR device based on the switching condition signal.
摘要翻译：公开了一种用于控制膜体声波谐振器（FBAR）装置的谐振频率的系统和方法。该系统包括耦合到FBAR器件和调制器的至少一个开关电容器。所述至少一个开关电容器包括至少一个电容器和与所述FBAR器件和所述至少一个电容器串联布置的开关配置，所述至少一个电容器是能够打开和关闭所述至少一个电容器与所述FBAR器件的连接的开关配置。调制器耦合到开关配置，其根据FBAR器件的制造变化和对FBAR器件的环境影响产生开关条件信号。开关配置基于开关条件信号来执行至少一个电容器和FBAR器件的连接的打开和闭合。

5. 发明申请

US20050220003A1 Transceiver with calibrated I and Q paths and methods for deconvolved calibration 有权
标题翻译：具有校准I和Q路径的收发器以及用于去卷积校准的方法
公开(公告)号：US20050220003A1
公开(公告)日：2005-10-06
申请号：US10815138
申请日：2004-03-31
申请人： Georgios Palaskas , Ashoke Ravi , Jeyanandh Paramesh , Richard Nicholls , Krishnamurthy Soumyanath
发明人： Georgios Palaskas , Ashoke Ravi , Jeyanandh Paramesh , Richard Nicholls , Krishnamurthy Soumyanath
IPC分类号： H04B1/30 , H04B1/40 , H04B15/00
CPC分类号： H04B1/30 , H04B1/40
摘要： Phase and amplitude offsets of a multicarrier transceiver may be reduced by measuring receiver amplitude and phase mismatches of receiver radio-frequency (RF) circuitry by performing a fast Fourier transform (FFT) on a receiver calibration signal.
摘要翻译：可以通过在接收机校准信号上执行快速傅立叶变换（FFT）来测量接收机射频（RF）电路的接收机幅度和相位失配来减少多载波收发器的相位和幅度偏移。

6. 发明授权

US07719389B2 System and method for controlling resonance frequency of film bulk acoustic resonator devices 有权
标题翻译：用于控制膜体声波谐振器装置的谐振频率的系统和方法
公开(公告)号：US07719389B2
公开(公告)日：2010-05-18
申请号：US11836538
申请日：2007-08-09
申请人： Hiroyuki Ito , Hasnain Lakdawala , Ashoke Ravi , Krishnamurthy Soumyanath
发明人： Hiroyuki Ito , Hasnain Lakdawala , Ashoke Ravi , Krishnamurthy Soumyanath
IPC分类号： H03H3/04 , H03H9/02
CPC分类号： H03H19/004 , H03H9/02007 , H03H2009/02204
摘要： Disclosed is a system and method for controlling a resonance frequency of a Film Bulk Acoustic Resonator (FBAR) device. The system includes at least one switching capacitor coupled to the FBAR device and a modulator. The at least one switching capacitor includes at least one capacitor and a switch configuration disposed in series with the FBAR device and the at least one capacitor, which is switch configuration capable of opening and closing connection of the at least one capacitor with the FBAR device. The modulator is coupled to the switch configuration, which generates a switching condition signal based on the manufacturing variation in the FBAR device and the environmental effects on the FBAR device. The switch configuration performs opening and closing of the connection of the at least one capacitor and the FBAR device based on the switching condition signal.
摘要翻译：公开了一种用于控制膜体声波谐振器（FBAR）装置的谐振频率的系统和方法。该系统包括耦合到FBAR器件和调制器的至少一个开关电容器。所述至少一个开关电容器包括至少一个电容器和与所述FBAR器件和所述至少一个电容器串联布置的开关配置，所述至少一个电容器是能够打开和关闭所述至少一个电容器与所述FBAR器件的连接的开关配置。调制器耦合到开关配置，其根据FBAR器件的制造变化和对FBAR器件的环境影响产生开关条件信号。开关配置基于开关条件信号来执行至少一个电容器和FBAR器件的连接的打开和闭合。

7. 发明授权

US07333423B2 Transceiver with calibrated I and Q paths and methods for deconvolved calibration 有权
标题翻译：具有校准I和Q路径的收发器以及用于去卷积校准的方法
公开(公告)号：US07333423B2
公开(公告)日：2008-02-19
申请号：US10815138
申请日：2004-03-31
申请人： Georgios Palaskas , Ashoke Ravi , Jeyanandh K. Paramesh , Richard B. Nicholls , Krishnamurthy Soumyanath
发明人： Georgios Palaskas , Ashoke Ravi , Jeyanandh K. Paramesh , Richard B. Nicholls , Krishnamurthy Soumyanath
IPC分类号： H04J11/00 , H04B1/38 , H04B1/10 , H04B1/26
CPC分类号： H04B1/30 , H04B1/40
摘要： Phase and amplitude offsets of a multicarrier transceiver may be reduced by measuring receiver amplitude and phase mismatches of receiver radio-frequency (RF) circuitry by performing a fast Fourier transform (FFT) on a receiver calibration signal.
摘要翻译：可以通过在接收机校准信号上执行快速傅立叶变换（FFT）来测量接收机射频（RF）电路的接收机幅度和相位失配来减少多载波收发器的相位和幅度偏移。

8. 发明申请

US20070002722A1 Device, system and method of crosstalk cancellation 审中-公开
标题翻译：串扰消除的装置，系统和方法
公开(公告)号：US20070002722A1
公开(公告)日：2007-01-04
申请号：US11170790
申请日：2005-06-30
申请人： Georgios Palaskas , Ashoke Ravi , Brent Carlton , Richard Nicholls , Stanley Ling , Krishnamurthy Soumyanath , Nati Dinur
发明人： Georgios Palaskas , Ashoke Ravi , Brent Carlton , Richard Nicholls , Stanley Ling , Krishnamurthy Soumyanath , Nati Dinur
IPC分类号： H04J3/10 , H04J3/22
CPC分类号： H04B7/0613
摘要： Briefly, some embodiments of the invention provide devices, systems and methods of crosstalk cancellation. For example, an apparatus may include a first transmission path to carry a first signal with information to be transmitted; a second transmission path to carry a second signal with information to be transmitted; a scaler associated with said first transmission path to scale said first signal into a scaled first signal; and a combiner to combine said scaled first signal and said second signal into a combined second signal on said second transmission path.
摘要翻译：简而言之，本发明的一些实施例提供了串扰消除的设备，系统和方法。例如，装置可以包括用于携带具有要发送的信息的第一信号的第一传输路径; 第二传输路径，用于携带要传输的信息的第二信号; 与所述第一传输路径相关联的缩放器，以将所述第一信号缩放成缩放的第一信号; 以及组合器，用于将所述缩放的第一信号和所述第二信号组合成所述第二传输路径上的组合的第二信号。

9. 发明授权

US08773182B1 Stochastic beating time-to-digital converter (TDC) 失效
标题翻译：随机抖动时间 - 数字转换器（TDC）
公开(公告)号：US08773182B1
公开(公告)日：2014-07-08
申请号：US13756670
申请日：2013-02-01
申请人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala , Rotem Banin
发明人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala , Rotem Banin
IPC分类号： H03L7/06
CPC分类号： H03L7/085 , G04F10/005 , H03L2207/50
摘要： A stochastic beating time-to-digital converter (TDC) can include triggered ring oscillator (TRO) and a stochastic TDC (sTDC). The TRO, when triggered by a reference signal edge, can generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The TRO period can be greater than or less than the VCO period by the specified ratio. The sTDC with an event triggered memory can include an sTDC component with a plurality of groups of latches. Each group of latches can be configured to sample and store a VCO state at an edge of a TRO signal. The sTDC component can trigger a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge.
摘要翻译：随机抖动时间 - 数字转换器（TDC）可以包括触发环形振荡器（TRO）和随机TDC（sTDC）。当由参考信号沿触发时，TRO可以产生具有作为压控振荡器（VCO）周期的选定比率的TRO周期的周期性TRO信号。 TRO周期可以大于或小于VCO周期的指定比率。具有事件触发的存储器的sTDC可以包括具有多组锁存器的sTDC组件。每组锁存器可以配置为在TRO信号的边沿采样和存储VCO状态。当锁存器组中的一个锁存器转变为被称为过渡沿的不同数字状态时，sTDC组件可以触发锁存器组的选定数量的VCO状态的捕获。

10. 发明申请

US20130271305A1 RESISTOR-BASED SIGMA-DELTA DAC 有权
标题翻译：基于电阻的SIGMA-DELTA DAC
公开(公告)号：US20130271305A1
公开(公告)日：2013-10-17
申请号：US13995156
申请日：2011-09-30
申请人： Hyung Seok Kim , Yee W. Li , Ashoke Ravi , Hasnain Lakdawala
发明人： Hyung Seok Kim , Yee W. Li , Ashoke Ravi , Hasnain Lakdawala
IPC分类号： H03M3/00 , H03M1/78
CPC分类号： H03M3/50 , G09G3/3688 , H03M1/00 , H03M1/0863 , H03M1/12 , H03M1/747 , H03M1/785 , H03M1/808 , H03M3/30 , H03M3/502
摘要： An inverter-driven resistor-ladder digital-to-analog (DAC) converter includes a resistor-ladder network that comprises a resistor for each bit signal of a multi-bit input signal. Each resistor of the resistor-ladder network comprises an input end and an output end. The input end of each resistor is coupled to a corresponding bit signal of the multi-bit input signal, and the output end of each resistor is coupled to an output node of the resistor-ladder network. An output voltage is generated at the output node that is based on the multi-bit input signal. In one exemplary embodiment, the multi-bit input signal is a sigma-delta (ΣΔ) modulated multi-bit input signal. In another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are related by a binary weighting. In still another exemplary embodiment, resistance values of the resistors of the resistor-ladder network are substantially equal.
摘要翻译：逆变器驱动的电阻梯形数模（DAC）转换器包括一个电阻梯形网络，包括一个多位输入信号的每个位信号的电阻。电阻梯形网络的每个电阻器包括输入端和输出端。每个电阻器的输入端耦合到多位输入信号的对应位信号，并且每个电阻器的输出端耦合到电阻梯形网络的输出节点。在输出节点处产生基于多位输入信号的输出电压。在一个示例性实施例中，多位输入信号是Σ-Δ（SigmaDelta）调制的多位输入信号。在另一示例性实施例中，电阻梯形网络的电阻器的电阻值通过二进制加权相关。在又一示例性实施例中，电阻梯形网络的电阻器的电阻值基本相等。

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