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1. 发明授权

US6060913A Electrical system with small signal suppression circuitry 失效
标题翻译：具有小信号抑制电路的电气系统
公开(公告)号：US6060913A
公开(公告)日：2000-05-09
申请号：US918307
申请日：1997-08-26
申请人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
发明人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
IPC分类号： F02P5/15
CPC分类号： F02D35/027 , F02D41/28 , F02D2041/1432
摘要： In systems embodying the invention, circuitry responsive to first and second, complementary, input signals controls the application of the input signals to a positive signal integrator and to a negative signal integrator. When the amplitude of the input signals is greater than a predetermined value, the one of the two input signals which is positive relative to the other is applied to the positive signal integrator and the other one of the two input signals is applied to the negative signal integrator. When the amplitude of the input signals is smaller than a predetermined level, the circuitry causes the periodic application of the first input signal to the positive signal integrator and the second input signal to the negative signal integrator during one time interval, and the periodic application of the first input signal to the negative signal integrator and the second input signal to the positive signal integrator during a second, subsequent, time interval of similar duration as the one time interval.
摘要翻译：在体现本发明的系统中，响应于第一和第二互补输入信号的电路控制输入信号施加到正信号积分器和负信号积分器。当输入信号的幅度大于预定值时，相对于另一个输入信号为正的两个输入信号中的一个被施加到正信号积分器，并且两个输入信号中的另一个被施加到负信号集成商当输入信号的幅度小于预定电平时，电路使得在一个时间间隔内将第一输入信号周期性地应用于正信号积分器和第二输入信号到负信号积分器，并且周期性地施加在与一个时间间隔相似的持续时间的第二后续时间间隔期间，将负信号积分器的第一输入信号和到第二输入信号的正信号积分器。

2. 发明授权

US4012668A Ground fault and neutral fault detection circuit 失效
标题翻译：接地故障和中性故障检测电路
公开(公告)号：US4012668A
公开(公告)日：1977-03-15
申请号：US534915
申请日：1974-12-20
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： G01R31/02 , H02H3/17 , H02H3/33 , H02H3/28
CPC分类号： G01R31/025 , H02H3/17 , H02H3/331
摘要： A circuit is disclosed for detecting ground faults and neutral faults and for providing power interruption in response thereto. The circuit monitors the current flow in the line and neutral conductors and provides a signal to a power interruption circuit in the event that a ground fault or a neutral fault condition is detected. In addition, a signal having a certain frequency is generated and coupled on the neutral line to enhance the probability of detecting neutral faults.
摘要翻译：公开了一种用于检测接地故障和中性故障并且响应于此而提供电力中断的电路。该电路监测线路和中性导体中的电流，并在检测到接地故障或中性故障状况的情况下向电源中断电路提供信号。另外，产生具有一定频率的信号并且耦合在中性线上以增强检测中性故障的可能性。

3. 发明授权

US3996531A Oscillator circuit whose frequency is voltage controllable which contains a comparator 失效
标题翻译：振荡电路的频率是可控的，包含一个比较器
公开(公告)号：US3996531A
公开(公告)日：1976-12-07
申请号：US642241
申请日：1975-12-18
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： H03K3/0231 , H03K7/06 , H03K3/02
CPC分类号： H03K7/06 , H03K3/0231
摘要： An oscillator utilizing a voltage comparator having hysteresis characteristics for producing a pulse train. The width of the pulses in the train is controlled by the charging rate of a capacitor coupled to one input of the comparator and the period of the pulse train is controlled by the discharge rate of this capacitor. The discharge rate and hence the oscillator frequency may be varied in response to a control voltage. Compensating elements ensure that the pulse width is highly stable with respect to temperature variations. The oscillator when in a feedback control circuit, produces oscillations at a frequency whose value is linearly related to the feedback control voltage.
摘要翻译：利用具有用于产生脉冲串的滞后特性的电压比较器的振荡器。列车中的脉冲宽度由耦合到比较器的一个输入端的电容器的充电速率控制，脉冲串的周期由该电容器的放电速率控制。放电速率和因此的振荡器频率可以响应于控制电压而变化。补偿元件确保脉冲宽度相对于温度变化高度稳定。在反馈控制电路中的振荡器产生的频率与其反馈控制电压线性相关的频率产生振荡。

4. 发明授权

US06798260B1 Margining pin interface and control circuit 失效
标题翻译：边缘引脚接口和控制电路
公开(公告)号：US06798260B1
公开(公告)日：2004-09-28
申请号：US10379140
申请日：2003-03-04
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： H03L706
CPC分类号： G05F3/262
摘要： A voltage margin circuit has an input that receives a control voltage for programming an output reference voltage. The control voltage is coupled through an input resistor to an operational amplifier, referenced to a voltage midway between the voltage range of the input voltage and having its output coupled to a pair of transistors, whose current flow paths are coupled to inputs of a first pair of current mirrors. Outputs of the first current mirrors pair are cross-coupled to inputs of a second current mirrors pair. Outputs of the second current mirror pair are coupled through an output resistor to a prescribed voltage. The output reference voltage is the sum of the prescribed voltage and an offset as the product of the output resistor and an output current supplied by one of the third and fourth current mirrors.
摘要翻译：电压余量电路具有接收用于编程输出参考电压的控制电压的输入。控制电压通过输入电阻器耦合到运算放大器，参考输入电压的电压范围之间的中间电压，并且其输出耦合到一对晶体管，其电流流动路径耦合到第一对的输入的电流镜。第一电流镜对的输出交叉耦合到第二电流镜对的输入。第二电流镜对的输出通过输出电阻器耦合到规定的电压。输出参考电压是作为输出电阻和由第三和第四电流镜之一提供的输出电流的乘积的规定电压和偏移之和。

5. 发明授权

US5789949A Wide common mode range comparator and method 失效
标题翻译：宽共模范围比较器和方法
公开(公告)号：US5789949A
公开(公告)日：1998-08-04
申请号：US719873
申请日：1996-09-25
申请人： Raymond Louis Giordano , Harold Allen Wittlinger
发明人： Raymond Louis Giordano , Harold Allen Wittlinger
IPC分类号： H03F3/45 , H03K5/24 , H03K5/22
CPC分类号： H03F3/45183 , H03F3/45085 , H03F3/4517 , H03F3/45269 , H03K5/2418 , H03F2203/45094 , H03F2203/45658 , H03F2203/45664
摘要： A transconductance amplifier suitable for the input stage of a comparator with the capability of amplifying input signals with common mode voltage components in a range including the entirety of its operating voltage. Operation at one voltage extreme is accomplished by use of a long tailed pair connection of a pair of bulk modulated FETs with gates at the input terminals of the amplifier. Operation at the other voltage extreme is accomplished by the use of a pair of FETs in a source follower mode to drive common gate transistors of opposite polarity, the gates of the FETs also being connected to the input terminals of the amplifier. A common high impedance load for the comparator is connected to current mirrors of the drains of both pairs of FETs in the amplifier. The circuit may be implemented with bipolar transistors and additional amplification provided. Methods of comparing voltages are also disclosed.
摘要翻译：一种跨导放大器，适用于比较器的输入级，具有在包括其整个工作电压的范围内以共模电压分量放大输入信号的能力。通过使用一对体积调制FET的长尾对连接与放大器的输入端的栅极来实现在一个极端电压下的工作。通过使用源极跟随器模式中的一对FET来驱动具有相反极性的公共栅极晶体管来实现另一电压极限处的操作，FET的栅极也连接到放大器的输入端。用于比较器的常见高阻抗负载连接到放大器中两对FET的漏极的电流镜。该电路可以用双极晶体管实现并且提供额外的放大。还公开了比较电压的方法。

6. 发明授权

US3986132A Series energized transistor amplifier 失效
标题翻译：串联通电晶体管放大器
公开(公告)号：US3986132A
公开(公告)日：1976-10-12
申请号：US624897
申请日：1975-10-22
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： H03F3/42
CPC分类号： H03F3/423
摘要： A plurality of transistors are connected in series together with a load across a source of operating potential. A primary bias circuit coupled to the transistors apportions the voltage across each transistor under quiescent conditions. A supplementary bias circuit, activated when the potential across one of the transistors is within a given range, supplies additional bias to other of the transistors of the series circuit.
摘要翻译：多个晶体管与跨越工作电位的负载串联连接。耦合到晶体管的初级偏置电路在静态条件下分配每个晶体管的电压。当跨越一个晶体管的电位在给定范围内时激活的辅助偏置电路向串联电路的其它晶体管提供额外的偏置。

7. 发明授权

US06788229B1 Margining pin interface circuit for clock adjustment of digital to analog converter 失效
标题翻译：用于数模转换器时钟调整的裕度引脚接口电路
公开(公告)号：US06788229B1
公开(公告)日：2004-09-07
申请号：US10389374
申请日：2003-03-14
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： H03M100
CPC分类号： H03M1/002 , H03M1/66
摘要： A voltage margin setting interface circuit has a single input pin, and is configured to program the slew rate and polarity direction of variation of the operation of a digital-to-analog converter, such as may be used to set a reference voltage level, for application to an error amplifier of a voltage regulator circuit of the power supply of a personal computer. A DAC clocking control circuit is coupled to an output port, and to respective DAC increment and decrement ports, and is operative to control the magnitude of output current, and to assert an output signal at one of the increment and decrement ports, in accordance with a prescribed relationship between the voltage and upper and lower ranges of the input voltage relative to its middle value.
摘要翻译：电压余量设定接口电路具有单个输入引脚，并且被配置为对数/模转换器的操作变化的转换速率和极性方向进行编程，诸如可用于设置参考电压电平，以供应用于个人计算机的电源的电压调节器电路的误差放大器。 DAC时钟控制电路耦合到输出端口和相应的DAC增量和减小端口，并且可操作以控制输出电流的大小，并且根据增量和减量端口中的一个端口断言输出信号电压与输入电压的上下范围相对于其中间值的规定关系。

8. 发明授权

US06724233B1 Absolute value circuit 失效
标题翻译：绝对值电路
公开(公告)号：US06724233B1
公开(公告)日：2004-04-20
申请号：US10379139
申请日：2003-03-04
申请人： Harold Allen Wittlinger
发明人： Harold Allen Wittlinger
IPC分类号： G06G725
CPC分类号： G06G7/25
摘要： An absolute value circuit includes an operational amplifier, the output of which is coupled to control inputs of complementary polarity transistors having current flow paths therethrough coupled in series with inputs of current mirror amplifier stages. A common node of the current flow paths through the transistors is coupled to an input of the operational amplifier to which a current waveform is applied. The current mirror amplifier stages are configured so as to provide like polarity output currents. The outputs of the current mirror amplifier stages are combined to produce an output current that corresponds to a full wave rectification or absolute value of an input current coupled to the operational amplifier.
摘要翻译：绝对值电路包括运算放大器，其运算放大器耦合到具有与电流镜放大器级的输入串联耦合的电流流动通道的互补极性晶体管的控制输入。通过晶体管的电流流动路径的公共节点耦合到施加电流波形的运算放大器的输入。电流镜放大器级被配置为提供相似的极性输出电流。电流镜放大器级的输出被组合以产生对应于耦合到运算放大器的输入电流的全波整流或绝对值的输出电流。

9. 发明授权

US5942677A Knock sensor system for detecting and responding to a disconnect condition 失效
标题翻译：用于检测和响应断开状态的敲击传感器系统
公开(公告)号：US5942677A
公开(公告)日：1999-08-24
申请号：US931340
申请日：1997-09-16
申请人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
发明人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
IPC分类号： G01L23/22
CPC分类号： G01L23/225
摘要： Signals generated by a knock sensor are coupled to an electronic network for amplifying and processing the output signals of the knock sensor. The electronic network includes a device for charging a storage capacitor to a potential which is a function of the amplitude of the knock sensor output signal. The storage capacitor is coupled to the input of an amplifier via a normally closed first switch. A detector for sensing any disconnection of the knock sensor from the electronic system produces a control signal indicative of a disconnect condition. The control signal is used to open the normally closed first switch and to cause the input of the amplifier to be clamped to a reference potential which lies outside the signal range normally produced across the storage capacitor whereby the output of the output of the amplifier is placed at a predetermined level indicative of a disconnect condition. The amplifier thus produces signals at its output which are within a predetermined range during normal operation and a signal outside of this range in response to a knock sensor disconnect condition. Thus, a single line from the output amplifier carries regular normal signals and the disconnect signal lying outside the range of the normal signals.
摘要翻译：由爆震传感器产生的信号耦合到电子网络，用于放大和处理爆震传感器的输出信号。电子网络包括用于将存储电容器充电到与爆震传感器输出信号的幅度有关的电位的装置。存储电容器通过常闭的第一开关耦合到放大器的输入端。用于感测爆震传感器与电子系统的任何断开的检测器产生指示断开状态的控制信号。控制信号用于打开常闭的第一开关，并且使放大器的输入被钳位到参考电位，该参考电位位于通常在存储电容器两端产生的信号范围之外，从而放大放大器的输出端处于指示断开状态的预定水平。因此，放大器在其输出处产生在正常操作期间在预定范围内的信号，并且响应于爆震传感器断开状态而在该范围之外的信号。因此，来自输出放大器的单线承载常规的正常信号，断开信号位于正常信号的范围之外。

10. 发明授权

US5892375A Comparator with small signal suppression circuitry 失效
标题翻译：具有小信号抑制电路的比较器
公开(公告)号：US5892375A
公开(公告)日：1999-04-06
申请号：US918345
申请日：1997-08-26
申请人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
发明人： Salomon Vulih , Stephen J. Glica , Harold Allen Wittlinger
IPC分类号： H03K5/1252 , H03K5/24 , H03K5/22
CPC分类号： H03K5/249 , H03K5/1252 , H03K5/2481
摘要： A comparator circuit has first and second inputs and an output and includes means for operating the comparator in alternate autozero and comparator phases. During an autozero phase, the inputs of the comparator are clamped to a reference potential and during a compare phase, input signals are applied to the input of the comparator. Control signals are applied to the inputs of the comparator during a portion of the compare phase. The control signals determine the state of the comparator output when the input signals applied to the inputs of the comparator are below a predetermined level.
摘要翻译：比较器电路具有第一和第二输入和输出，并且包括用于在替代自动调零和比较器相位中操作比较器的装置。在自动调零阶段，比较器的输入被钳位到参考电位，而在比较阶段，输入信号被加到比较器的输入端。在比较阶段的一部分期间，控制信号被施加到比较器的输入。当施加到比较器的输入的输入信号低于预定电平时，控制信号确定比较器输出的状态。

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