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1. 发明授权

US08879643B2 Data substitution scheme for oversampled data 有权
标题翻译：过采样数据的数据替代方案
公开(公告)号：US08879643B2
公开(公告)日：2014-11-04
申请号：US12146324
申请日：2008-06-25
申请人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
IPC分类号： H04B14/04
CPC分类号： H04L1/0045 , G10L19/005 , H04L1/0057
摘要： Low latency and computationally efficient techniques may be employed to account for errors in data such as low bit-width, oversampled data. In some aspects these techniques may be employed to mitigate audio artifacts associated with sigma-delta modulated audio data. In some aspects an error may be detected in a set of encoded data based on an outcome of a channel decoding process. Upon determining that a set of data may contain at least one error, the set of data may be replaced with another set of data that is based on one or more neighboring data sets. For example, in some aspects a set of data including at least one bit in error may be replaced with data that is generated by applying a cross-fading operation to neighboring data sets. In some aspects a given data bit may be flipped as a result of a linear prediction operation that is applied to PCM equivalent data that is associated with the given data bit and its neighboring data bits. In some aspects a set of data including at least one bit in error may be replaced with data that is generated by performing linear interpolation operations on PCM equivalent data that is associated with neighboring data sets.
摘要翻译：可以采用低延迟和计算有效的技术来解决数据中的错误，例如低位宽度，过采样数据。在一些方面，可以采用这些技术来减轻与Σ-Δ调制音频数据相关联的音频伪影。在一些方面，可以基于信道解码过程的结果在一组编码数据中检测到错误。在确定一组数据可能包含至少一个错误时，可以用基于一个或多个相邻数据集的另一组数据替换该数据集。例如，在一些方面，包括至少一个错误位的一组数据可以由通过对相邻数据集应用交叉衰落操作而产生的数据代替。在一些方面，作为施加到与给定数据位及其相邻数据位相关联的PCM等效数据的线性预测操作的结果，可以翻转给定数据位。在一些方面，包括至少一个错误位的一组数据可以由通过对与相邻数据集相关联的PCM等效数据执行线性内插操作而产生的数据代替。

2. 发明申请

US20090259922A1 CHANNEL DECODING-BASED ERROR DETECTION 有权
标题翻译：基于信道解码的错误检测
公开(公告)号：US20090259922A1
公开(公告)日：2009-10-15
申请号：US12146301
申请日：2008-06-25
申请人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
IPC分类号： G06F11/07
CPC分类号： H04L1/0045 , G10L19/005 , H04L1/0057
摘要： Low latency and computationally efficient techniques may be employed to account for errors in data such as low bit-width, oversampled data. In some aspects these techniques may be employed to mitigate audio artifacts associated with sigma-delta modulated audio data. In some aspects an error may be detected in a set of encoded data based on an outcome of a channel decoding process. Upon determining that a set of data may contain at least one error, the set of data may be replaced with another set of data that is based on one or more neighboring data sets. For example, in some aspects a set of data including at least one bit in error may be replaced with data that is generated by applying a cross-fading operation to neighboring data sets. In some aspects a given data bit may be flipped as a result of a linear prediction operation that is applied to PCM equivalent data that is associated with the given data bit and its neighboring data bits. In some aspects a set of data including at least one bit in error may be replaced with data that is generated by performing linear interpolation operations on PCM equivalent data that is associated with neighboring data sets.
摘要翻译：可以采用低延迟和计算有效的技术来解决数据中的错误，例如低位宽度，过采样数据。在一些方面，可以采用这些技术来减轻与Σ-Δ调制音频数据相关联的音频伪影。在一些方面，可以基于信道解码过程的结果在一组编码数据中检测到错误。在确定一组数据可能包含至少一个错误时，可以用基于一个或多个相邻数据集的另一组数据替换该数据集。例如，在一些方面，包括至少一个错误位的一组数据可以由通过对相邻数据集应用交叉衰落操作而产生的数据代替。在一些方面，作为施加到与给定数据位及其相邻数据位相关联的PCM等效数据的线性预测操作的结果，可以翻转给定数据位。在一些方面，包括至少一个错误位的一组数据可以由通过对与相邻数据集相关联的PCM等效数据执行线性内插操作而产生的数据代替。

3. 发明授权

US08423852B2 Channel decoding-based error detection 有权
标题翻译：基于信道解码的错误检测
公开(公告)号：US08423852B2
公开(公告)日：2013-04-16
申请号：US12146301
申请日：2008-06-25
申请人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , David Jonathan Julian , Chinnappa K. Ganapathy
IPC分类号： H04L1/00 , G06F11/00
CPC分类号： H04L1/0045 , G10L19/005 , H04L1/0057
摘要： Low latency and computationally efficient techniques may be employed to account for errors in data such as low bit-width, oversampled data. In some aspects these techniques may be employed to mitigate audio artifacts associated with sigma-delta modulated audio data. In some aspects an error may be detected in a set of encoded data based on an outcome of a channel decoding process. Upon determining that a set of data may contain at least one error, the set of data may be replaced with another set of data that is based on one or more neighboring data sets. For example, in some aspects a set of data including at least one bit in error may be replaced with data that is generated by applying a cross-fading operation to neighboring data sets. In some aspects a given data bit may be flipped as a result of a linear prediction operation that is applied to PCM equivalent data that is associated with the given data bit and its neighboring data bits. In some aspects a set of data including at least one bit in error may be replaced with data that is generated by performing linear interpolation operations on PCM equivalent data that is associated with neighboring data sets.
摘要翻译：可以采用低延迟和计算有效的技术来解决数据中的错误，例如低位宽度，过采样数据。在一些方面，可以采用这些技术来减轻与Σ-Δ调制音频数据相关联的音频伪影。在一些方面，可以基于信道解码过程的结果在一组编码数据中检测到错误。在确定一组数据可能包含至少一个错误时，可以用基于一个或多个相邻数据集的另一组数据替换该数据集。例如，在一些方面，包括至少一个错误位的一组数据可以由通过对相邻数据集应用交叉衰落操作而产生的数据代替。在一些方面，作为施加到与给定数据位及其相邻数据位相关联的PCM等效数据的线性预测操作的结果，可以翻转给定数据位。在一些方面，包括至少一个错误位的一组数据可以由通过对与相邻数据集相关联的PCM等效数据执行线性内插操作而产生的数据代替。

4. 发明申请

US20090259671A1 SYNCHRONIZING TIMING MISMATCH BY DATA INSERTION 有权
标题翻译：通过数据插入同步时序错误
公开(公告)号：US20090259671A1
公开(公告)日：2009-10-15
申请号：US12118469
申请日：2008-05-09
申请人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
IPC分类号： G06F17/30
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05
摘要： The rate at which data is provided by one device and the rate at which that data is processed by another device may differ. For example, a transmitting device may transmit data according to a transmit clock while a receiving device that receives the transmitted data may process the data according to a receive clock. If there is a timing mismatch between the transmit and receive clocks, the receiving device may receive data faster or slower than it processes the data. In such a case, there may be errors relating to the processing of the received data. To address timing mismatches such as this, the receiving device may delete data from or insert data into the received data. In conjunction with these operations, the receiving device may modify the received data at or near the insertion point or the deletion point in a manner that mitigates any adverse effect the insertion or deletion may have on a resulting output signal.
摘要翻译：一个设备提供数据的速率和另一个设备处理该数据的速率可能不同。例如，发送装置可以根据发送时钟发送数据，而接收发送的数据的接收装置可以根据接收时钟处理数据。如果在发送和接收时钟之间存在定时不匹配，则接收设备可能比处理数据更快或更慢地接收数据。在这种情况下，可能存在与接收到的数据的处理有关的错误。为了解决诸如此的定时不匹配，接收设备可以从接收到的数据中删除数据或将数据插入到数据中。结合这些操作，接收设备可以以减轻插入或删除对结果输出信号可能产生的任何不利影响的方式在插入点或删除点处或附近修改接收到的数据。

5. 发明申请

US20100080331A1 METHOD AND APPARATUS FOR INTEGRATED CLOCK MISMATCH COMPENSATION AND PACKET LOSS CONCEALMENT 审中-公开
标题翻译：集成时钟误差补偿和分组丢失隐藏的方法和装置
公开(公告)号：US20100080331A1
公开(公告)日：2010-04-01
申请号：US12365357
申请日：2009-02-04
申请人： Harinath Garudadri , Rouzbeh Kashef , Somdeb Majumdar , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Rouzbeh Kashef , Somdeb Majumdar , Chinnappa K. Ganapathy
IPC分类号： H04L7/00
CPC分类号： H04J3/0632 , H04L7/005 , H04L12/6418
摘要： An apparatus and method for processing data are disclosed. The apparatus may include a receiver clock, and a processing system configured to use the receiver clock to receive data from a transmitter, the data being generated with a transmitter clock in the transmitter, wherein the processing system is further configured to estimate a mismatch between the transmitter and receiver clocks, and to determine whether to modify the data based on the estimated mismatch.
摘要翻译：公开了一种用于处理数据的装置和方法。所述设备可以包括接收器时钟，以及被配置为使用所述接收机时钟从所述发射机接收数据的处理系统，所述数据是利用所述发射机中的发射机时钟生成的，其中所述处理系统还被配置为：发射机和接收机时钟，并且基于估计的不匹配来确定是否修改数据。

6. 发明授权

US08589720B2 Synchronizing timing mismatch by data insertion 有权
标题翻译：通过数据插入同步定时不匹配
公开(公告)号：US08589720B2
公开(公告)日：2013-11-19
申请号：US12118469
申请日：2008-05-09
申请人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
IPC分类号： G06F1/04
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05
摘要： The rate at which data is provided by one device and the rate at which that data is processed by another device may differ. For example, a transmitting device may transmit data according to a transmit clock while a receiving device that receives the transmitted data may process the data according to a receive clock. If there is a timing mismatch between the transmit and receive clocks, the receiving device may receive data faster or slower than it processes the data. In such a case, there may be errors relating to the processing of the received data. To address timing mismatches such as this, the receiving device may delete data from or insert data into the received data. In conjunction with these operations, the receiving device may modify the received data at or near the insertion point or the deletion point in a manner that mitigates any adverse effect the insertion or deletion may have on a resulting output signal.
摘要翻译：一个设备提供数据的速率和另一个设备处理该数据的速率可能不同。例如，发送装置可以根据发送时钟发送数据，而接收发送的数据的接收装置可以根据接收时钟处理数据。如果在发送和接收时钟之间存在定时不匹配，则接收设备可能比处理数据更快或更慢地接收数据。在这种情况下，可能存在与接收到的数据的处理有关的错误。为了解决诸如此的定时不匹配，接收设备可以从接收到的数据中删除数据或将数据插入到数据中。结合这些操作，接收设备可以以减轻插入或删除对结果输出信号可能产生的任何不利影响的方式在插入点或删除点处或附近修改接收到的数据。

7. 发明申请

US20090259672A1 SYNCHRONIZING TIMING MISMATCH BY DATA DELETION 审中-公开
标题翻译：通过数据删除同步时序错误
公开(公告)号：US20090259672A1
公开(公告)日：2009-10-15
申请号：US12118583
申请日：2008-05-09
申请人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
发明人： Harinath Garudadri , Somdeb Majumdar , Rouzbeh Kashef , Chinnappa K. Ganapathy
IPC分类号： G06F17/30
CPC分类号： H04L7/0016 , G10L19/005 , H04L7/0029 , H04L7/005 , H04L25/05
摘要： The rate at which data is provided by one device and the rate at which that data is processed by another device may differ. For example, a transmitting device may transmit data according to a transmit clock while a receiving device that receives the transmitted data may process the data according to a receive clock. If there is a timing mismatch between the transmit and receive clocks, the receiving device may receive data faster or slower than it processes the data. In such a case, there may be errors relating to the processing of the received data. To address timing mismatches such as this, the receiving device may delete data from or insert data into the received data. In conjunction with these operations, the receiving device may modify the received data at or near the insertion point or the deletion point in a manner that mitigates any adverse effect the insertion or deletion may have on a resulting output signal.
摘要翻译：一个设备提供数据的速率和另一个设备处理该数据的速率可能不同。例如，发送装置可以根据发送时钟发送数据，而接收发送的数据的接收装置可以根据接收时钟处理数据。如果在发送和接收时钟之间存在定时不匹配，则接收设备可能比处理数据更快或更慢地接收数据。在这种情况下，可能存在与接收到的数据的处理有关的错误。为了解决诸如此的定时不匹配，接收设备可以从接收到的数据中删除数据或将数据插入到数据中。结合这些操作，接收设备可以以减轻插入或删除对结果输出信号可能产生的任何不利影响的方式在插入点或删除点处或附近修改接收到的数据。

8. 发明授权

US08290069B2 System and method to implement concurrent orthogonal channels in an ultra-wide band wireless communications network 失效
标题翻译：在超宽带无线通信网络中实现并发正交信道的系统和方法
公开(公告)号：US08290069B2
公开(公告)日：2012-10-16
申请号：US12246998
申请日：2008-10-07
申请人： Zhanfeng Jia , David Jonathan Julian , Qingjiang Tian , James W. Dolter , Vito R. Bica , Harinath Garudadri , Chinnappa K. Ganapathy
发明人： Zhanfeng Jia , David Jonathan Julian , Qingjiang Tian , James W. Dolter , Vito R. Bica , Harinath Garudadri , Chinnappa K. Ganapathy
IPC分类号： H04K1/10 , H04B7/02
CPC分类号： H04B1/7176 , H04B1/719 , H04B14/026 , H04B2001/6908
摘要： A system and method for media access control are disclosed. The method comprises providing concurrent orthogonal channels to access media using pulse division multiple access to define pulse positions, wherein the pulse division multiple access includes a time hopping sequence and an offset to distinguish the concurrent orthogonal channels. In addition, the method comprises processing signals associated with at least one of the orthogonal channels.
摘要翻译：公开了一种用于媒体访问控制的系统和方法。该方法包括提供并发的正交信道以使用脉冲多址来访问媒体以定义脉冲位置，其中脉冲多址包括跳时序列和偏移以区分并行正交信道。此外，该方法包括处理与至少一个正交信道相关联的信号。

9. 发明申请

US20100086073A1 SYSTEM AND METHOD TO IMPLEMENT CONCURRENT ORTHOGONAL CHANNELS IN AN ULTRA-WIDE BAND WIRELESS COMMUNICATIONS NETWORK 失效
标题翻译：在超宽带无线通信网络中实现同频正交信道的系统和方法
公开(公告)号：US20100086073A1
公开(公告)日：2010-04-08
申请号：US12246998
申请日：2008-10-07
申请人： Zhanfeng Jia , David Jonathan Julian , Qingjiang Tian , James W. Dolter , Vito R. Bica , Harinath Garudadri , Chinnappa K. Ganapathy
发明人： Zhanfeng Jia , David Jonathan Julian , Qingjiang Tian , James W. Dolter , Vito R. Bica , Harinath Garudadri , Chinnappa K. Ganapathy
IPC分类号： H04W74/00
CPC分类号： H04B1/7176 , H04B1/719 , H04B14/026 , H04B2001/6908
摘要： A system and method for media access control are disclosed. The method comprises providing concurrent orthogonal channels to access media using pulse division multiple access to define pulse positions, wherein the pulse division multiple access includes a time hopping sequence and an offset to distinguish the concurrent orthogonal channels. In addition, the method comprises processing signals associated with at least one of the orthogonal channels.
摘要翻译：公开了一种用于媒体访问控制的系统和方法。该方法包括提供并发的正交信道以使用脉冲多址来访问媒体以定义脉冲位置，其中脉冲多址包括跳时序列和偏移以区分并行正交信道。此外，该方法包括处理与至少一个正交信道相关联的信号。

10. 发明申请

US20080040413A1 IFFT PROCESSING IN WIRELESS COMMUNICATIONS 有权
标题翻译：无线通信中的IFFT处理
公开(公告)号：US20080040413A1
公开(公告)日：2008-02-14
申请号：US11612456
申请日：2006-12-18
申请人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
发明人： Jai N. Subrahmanyam , Chinnappa K. Ganapathy , Durk L. van Veen , Jinxia Bai , Kevin S. Cousineau , Seokyong Oh
IPC分类号： G06F15/00
CPC分类号： H04L27/2626
摘要： Techniques for performing IFFT pipelining are described. In some aspects, the pipelining is achieved with a processing system having a memory having first and second sections, an encoder configured to process data in each of the first and second memory sections, an IFFT configured to process the encoded data in the first and second memory sections, and a post-processor configured to process the IFFT processed data in the first memory section while the IFFT is processing the encoded data in the second memory section, the post processor configured to operate at a different clock speed than the encoder or the IFFT.
摘要翻译：描述了用于执行IFFT流水线的技术。在一些方面，流水线通过具有具有第一和第二部分的存储器的处理系统来实现，编码器被配置为处理第一和第二存储器部分中的每一个中的数据;被配置为处理第一和第二部分中的编码数据的IFFT 存储器部分和后处理器，其被配置为在IFFT处理第二存储器部分中的编码数据时处理第一存储器部分中的IFFT处理的数据，后处理器被配置为以与编码器不同的时钟速度操作 IFFT。

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