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1. 发明授权

US07018781B2 Method for fabricating a contact hole plane in a memory module 失效
标题翻译：用于在存储器模块中制造接触孔平面的方法
公开(公告)号：US07018781B2
公开(公告)日：2006-03-28
申请号：US10811509
申请日：2004-03-29
申请人： Hans-Georg Fröhlich , Oliver Genz , Werner Graf , Stefan Gruss , Matthias Handke , Percy Heger , Lars Heineck , Antje Laessig , Alexander Reb , Kristin Schupke , Momtchil Stavrev , Mirko Vogt
发明人： Hans-Georg Fröhlich , Oliver Genz , Werner Graf , Stefan Gruss , Matthias Handke , Percy Heger , Lars Heineck , Antje Laessig , Alexander Reb , Kristin Schupke , Momtchil Stavrev , Mirko Vogt
IPC分类号： G03F7/00
CPC分类号： H01L27/10888 , H01L21/76828 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76837 , H01L21/76897 , H01L27/10894
摘要： Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The methods can be utilized during the production of dynamic random access memory (DRAM) modules.
摘要翻译：公开了一种在具有选择晶体管的存储单元的布置的存储器模块中制造合同孔平面的方法。可以在生产动态随机存取存储器（DRAM）模块期间利用这些方法。

2. 发明申请

US20050003308A1 Method for fabricating a contact hole plane in a memory module 失效
标题翻译：用于在存储器模块中制造接触孔平面的方法
公开(公告)号：US20050003308A1
公开(公告)日：2005-01-06
申请号：US10811509
申请日：2004-03-29
申请人： Hans-Georg Frohlich , Oliver Genz , Werner Graf , Stefan Gruss , Matthias Handke , Percy Heger , Lars Heineck , Antje Laessig , Alexander Reb , Kristin Schupke , Momtchil Stavrev , Mirko Vogt
发明人： Hans-Georg Frohlich , Oliver Genz , Werner Graf , Stefan Gruss , Matthias Handke , Percy Heger , Lars Heineck , Antje Laessig , Alexander Reb , Kristin Schupke , Momtchil Stavrev , Mirko Vogt
IPC分类号： H01L21/60 , H01L21/768 , H01L21/8242 , G03F7/00
CPC分类号： H01L27/10888 , H01L21/76828 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L21/76837 , H01L21/76897 , H01L27/10894
摘要： In order to fabricate a contact hole plane in a memory module with an arrangement of memory cells each having a selection transistor, on a semiconductor substrate with an arrangement of mutually adjacent gate electrode tracks on the semiconductor surface, an insulator layer is formed on the semiconductor surface and a sacrificial layer is subsequently formed on the insulator layer, then material plugs are produced on the sacrificial layer for the purpose of defining contact openings between the mutually adjacent gate electrode tracks, the sacrificial layer is etched to form material plugs with the underlying sacrificial layer blocks, after the production of the vitreous layer with uncovering of the sacrificial layer blocks above the contact openings between the mutually adjacent gate electrode tracks, an essentially planar surface being formed, then the sacrificial layer material is etched out from the vitreous layer and the uncovered insulator material is removed above the contact openings on the semiconductor surface and, finally, the contact opening regions are filled with a conductive material.
摘要翻译：为了在具有选择晶体管的存储单元的布置的存储器模块中制造接触孔平面，在半导体衬底上具有半导体表面上相互邻近的栅极电极轨迹的布置，在半导体上形成绝缘体层表面和牺牲层随后形成在绝缘体层上，然后在牺牲层上产生材料插塞以便限定相互相邻的栅极电极轨道之间的接触开口，牺牲层被蚀刻以形成具有下面牺牲的材料塞在玻璃质层的生产之后，在相邻的栅电极轨道之间的接触开口上方露出牺牲层块，形成基本平坦的表面，然后从玻璃质层蚀刻牺牲层材料，并且未覆盖的绝缘体材料在触点上方移除并且最后，用导电材料填充接触开口区域。

3. 发明授权

US07354778B2 Method for determining the end point for a cleaning etching process 有权
标题翻译：确定清洗蚀刻工艺终点的方法
公开(公告)号：US07354778B2
公开(公告)日：2008-04-08
申请号：US10656353
申请日：2003-09-05
申请人： Percy Heger , Tobias Hoerning , Ralf Otto
发明人： Percy Heger , Tobias Hoerning , Ralf Otto
IPC分类号： H01L21/00
CPC分类号： H01J37/32935 , H01J37/32963
摘要： A method is provided for determining the end point during cleaning etching of processing chambers by means of plasma etching, which is used for carrying out coating or etching processes during the manufacture of semiconductor components. The invention provides a method for effectively and reliably determining the end point during cleaning etching of processing chambers. The end point is determined by monitoring the DC bias voltage on the plasma generator which is used for the plasma cleaning etching in the processing chamber in an evaluation unit. The plasma cleaning etching process is terminated by stopping the supply of the process gases in the gas supply unit and by switching off the plasma generator upon reaching a predetermined DC bias voltage value which corresponds to completion of the cleaning etching process.
摘要翻译：提供了一种用于通过等离子体蚀刻在处理室的清洗蚀刻期间确定终点的方法，其用于在制造半导体部件期间执行涂覆或蚀刻工艺。本发明提供了一种在处理室的清洗蚀刻期间有效和可靠地确定终点的方法。通过监视等离子体发生器中用于评估单元中的处理室中的等离子体清洗蚀刻的DC偏置电压来确定终点。等离子体清洗蚀刻工艺通过停止气体供应单元中的处理气体的供应并通过在达到对应于清洁蚀刻工艺完成的预定直流偏置电压值时关闭等离子体发生器来终止。

4. 发明申请

US20140015523A1 SENSOR DEVICE, A DETECTOR ARRANGEMENT AND A METHOD FOR DETECTING ARCING 审中-公开
标题翻译：传感器装置，检测器装置和检测电弧的方法
公开(公告)号：US20140015523A1
公开(公告)日：2014-01-16
申请号：US13545032
申请日：2012-07-10
申请人： Jan Rupf , Markus Fischer , Peter Brockhaus , Percy Heger , Norbert Urbansky
发明人： Jan Rupf , Markus Fischer , Peter Brockhaus , Percy Heger , Norbert Urbansky
IPC分类号： G01R33/02
CPC分类号： G01R19/0061 , G01R33/04
摘要： Detecting arcing events in a DC driven semiconductor tool is a challenging process. Various embodiments comprise dedicated sensor devices capable of detecting arcing events by observing the slope of voltage and/or current of a DC power supply line. Using the incorporated interfaces, the sensor could be connected to a computer system. Besides the detector arrangement the unit also provides a method and a corresponding computer program product. Furthermore a simple detection, the unit has the capability of separating the events into its severeness.
摘要翻译：在DC驱动的半导体工具中检测电弧事件是一个具有挑战性的过程。各种实施例包括能够通过观察直流电源线的电压和/或电流的斜率来检测电弧事件的专用传感器装置。使用结合的接口，传感器可以连接到计算机系统。除了检测器布置之外，该单元还提供了一种方法和相应的计算机程序产品。此外，一个简单的检测，该单位有能力将事件分离成其精神。

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