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1. 发明授权

US4694278A Integrable decoding circuit 失效
标题翻译：可整合解码电路
公开(公告)号：US4694278A
公开(公告)日：1987-09-15
申请号：US908829
申请日：1986-09-18
申请人： Hans P. Fuchs , Jurgen R. Goetz
发明人： Hans P. Fuchs , Jurgen R. Goetz
IPC分类号： G11C11/408 , G11C11/413 , H03M7/00 , H03M7/22
CPC分类号： H03M7/22 , H03M7/005
摘要： A decoding circuit for decoding information represented by input signals includes: sources of transistors of one channel type in each of four CMOS inverters connected to a first supply potential; sources of transistors of another channel type in each two inverters connected to each other and to one or the other of first connecting points; two first switching transistors of the other channel type each having a drain connected to a first connecting point and a source connected to each other and to a last connecting point; the gates of each of the two first switching transistors being connected to a second input signal or a signal complementary thereto of four further input signals complementary to each other in pairs; a last switching transistor of the other channel type having a drain connected to the last connecting point, a source connected to a second supply potential and a gate connected to an input for an individual input signal; the gates of both transistors of two of the inverters being connected to a first input signal and the gates of both transistors of two of the inverters being connected to an input signal complementary to the first input signal; and further complementary transistors of the one channel type each having a drain connected to one of the connecting points, a source connected to the first supply potential and a gate connected to the gate of the switching transistor connected to the same connecting point.
摘要翻译：用于解码由输入信号表示的信息的解码电路包括：连接到第一电源电位的四个CMOS反相器中的每一个中的一个通道类型的晶体管源; 每个两个逆变器中的另一个通道类型的晶体管的源极彼此连接并连接到第一连接点中的一个或另一个; 另一个通道类型的两个第一开关晶体管的每个具有连接到第一连接点的漏极和彼此连接的源极和最后的连接点; 两个第一开关晶体管中的每一个的栅极连接到彼此互补互补的四个另外的输入信号的第二输入信号或与其互补的信号; 另一通道类型的最后一个开关晶体管具有连接到最后连接点的漏极，连接到第二电源电位的源极和连接到单个输入信号的输入端的栅极; 两个反相器的两个晶体管的栅极连接到第一输入信号，两个反相器的两个晶体管的栅极连接到与第一输入信号互补的输入信号; 以及一个沟道类型的另外的互补晶体管，每个具有连接到一个连接点的漏极，连接到第一电源电位的源极和连接到连接到相同连接点的开关晶体管的栅极的栅极。

2. 发明授权

US4583109A Apparatus for compensating corrosion effects in integrated semiconductor circuits 失效
标题翻译：用于补偿集成半导体电路中的腐蚀效应的装置
公开(公告)号：US4583109A
公开(公告)日：1986-04-15
申请号：US410511
申请日：1982-08-23
申请人： Jurgen R. Goetz
发明人： Jurgen R. Goetz
IPC分类号： H01L23/52 , H01L21/316 , H01L21/3205 , H01L23/00 , H01L23/58 , H01L29/40 , H01L27/04
CPC分类号： H01L23/564 , H01L23/585 , H01L2924/0002
摘要： Apparatus for compensating corrosion effects due to highly mobile positive ions in insulating oxides of integrated semiconductor circuits, including a ring being disposed on the surface of a semiconductor circuit and being connected to a negative voltage, the ring being formed of a material resistant to corrosion due to positive ions during the operation of semiconductor circuits.
摘要翻译：用于补偿集成半导体电路的绝缘氧化物中由于高度移动的正离子引起的腐蚀影响的装置，包括设置在半导体电路的表面上并连接到负电压的环，该环由耐腐蚀的材料形成在半导体电路的操作期间为正离子。

3. 发明授权

US4694199A Circuit arrangement for producing a fluctuation-free d-c voltage level of a d-c voltage 失效
标题翻译：用于产生d-c电压的无波动d-c电压电平的电路布置
公开(公告)号：US4694199A
公开(公告)日：1987-09-15
申请号：US853385
申请日：1986-04-16
申请人： Jurgen R. Goetz
发明人： Jurgen R. Goetz
IPC分类号： G05F3/24 , G11C5/14 , H03K3/01 , G05F3/16
CPC分类号： G11C5/147 , G05F3/247
摘要： Circuit arrangement for producing a fluctuation-free d-c voltage level of a d-c supply voltage having a voltage divider of MOS transistors at the supply voltage, the voltage divider including a first series connection of a plurality of MOS transistors located in a branch between a tap for a reference voltage and a reference-potential input, and a second series connection of MOS transistors located between a d-c supply-voltage input and the reference-potential input and being driven jointly by the reference voltage at the tap of the voltage divider, the first series connection including at least four transistors, and including an MOS transistor drivingly connected to the d-c supply-voltage input and further connected in the second series connection of MOS transistors located between the d-c supply-voltage input and the reference-potential input.
摘要翻译：用于产生具有MOS晶体管的分压器的直流电源电压在电源电压下的无波动直流电压电平的电路装置，所述分压器包括位于分接头之间的分支中的多个MOS晶体管的第一串联连接基准电压和参考电位输入以及位于直流电源电压输入和参考电位输入之间的MOS晶体管的第二串联连接，并由分压器的抽头上的参考电压共同驱动，第一串联连接，包括至少四个晶体管，并且包括驱动地连接到直流电源电压输入的MOS晶体管，并且还连接在位于直流电源电压输入和参考电位输入之间的MOS晶体管的第二串联连接。

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