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    • 1. 发明申请
    • IMAGING SYSTEMS WITH SELECTABLE COLUMN POWER CONTROL
    • 具有可选列功率控制的成像系统
    • US20130134295A1
    • 2013-05-30
    • US13485867
    • 2012-05-31
    • Hai YanAshirwad Bahukhandi
    • Hai YanAshirwad Bahukhandi
    • H01L27/146
    • H01L27/146H04N5/345H04N5/3698
    • Electronic devices may include image sensors having image pixel arrays with image pixels arranged in pixel rows and pixel columns. Each pixel column may be coupled to a column line having column readout circuitry. The column readout circuitry on each column line may include signal processing circuitry and a latch circuit. The latch circuit on each column line may be used to selectively enable and disable the signal processing circuitry on that column line. Each latch circuit may be coupled to first and second signal lines for globally enabling and disabling the signal processing circuitry on all of the column lines. Each latch circuit may be coupled to column decoder circuitry. The column decoder circuitry may provide a column-select signal to latch circuits on a chosen subset of column lines that enables the signal processing circuitry on those column lines by setting those latch circuits.
    • 电子设备可以包括具有图像像素阵列的图像传感器,图像像素排列成像素行和像素列。 每个像素列可以耦合到具有列读出电路的列线。 每列列线上的列读出电路可以包括信号处理电路和锁存电路。 每个列线上的锁存电路可以用于选择性地启用和禁用该列线路上的信号处理电路。 每个锁存电路可以耦合到第一和第二信号线,以全局启用和禁用所有列线路上的信号处理电路。 每个锁存电路可以耦合到列解码器电路。 列解码器电路可以通过设置这些锁存电路来在选定的列线子集上的锁存电路上提供列选择信号,从而使这些列线路上的信号处理电路能够实现。
    • 2. 发明授权
    • Column parallel readout image sensors with shared column analog-to-digital converter circuitry
    • 具有共享列模数转换器电路的列并行读出图像传感器
    • US08817153B2
    • 2014-08-26
    • US13550573
    • 2012-07-16
    • Ashirwad BahukhandiHai Yan
    • Ashirwad BahukhandiHai Yan
    • H04N3/14H04N5/335
    • H04N5/37455H04N5/3742H04N5/378
    • Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.
    • 电子设备可以包括具有以行和列排列的图像传感器像素的图像传感器。 沿着列排列的像素可以耦合到公共列线。 两个或更多个列线可以通过耦合到共享的模数转换器电路。 共享模数转换器电路可采样和保持列线上呈现的复位电平或图像电平。 共享的模数转换器电路可以将电压预放大并转换成数字信号。 共享模数转换器可以同时对像素阵列的所选行中的所有列进行像素电压的采样。 图像传感器可以读取存储器中转换的信号用于像素阵列中的活动行,同时对像素阵列的下一行进行采样并保持电压。
    • 3. 发明授权
    • Imaging systems with selectable column power control
    • 具有可选列功率控制的成像系统
    • US09053993B2
    • 2015-06-09
    • US13485867
    • 2012-05-31
    • Hai YanAshirwad Bahukhandi
    • Hai YanAshirwad Bahukhandi
    • H04N5/335H01L27/00H01L27/146H04N5/345H04N5/369
    • H01L27/146H04N5/345H04N5/3698
    • Electronic devices may include image sensors having image pixel arrays with image pixels arranged in pixel rows and pixel columns. Each pixel column may be coupled to a column line having column readout circuitry. The column readout circuitry on each column line may include signal processing circuitry and a latch circuit. The latch circuit on each column line may be used to selectively enable and disable the signal processing circuitry on that column line. Each latch circuit may be coupled to first and second signal lines for globally enabling and disabling the signal processing circuitry on all of the column lines. Each latch circuit may be coupled to column decoder circuitry. The column decoder circuitry may provide a column-select signal to latch circuits on a chosen subset of column lines that enables the signal processing circuitry on those column lines by setting those latch circuits.
    • 电子设备可以包括具有图像像素阵列的图像传感器,图像像素排列成像素行和像素列。 每个像素列可以耦合到具有列读出电路的列线。 每列列线上的列读出电路可以包括信号处理电路和锁存电路。 每个列线上的锁存电路可以用于选择性地启用和禁用该列线路上的信号处理电路。 每个锁存电路可以耦合到第一和第二信号线,以全局启用和禁用所有列线上的信号处理电路。 每个锁存电路可以耦合到列解码器电路。 列解码器电路可以通过设置这些锁存电路来在选定的列线子集上的锁存电路上提供列选择信号,从而使这些列线路上的信号处理电路能够实现。
    • 4. 发明申请
    • COLUMN PARALLEL READOUT IMAGE SENSORS WITH SHARED COLUMN ANALOG-TO-DIGITAL CONVERTER CIRCUITRY
    • 具有共享列的模拟和数字转换器电路的并行读数图像传感器
    • US20130070135A1
    • 2013-03-21
    • US13550573
    • 2012-07-16
    • Ashirwad BahukhandiHai Yan
    • Ashirwad BahukhandiHai Yan
    • H04N5/3745
    • H04N5/37455H04N5/3742H04N5/378
    • Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.
    • 电子设备可以包括具有以行和列排列的图像传感器像素的图像传感器。 沿着列排列的像素可以耦合到公共列线。 两个或更多个列线可以通过耦合到共享的模数转换器电路。 共享模数转换器电路可采样和保持列线上呈现的复位电平或图像电平。 共享的模数转换器电路可以将电压预放大并转换成数字信号。 共享模数转换器可以同时对像素阵列的所选行中的所有列进行像素电压的采样。 图像传感器可以读取存储器中转换的信号用于像素阵列中的活动行,同时对像素阵列的下一行进行采样并保持电压。