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1. 发明专利

JPH08180304A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH08180304A
公开(公告)日：1996-07-12
申请号：JP32534294
申请日：1994-12-27
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： HIROSE TAKESHI , NAGAYA YUJI , HASHIMOTO TAKASHI , KAMEYAMA SADAFUMI , YOSHINAGA MAKI , HATANAKA NORIAKI
IPC分类号： G11B5/09
摘要： PURPOSE: To provide a head driver circuit without reducing a write speed even when a source voltage is reduced by switching a lower step current switch transistor in the timing of faster than the switch timing of an upper step current transistor. CONSTITUTION: In the head driver circuit of this semiconductor integrated circuit, transistors Q1, Q2 constituting an upper step current switch are connected to between head terminals T1, T2 connected to an inductive head L and the source voltage VCC. Further, the transistors Q3, Q4 constituting a lower step current switch are connected to between the head terminals T1, T2 and the grounded point GND, and a constant current source 11 is connected to the common emitter of the Q3, Q4. Then, a buffer circuit constituted so that the transistors QP1, QP2 for constant current and shot key transistors QS1, QS2 are directly connected to between VCC-GND is provided in the prestage of the upper step current transistors Q1, Q2.

2. 发明专利

JPH05211415A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH05211415A
公开(公告)日：1993-08-20
申请号：JP4013092
申请日：1992-01-30
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： YOSHINAGA MAKI , KAMEYAMA SADAFUMI
IPC分类号： G11B5/02 , H03F1/26
摘要： PURPOSE:To quicken a processing by a magnetic disk or the like including plural read amplifiers and to enhance the high performance of a computer system such as a computer system including the magnetic disk. CONSTITUTION:An output section such as plural read amplifiers RA1 or the like provided on a magnetic disk, etc., is constituted of a couple of output emitter follower circuits including output transistors(TRs) 5, 6, TRs 7, 8 provided as emitter loads, and resistors R7, R8 and the base DC potential of the output TRs 5, 6 and 7, 8 is set lower when the relevant read amplifier RA1 is not selected to selectively turn off the TRs. Since a so-called tri-state output circuit is adopted for the output section of the read amplifier RA1, the read amplifier is realized, in which its output terminal is wired-OR-connected without increasing the parasitic capacitance of a coupling node.

3. 发明专利

JPH10269510A READ AMPLIFIER CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH10269510A
公开(公告)日：1998-10-09
申请号：JP7600597
申请日：1997-03-27
申请人： HITACHI LTD , HITACHI INFORMATION TECHNOLOGY , HITACHI COMMUNICATION SYSTEM , HITACHI VLSI ENG
发明人： HIROSE TAKESHI , NAGAYA YUJI , HASHIMOTO TAKASHI , YOSHINAGA MAKI , HATANAKA NORIAKI , SOGA YUJI , MORIYA ATSUSHI , MOCHIZUKI TAKEO , KAMEYAMA SADAFUMI
IPC分类号： G11B5/09 , G11B5/02 , H03F3/68
摘要： PROBLEM TO BE SOLVED: To reduce the parasitic capacitance to be connected to each emitter and the noise caused by the base resistance of the transistors for a cascade connection by plurally dividing the cascade connected transistors and connecting a few transistors for a head bias to each emitter. SOLUTION: The collectors of five transistors are connected to the emitter of an upper stage cascade connection transistor Q1. The parasitic capacitance associated with the emitter of the transistor Q1 is 5×Cb and the parasitic capacitance associated with the emitters of lower stage cascade connection transistors Q11 to Q15 becomes 5×CA. Noises generated by the base resistances of the transistors Q1 and the transistors Q11 to Q15 are equal and set to Vn. If the sizes of the transistors Q11 to Q15 and head bias transistors Qb1 to Qb10 are the same and parasitic capacitances of the emitters are CA=Cb, the noise in the read amplifier is reduced to an approximately 1/2 value and the noise reduction effect is obtained at a higher frequency band.

4. 发明专利

JP2002008201A MAGNETIC DISK MEMORY DEVICE 失效
公开(公告)号：JP2002008201A
公开(公告)日：2002-01-11
申请号：JP2000186625
申请日：2000-06-21
申请人： HITACHI LTD
发明人： SHINOMIYA TOSHIO , HIROSE TAKESHI , KOBAYASHI YOICHIRO , YOSHINAGA MAKI , KOIDE KAZUO
IPC分类号： G11B5/02
摘要： PROBLEM TO BE SOLVED: To provide a magnetic disk memory device suitable for achieving a high surface recording density. SOLUTION: This device is constituted in such a manner that a head is fixed to the tip side through a suspension corresponding to a disk-shaped magnetic storage medium, and a write driver for supplying a write-in signal to the above head and a semi-conductor integrated circuit device including a read amplifier for amplifying a read-out signal from the head and a current adjusting circuit for reducing the difference in the current consumption at the time of reading operation and at the time of writing operation, are mounted on the suspension.

5. 发明专利

JPH08160092A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH08160092A
公开(公告)日：1996-06-21
申请号：JP29743994
申请日：1994-11-30
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： HIROSE TAKESHI , NAGAYA YUJI , HASHIMOTO TAKASHI , YOSHINAGA MAKI , HATANAKA NORIAKI , SOGA YUJI , MORIYA ATSUSHI
IPC分类号： G01R31/26 , G01R31/02 , H01L21/66 , H01L21/822 , H01L27/04
摘要： PURPOSE: To surely detect head opening abhormality by counting the time during which the voltage between head terminals is lower than a prescribed slicing level and comparing the count value with a preset value. CONSTITUTION: When head opening abnormality occurs, a voltage waveform in which the time during which the flyback voltage between head terminals becomes lower than a slicing level becomes longer than that obatined when no head opening abnormality occurs is obtained. A sense circuit detects the voltage waveform and the input transistor Q51 of a buffer circuit 22 is turned on by, for example, making an electric current to flow to the transistor Q51 from an output terminal IUX, Consequently, the output of the circuit 22 becomes 'L' and the differential transistor Q62 of a timer circuit 23 is turned off, and then, a capacity is charged by means of a collector-side transistor Qp62 and the potential at a node N11 rises. When such a state becomes longer than a preset pariod of time, the potential at the node N11 becomes higher than the reference voltage VR3 of a level discriminated circuit 25 and the output of the circuit 24 is inverted to αHβ from αLβ. The output VOPN which latches 25 the output of the circuit 24 changes to αHβ and the head abnormality detecting signal of a logical gate circuit changes. Therefore, the head opening abnormality can be detected surely.

6. 发明专利

JPH0533401B2 失效
公开(公告)号：JPH0533401B2
公开(公告)日：1993-05-19
申请号：JP1521284
申请日：1984-02-01
申请人： HITACHI LTD
发明人： YOSHINAGA MAKI , NAGAYAMA YOSHIHARU , HATANAKA NORIAKI , AOI MOTOI
IPC分类号： G05F3/16 , G05F1/56 , G05F3/22

7. 发明专利

JPH0423205A INTEGRATED CIRCUIT FOR READ/WRITE 失效
公开(公告)号：JPH0423205A
公开(公告)日：1992-01-27
申请号：JP12761590
申请日：1990-05-17
申请人： HITACHI LTD
发明人： YOSHINAGA MAKI , HATANAKA NORIAKI
IPC分类号： G11B5/09
摘要： PURPOSE:To secure the dielectric strength and level margin of an amplifier by performing the switching control of a differential amplifier based on the output signal of a differential amplifier circuit in which the change of input data is moderated by using a time constant circuit, and forming the application voltage of a magnetic head. CONSTITUTION:A first differential circuit receiving the input data Din forms output voltages Vd and Vc whose change are moderated by the time constant circuit consisting of load resistors R1, R2 and capacitors C1, C2, and supplies them to the bases of differential transistors (TR) Q3, Q4. The level change of current switching control voltages V'd, V'c transmitted to the bases can be moderated. Thereby, since the current iH on the magnetic head HD can be switched moderately, the pulse shape flyback voltage of the head HD can be also reduced to a negligible level. Contrarily, the input data Din is made into large amplitude by a second differential circuit. The voltage VB is supplied to the two terminals (a), (b) of the head HD via output TRs Q1, Q2 as clamping voltages Va, Vb. A write current switching time can be accelerated by increasing the voltage VB.

8. 发明专利

JPH01100952A SOCKET 失效
公开(公告)号：JPH01100952A
公开(公告)日：1989-04-19
申请号：JP25712487
申请日：1987-10-14
申请人： HITACHI LTD
发明人： SHINYA TOMOAKI , YOSHINAGA MAKI
IPC分类号： H01L23/32 , H01R33/76
摘要： PURPOSE:To shorten a distance between a package and a capacitor and to decrease effect of frequencies on the package, by attaching a GND layer and a capacitor on the top face of a socket on a selecting board. CONSTITUTION:By providing a GND layer 2 on a socket 1, a distance from an IC package to the GND layer 2 can be decreased and, hence, a capacitor 3 for preventing oscillation can be attached close to the IC package 7. Accordingly, the IC package 7 can be prevented from being affected by frequencies and the oscillation preventing effect can be improved.

9. 发明专利

JPS62273609A MAGNETIC HEAD CIRCUIT 失效
公开(公告)号：JPS62273609A
公开(公告)日：1987-11-27
申请号：JP11458586
申请日：1986-05-21
申请人： HITACHI LTD
发明人： YOSHINAGA MAKI , HATANAKA NORIAKI
IPC分类号： G11B5/09 , G11B5/00 , G11B5/02
摘要： PURPOSE:To improve the amplitude margin of a write current by providing a means adjusting the amplitude of an input signal of one transistor (TR) pairs proportional to a head current to the pre-stage of a write circuit whose 1st and 2nd TR pairs are connected with the magnetic head. CONSTITUTION:Emitters of TRs Q21, Q22 are connected to a constant current source CC0, the same bias Vc is applied and the current is branched to give much power to the TR Q21. Resistors R1, R2 are provided between TRs Q1, Q2 whose emitters are connected in common and the power supply voltage Vcc to form a differential amplifier PA and write signals (d), the inverse of (d) are fed to the base of a write amplifier WA. A differential output is level-shifted, and fed to bases of TRs Q13, Q14 at the lower stage of a write amplifier WA and a level difference with the lower- stage is given to write control signals D, the inverse of D of the upper stage. In decreasing the current of the TR Q21 to reduce the current of a load L, the current of the TR Q22 is decreased, the switch speed of the TRs Q11, Q12 is increased and the speed of the TRs Q13, Q14 is increased, the switch speed of the upper/lower component pair is made constant regardless of the amplitude of the passing current of the WA, no distortion is caused to the current flowing to the head, no deterioration exists in the write characteristic and the write amplitude margin is also improved.

10. 发明专利

JPS62224815A CONSTANT VOLTAGE SUPPLY CIRCUIT 失效
公开(公告)号：JPS62224815A
公开(公告)日：1987-10-02
申请号：JP6568586
申请日：1986-03-26
申请人： HITACHI LTD
发明人： YOSHINAGA MAKI
IPC分类号： G05F1/56 , G05F3/26
摘要： PURPOSE:To generate reference voltage of small variation by providing a course that determines potential from a circuit that converts reference voltage to current through a diode in a terminal in which reference voltage is reproduced. CONSTITUTION:The anode terminal of a diode D1 is connected to the collector terminal of a TRQ3 in which current I0' nearly equal to collector current I0 of a transistor TRQ1. When current is flowing in the diode D1, potential of a connection node n2 of the TRQ3 and diode D1 is determined by voltage between the base and emitter of the TRQ1, normal direction voltage of the diode D1 and reference voltage Vref. By such a way, voltage VBE between the base and emitter of the TRQ1 and normal direction voltage of the diode D1 become nearly equal even when collector current I0 of the TRQ1 and current I reproduced in the diode D1 side are somewhat different. Consequently, voltage Vref is reproduced in the node n at high accuracy even when copy rate in a current copy circuit 2 is somewhat inferior.

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