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    • 6. 发明专利
    • SEMICONDUCTOR MEMORY
    • JPH0935480A
    • 1997-02-07
    • JP18243295
    • 1995-07-19
    • HITACHI LTDHITACHI VLSI ENG
    • YAMAZAKI EIJITANAKA HITOSHIHORIGUCHI SHINJI
    • G11C11/409G11C11/407
    • PROBLEM TO BE SOLVED: To enhance noise resistance even if the characteristics of an element are fluctuated by varying the output voltage from a precharge voltage genera tion circuit to produce the precharge voltage on a bit line. SOLUTION: A high precharge voltage is set for an element where the lowering of precharge voltage on a bit line causes a trouble and a low precharge voltage is set when a leak current from a diffusion junction face in a memory cell causes reduction in the quantity of signal on the high side. Resistors 24, 25 for generating a reference voltage are connected in parallel and a fuse 21 is inserted between them. Resistors 23, 26 are connected in parallel and a fuse 22 is inserted between them. When the fuse 22 is blown out, output voltage 19 becomes 2/3 of the voltage at a node 20 if the resistors 24, 25 have a same resistance. When the fuse 21 is blown out, the output voltage becomes 1/3 of the voltage at node 20. Since the design voltage can be altered by blowing out the fuse 21, the precharge voltage can be set to maximize the noise margin.