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    • 7. 发明专利
    • SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD FOR MANUFACTURING THE SAME
    • DE3379621D1
    • 1989-05-18
    • DE3379621
    • 1983-11-23
    • HITACHI LTD
    • WATANABE ATSUOIKEDA TAKAHIDETSUKUDA KIYOSHIHIRAO MITSURUMUKAI TOUJIKAMEI TATSUYA
    • H01L27/08H01L21/8249H01L27/06H01L27/118H01L29/68H01L29/78H01L21/82
    • A semiconductor integrated circuit device and a manufacturing method thereof, which device comprises:… a semiconductor layer (10) of a predetermined conductivity type formed on a semiconductor substrate (1) of a first conductivity type;… a first well region (50) of a second conductivity type formed at a predetermined position at a surface of said semiconductor layer, an impurity concentration of said first well region gradually decreasing as it goes from the surface of said semiconductor layer toward said semiconductor substrate;… a second well region (5) of the first conductivity type formed in contact with said first well region at the surface of said semiconductor layer and to surround said first well region, an impurity concentration of said second well region gradually decreasing as it goes from the surface of said semiconductor layer toward said semiconductor substrate;… a first buried region (2) of the second conductivity type formed between and adjacent to said first well region and said semiconductor substrate, said first buried region having a higher impurity concentration than an adjacent area of the adjacent first well region;… a second buried region (40) of the first conductivity type formed between and adjacent to said second well region and said semiconductor substrate, said second buried region having a higher impurity concentration than an adjacent area of the adjacent second well region; and… semiconductor elements (62, 70, 61) formed in said first well region and said second well region.