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1. 发明专利

JP2000277909A SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE USING THE SAME 失效
公开(公告)号：JP2000277909A
公开(公告)日：2000-10-06
申请号：JP7915199
申请日：1999-03-24
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： KURIHARA YASUTOSHI , NEGISHI MIKIO , KOYAMA KENJI , IIZUKA MAMORU , ENDO TSUNEO , KANAI KIYOSHI , OKUBO TOSHIO
IPC分类号： H05K3/34 , H01L23/12 , H01L25/04 , H01L25/18
摘要： PROBLEM TO BE SOLVED: To prevent damage to a brazed part by thermal or mechanical change during manufacture or operation, by fitting a chip part on a placement member comprising ceramics with solder comprising Sn, and providing a thick-film conductor layer comprising Pt to the fitting part. SOLUTION: A chip 1 of Si which is a power semiconductor base body is fitted to a Cu base plate 2 with solder. On the Cu base plate 2, an alumina ceramics substrate 5 is fitted as a placement member provided with a thick-film Ag-Pt conductor 4 as a wiring layer using a silicon resin adhesive 6. Further, between the thick-film Ag-Pt conductors 4 of the alumina substrate 5, a chip part such as a thick-film resistor 11, IC chip substrate 12, capacitor chip 13, and Zener diode chip 14 is fitted using a brazing material 3', thus forming a circuit 10 for controlling the chip 1.

2. 发明专利

JPS6337636A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPS6337636A
公开(公告)日：1988-02-18
申请号：JP17995786
申请日：1986-08-01
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD , HITACHI HARAMACHI SEMI CONDUCT
发明人： OKUBO TOSHIO , FUKUYAMA RYOICHI , NIWA KEIICHI , TAKAHASHI KAZUYUKI
IPC分类号： H01L21/768
摘要： PURPOSE:To reduce the contact resistance of a connecting section between Mo and Al, and to obtain an MOSFET having excellent high-frequency characteristics by preventing the interposition of an oxide between a section consisting of a high melting-point metal and a section connected to the section consisting of the high melting-point metal and composed of a wiring metal. CONSTITUTION:An Mo electrode 5 is formed onto the surface of a semiconductor base body, and a semiconductor element is shaped into the base body by using the Mo electrode 5. An oxide film 10 coating the upper section of the semiconductor element is bored to expose one part of the Mo electrode 5, and the exposed surface of the electrode 5 is dry-etched. Consequently, an oxide on an Mo surface is removed, and Al is evaporated onto the Mo surface under the state, thus shaping a wiring Al electrode 9. Accordingly, the Mo oxide on the Mo surface is taken away completely, thus reducing contact resistance in a connecting section between Mo and Al.

3. 发明专利

JPH06252091A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH06252091A
公开(公告)日：1994-09-09
申请号：JP5962893
申请日：1993-02-24
申请人： HITACHI LTD
发明人： OKUBO TOSHIO , TSUKAGOSHI NOBUO , ANDO AKIO , KIYOZUKA KOICHI , HAYASHI SHOJI , TANAKA RYUICHI , IIJIMA TETSUO
IPC分类号： H01L21/28 , H01L21/52 , H01L23/48 , H01L29/78
摘要： PURPOSE:To realize good adhesion and electric connection between a silicon substrate or pellet and a metallic electrode formed in a rear thereof. CONSTITUTION:A metal electrode 32 formed in a rear of a silicon substrate 20 is constituted of a plurality of metallic layers, and the metallic layers are constituted of a nickel silicide layer 33, a titanium layer 34, a nickel layer 35 and a silver layer 36 from the side of the silicon substrate 20. After nickel, titanium, nickel and silver are applied and formed one by one on the silicon substrate 20, they are thermally treated at 350 to 450 deg.C and silicon and nickel are mutually diffused. The nickel silicide layer 33 is formed in this way. Since a nickel silicide layer is provided between the silicon substrate and a metal electrode, electric resistance can be reduced while ensuring good adhesion therebetween. Since thermal treatment is performed at 350 to 450 deg.C, soldering treatment can be performed excellently for an electric circuit formed on a pellet without damaging it.

4. 发明专利

JPS63115372A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63115372A
公开(公告)日：1988-05-19
申请号：JP26069086
申请日：1986-11-04
申请人： HITACHI LTD , HITACHI HARAMACHI SEMI CONDUCT
发明人： OKUBO TOSHIO , TAKAHASHI KAZUYUKI , KANEKO KAZUO
IPC分类号： H01L29/872 , H01L29/47
摘要： PURPOSE:To prevent the breakdown of an interlayer insulation film due to hillocks and to improve reliability by a method wherein at least the part serving as the Schottky barrier electrode is constructed in two layers - the first layer made of viewer Al and the second layer made of Si-doped Al. CONSTITUTION:A lightly-doped N type Si substrate 1 is prepared. First, a ther mal oxide film (SiO2)2 generated over the surface is partly windowed by photoresist technique, and a viewer Al film 3 is formed thereon by evaporation (or sputtering). Next, a 2-3% Si-doped Al film 4 is formed over the whole surface and then etched in succession to produce wiring patterns. A plasma SiN film 6 is deposited as the underlayer film of an interlayer insulation film. Thereafter, the work undergoes contact alloying in dry O2 to form a Schottky barrier 7 between the viewer Al and the Si substrate. This process prevents the generation of voids of Al wirings and of hillocks and ensures the improve ment of the initial yield and the reliability. Since the underlayer Al is viewer Al, Schottky characteristics can be secured.

5. 发明专利

JPS61285254A PHOTOSENSITIVE POLYMER COMPOSITION 失效
公开(公告)号：JPS61285254A
公开(公告)日：1986-12-16
申请号：JP12614085
申请日：1985-06-12
申请人： HITACHI LTD , HITACHI CHEMICAL CO LTD
发明人： KATAOKA FUMIO , SHOJI FUSAJI , KATO TOKIO , OKUBO TOSHIO , KOJIMA MITSUMASA
IPC分类号： C08K5/00 , C08K5/06 , C08K5/17 , C08K5/28 , C08L79/08 , G03F7/008 , G03F7/038 , H01B3/30
摘要： PURPOSE:The titled composition, obtained by incorporating specific amounts of a specific polyamic acid with aromatic bisazide compound, amine compound and fluorine-containing organic compound, having good covering properties even when floating dust sticks thereto and suitable for electronic parts, e.g. semiconductor elements, etc. CONSTITUTION:A photosensitive polymer composition obtained by incorporating (A) 100pts.wt. polyamic acid consisting of repeating units expressed by formula I (R is tri- or tetrafunctional organic group; R is bifunctional organic group; n is 1 when R is trifunctional and 2 when R is tetrafunctional) alone or consisting essentially thereof with (B) 0.1-100pts.wt., preferably 0.5-50pts.wt. aromatic bisazide compound expressed by formula II [X is -OH, OR (R is lower alkyl), etc.], (C) 1-400pts.wt. amine compound expressed by formula III (R -R and R are H, etc.; R is alkylene) and (D) 1-500pts.wt. fluorine- containing organic compound expressed by formula IV or V (R -R are H or F; R is H or OH; R is H, etc.; l is an integer 1-15. etc.).

6. 发明专利

JPS61152075A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61152075A
公开(公告)日：1986-07-10
申请号：JP27283084
申请日：1984-12-26
申请人： HITACHI LTD
发明人： MATSUZAWA MANABU , OKUBO TOSHIO , FUKUYAMA RYOICHI
IPC分类号： H01L21/28 , H01L29/78
摘要： PURPOSE:To obtain highly accurate and low resistance gate and wiring by connecting the gate electrode of a required pattern formed by dry-etching of the film formed on a substrate after heat treatment, partial etching of the surface and aluminum evaporation on the partially etched surface. CONSTITUTION:An Mo gate 4a is formed removing the part where a mask 5 is not formed in an Mo film 4 which contains O2 by dry-etching using a sputtering device on the surface where a high resistivity P type silicon layer 2 is epitaxially grown on a low resistivity P type silicon substrate 1. A window hole 12 is made for the connection to an Al wiring partially in an interlayer insulation film 8 to expose part of the extension 4b of the Mo gate 4a simultaneously with contact hot etching. Then, by evaporating or sputtering Al and by etching for patterning, an Al electrode 9 is formed, an Al wiring 10 connected to the extension 4b of the Mo gate 4a is formed and a Mo gate MOSFET is formed.

7. 发明专利

JPS61177717A METHOD FOR METALLIZATION TREATMENT 失效
公开(公告)号：JPS61177717A
公开(公告)日：1986-08-09
申请号：JP1856585
申请日：1985-02-04
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： KATO HIROSHI , KOBAYASHI MASAMICHI , OKUBO TOSHIO
IPC分类号： H01L29/73 , H01L21/28 , H01L21/331 , H01L29/72
摘要： PURPOSE:To obtain strong binding between a metal and silicon by treating so as to cause a low-molecular-weight carbon layer adsorbed from vapor phase or liquid phase to lie between the substrate and the metal, thereby performing a metallization treatment having extremely strong carbide binding. CONSTITUTION:Element activation regions 12 having a PN junction semiconduc tor are formed on one primary surface of a silicon semiconductor substrate 11, and an aluminum electrode 13 making low resistance connection is formed on the surface of these regions. Coated with wax 14 on the surface, this struc ture is dipped in a mixture of hydrofluoric acid and nitric acid 15, and the reverse side of the substrate is applied with back etching. The semiconductor substrate 11 is taken out of the etchant 15, rinsed, dried up and dipped in a solution 16 for treating low carbon to dissolve and remove the wax 14. By this treatment, a thin, low-molecular-weight carbon film is formed on the reverse side of the substrate. After the substrate 11 is taken out, rinsed with an organic solvent, and dried, it is placed in an evaporation apparatus 18, a titanium, a nickel and a silver films are sequentially formed on the reverse side of th substrate, and this is alloyed in an inert gas.

8. 发明专利

JPS61148878A MANUFACTURE OF ELECTRONIC DEVICE 失效
公开(公告)号：JPS61148878A
公开(公告)日：1986-07-07
申请号：JP27081584
申请日：1984-12-24
申请人： HITACHI LTD
发明人： TERADA YOSHIHARU , KOBAYASHI MASAMICHI , MATSUZAWA MANABU , OKUBO TOSHIO
IPC分类号： H01L21/28 , H01L29/49
摘要： PURPOSE:To improve high frequency characteristics, by thinly forming an Al film on Mo, performing heat treatment, thereby decreasing the contact resistance at the connecting part of an Mo gate and an Al wiring. CONSTITUTION:On a semiconductor substrate 1, a gate electrode comprising Mo or wiring 3 is formed. Mo is exposed through an opening part 5 in an insulating film 4 so as to cover said gate electrode or the wiring 3. A wiring 7 comprising Al is connected to the Mo. A metal, e.g., Al 10, which is liable to be oxidized than the Mo, is deposited on the surface of the exposed Mo 3. Then heat treatment is performed. Thus O2 in the Mo 3 is sucked into the Al 10. The Al 10 is removed. Thereafter, the Al wiring 7 is connected to the Mo 3. Therefore, the contact resistance of the first Mo layer 3 and the second Al layer 7 can be made small, and the characteristics of the element can be improved.

9. 发明专利

JPS61125149A Manufacture of electronic device 失效
标题翻译：电子器件的制造
公开(公告)号：JPS61125149A
公开(公告)日：1986-06-12
申请号：JP24603284
申请日：1984-11-22
申请人： Hitachi Ltd
发明人： MATSUZAWA MANABU , OKUBO TOSHIO , URYU TAKESHI , KOBAYASHI MASAMICHI
IPC分类号： H01L29/78 , H01L21/3205 , H01L23/52
摘要： PURPOSE:To improve the accuracy of finishing of etching by forming a high melting-point metallic film body under the state, in which the film body occludes oxygen, onto a substrate, processing the film body to a required wiring pattern through dry etching and thermally treating it at 700 deg.C or higher. CONSTITUTION:A high-resistivity p type silicon layer 2 is shaped onto a low- resistivity p type silicon substrate 1, and a field oxide film is formed. The silicon layer 2 is exposed partially, and the surface of the substrate 1 is termally oxidized to shape a gate oxide film 3. A metallic molybdenum film 4 is formed onto the oxide film 3. A section not masked in the Mo film 4 is removed, and a Mo gate 4a is shaped. n type layers 7 are formed while using the Mo gate 4a and a peripheral field film 6 as masks. An inter-layer insulating film 8 is shaped onto the whole surface. The whole is annealed and treated in a N2 atmosphere at 900 deg.C. Al electrodes 9 brought into ohmic-contact with sourcedrain sections and an Al wiring 10 connected to the Mo gate are formed through Al evaporation and etching.
摘要翻译：目的：为了通过在薄膜体内吸附氧的状态下形成高熔点金属膜体来提高蚀刻精度，通过干蚀刻和热处理将膜体加工成所需的布线图案在700摄氏度以上处理。构成：将高电阻率p +型硅层2成形为低电阻率p +型硅衬底1，形成场氧化膜。硅层2被部分曝光，并且衬底1的表面被定期氧化以形成栅极氧化膜3.在氧化物膜3上形成金属钼膜4.去除Mo膜4中未被掩蔽的部分并且Mo门4a成形。在使用Mo门4a和外围场膜6作为掩模的同时形成n +型层7。层间绝缘膜8成形为整个表面。整个退火并在900℃的N 2气氛中进行处理。通过Al蒸发和蚀刻形成与源极区段欧姆接触的Al电极9和连接到Mo栅极的Al布线10。

10. 发明专利

JPS61168960A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61168960A
公开(公告)日：1986-07-30
申请号：JP903585
申请日：1985-01-23
申请人： HITACHI LTD
发明人： KOBAYASHI MASAMICHI , OKUBO TOSHIO , TERADA YOSHIHARU
IPC分类号： H01L29/423 , H01L29/43 , H01L29/49 , H01L29/78
摘要： PURPOSE:To control the profile of a metallic film body when a gate or the like is provided by means of dry etching, by adding a desired concentration of oxygen to a metal having a high melting point during the formation of the metallic film on a substrate, and varying the concentration of oxygen in the direction of depth of the film. CONSTITUTION:Mo metal having a high melting point is deposited on an oxide film while O2 is added selectively thereto so as to form an Mo film body 4. The distribution of the O2 concentration is caused to vary in the direction of depth of the film body. When the MO film is selectively dry etched with a mask 5, the portion of the Mo film is which O2 has been introduced is etched at a higher rate than the portion in which no O2 has been introduced. The workability of the Mo film by dry etching can be controlled in this manner, and therefore the profile of the film body also can be controlled precisely. Accordingly, a gate structure having a profile controlled in a high precision can be obtained.

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