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1. 发明专利

JP2000010519A IMAGE DISPLAY DEVICE AND ITS SYSTEM 失效
公开(公告)号：JP2000010519A
公开(公告)日：2000-01-14
申请号：JP17238898
申请日：1998-06-19
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： MORI MASASHI , NISHITANI SHIGEYUKI , MORI TATSUMI , KURIHARA HIROSHI , OHASHI TOSHIAKI , KASAI SHIGEHIKO , HIRUTA YUKIO , OHARA TOSHIYUKI
IPC分类号： G09G3/36 , G09G3/20
摘要： PROBLEM TO BE SOLVED: To correct a display brightness characteristic without deterioration in image quality by constituting a conversion means for converting an analog video signal into a digital video signal of an analog-to-digital converting means whose input/output characteristic has the corresponding characteristic to a correction target of a display brightness characteristic of the image display means. SOLUTION: An inputted analog signal 301 is converted into a digital video signal 333 by an analog-to-digital converting circuit 1 synchronizing with a clock 332 generated by a timing signal generating circuit 6. Here, the analog-to- digital converting circuit 1 is constituted to have such a characteristic that the input/output characteristic corresponds to the correction target of the display brightness characteristic of an image display module 8. Namely, a voltage regulating circuit 2 produces comparison voltage of the value corresponding to each of plural gradations and also corresponding to the correction target of the display brightness characteristic of the image display module 8. And an encoder 5 converts the comparison result obtd. by comparing the analog video signal voltage with the comparison voltage corresponding to each gradation into the digital video signal 333.

2. 发明专利

JPH11338372A THIN TYPE DISPLAY DEVICE 失效
公开(公告)号：JPH11338372A
公开(公告)日：1999-12-10
申请号：JP5361499
申请日：1999-03-02
申请人： HITACHI LTD
发明人： MATSUOKA KATSUMASA , AMANO YOSHIAKI , MURAI TATSUO , KAJIMA TAISUKE , ISHII HISASHI , MORI TATSUMI , TAKASUGI NAOHIRO
IPC分类号： H04N5/64 , G02F1/1333 , G09F9/00
摘要： PROBLEM TO BE SOLVED: To provide a thin type display device with a structure body optimal to a large thin type display device. SOLUTION: A structure body 200 of a thin type display device 1 is to be comprised of a 1st case 210 of a landscape arrangement, a 2nd case 220 of a portrait arrangement located in front of the upper face of the 1st case, and a 3rd case 230 of a portrait arrangement located above the back of the upper face of the 1st case 210 and behind the 2nd case 220. Here, a 2nd device housing part 230a formed open in front by providing a front periphery of a wide plane 221 of the 2nd case 220 with an edge part 222 is arranged, and a thin type display part 100 is arranged so as to be vertically housed in the 2nd device housing part 230a.

3. 发明专利

JPH11167479A MULTI-INPUT MONITOR DEVICE 失效
公开(公告)号：JPH11167479A
公开(公告)日：1999-06-22
申请号：JP33185697
申请日：1997-12-02
申请人： HITACHI LTD
发明人： KASAI SHIGEHIKO , MANO HIROYUKI , NISHITANI SHIGEYUKI , KURIHARA HIROSHI , MORI TATSUMI
IPC分类号： G06F3/14 , G06F3/048 , G06F3/153 , G09G5/00
摘要： PROBLEM TO BE SOLVED: To provide a monitoring device for communicating between connected information processors by window-displaying data of plural information processors by plural input interfaces. SOLUTION: First and second interface parts 19 and 20 receive display data and communication data from first and second PC 2 and 3. At a monitor device 1, a communication control means identifies control information on the display picture of the second PC 3 from communication data received by the part 19. In addition, the displays of a first display picture based on display data and communication data received by the part 19 and a second display picture based on display data and communication data received by the part 20 are controlled according to control information.

4. 发明专利

JPH09146657A AUXILIARY INPUT DEVICE 失效
公开(公告)号：JPH09146657A
公开(公告)日：1997-06-06
申请号：JP30711495
申请日：1995-11-27
申请人： HITACHI LTD , HITACHI ASAHI ELECTRON KK
发明人： MORI TATSUMI , KAWAMOTO MINEO , SUZUKI YASUYUKI
IPC分类号： G06F1/16
摘要： PROBLEM TO BE SOLVED: To make it possible to use an auxiliary input device as size equivalent to that of a normal input device at the time of using it without requiring large space in an information processor for storing the auxiliary input device. SOLUTION: The auxiliary(aux.) input device has lock rods 5 erected between upper and lower covers 1, 2 and capable of maintaining an interval between both the covers 1, 2 at two long and short intervals, and at the time of using the aux. input device, the rod 5 is set up to the long interval. At the time of storing the aux. input device, the rod 5 is shortened to store the aux. input device in a storing device. Or respective keys of the aux. input device are arranged so as to be stored in space under respective keys of an input device in the storing device. In order to prevent the generation of malfunction due to the depressed aux. input device, the input device is provided with a mechanism for discriminating the storage of the aux. input device. Since the lower side of the keys of the input device are cut off and inclined so as to store the keys of the aux. input device, the aux. input device can easily be stored.

5. 发明专利

JPH0756689A SECTOR IDENTIFICATION SYSTEM 失效
公开(公告)号：JPH0756689A
公开(公告)日：1995-03-03
申请号：JP20526693
申请日：1993-08-19
申请人： HITACHI LTD , HITACHI ASAHI ELECTRON KK
发明人： MORI TATSUMI , SHIBATA HIDEKI , NITO TAKASHI , KAWAMOTO MINEO
IPC分类号： G06F3/06
摘要： PURPOSE:To provide a sector identification system in which the presence or absence of a sector can be checked without using a memory on a system by using a result status from a controller. CONSTITUTION:A DMA channel for transfer is set in a transfer invalidating state (step 101). Next. the sector is read (step 103). The presence or absence of a transfer system error is judged from the result status from an FDC at that time (step 105). When the sector is present, the FDC tries to transfer a data part read from a medium to a CPU. However, when the DMA is disable, the FDC recognizes the DMA suppression, and communicates a transfer system error through a BUSC to a CPU 11. Thus, when the transfer system error is judged in the step 105, the CPU judges that the sector is present (step 106).

6. 发明专利

JPH02312068A RECORDING CONTROL METHOD 失效
公开(公告)号：JPH02312068A
公开(公告)日：1990-12-27
申请号：JP13324989
申请日：1989-05-26
申请人： HITACHI LTD
发明人： MORI TATSUMI
IPC分类号： G06F3/06 , G11B7/00 , G11B7/0045 , G11B20/12
摘要： PURPOSE:To prevent an undue overwrite by providing a write starting flag for showing the commencement of a data writing, a data recording part and write ending flag for showing the termination of the data writing. CONSTITUTION:Recording data such as a write starting flag part 2, a data part 3 and a write ending flag part 4, etc., are provided with their positioning gap parts 1a, 1b, 1c and 1d between each data to constitute one data block. At the time of writing a data, the data is written by confirming no data write flag, and after its read check, the write ending flag is written in addition. By this method, in case of the occurrence of trouble during the write of a data, if the write ending flag is not written, and hence the write ending flag cannot be confirmed, this block concerned can be recognized as a write error block, so that the undue overwrite can be prevented.

7. 发明专利

JP2001229006A MULTI-INPUT MONITOR AND CONTROLLER 失效
公开(公告)号：JP2001229006A
公开(公告)日：2001-08-24
申请号：JP2000041370
申请日：2000-02-15
申请人： HITACHI LTD
发明人： KASAI SHIGEHIKO , MANO HIROYUKI , NISHITANI SHIGEYUKI , KURIHARA HIROSHI , MORI TATSUMI
IPC分类号： G06F3/14 , G06F3/048
摘要： PROBLEM TO BE SOLVED: To provide a monitor device having plural input interfaces capable of controlling the window display of input display data, and performing communication between connected PCs. SOLUTION: This monitor device 1 is provided with a control means for window-displaying the display screen of a second PC 3 on the display screen of a first PC 2 in connecting the first PC 2 to the second PC 3, and a monitor interface is provided with a communication signal with the PC, and the monitor device 1 is provided with a communication control means. Thus the transfer of a file between the first PC 2 and the second PC 3 can be performed in the screens.

8. 发明专利

JP2000305529A LIQUID CRYSTAL MONITOR DEVICE AND DISPLAY DEVICE 失效
公开(公告)号：JP2000305529A
公开(公告)日：2000-11-02
申请号：JP11320199
申请日：1999-04-21
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： NISHITANI SHIGEYUKI , KASAI SHIGEHIKO , MORI TATSUMI , MAEDA TAKESHI
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20 , G09G5/00 , G09G5/391 , H04N5/66
摘要： PROBLEM TO BE SOLVED: To provide an easy-to-use liquid crystal monitor by displaying a message in a liquid crystal device by means of a message display means when the resolution of analog video signal is higher than that of the liquid crystal display device. SOLUTION: A display mode of a video signal inputted from a personal computer 1 is determined at first. In this case, the frequencies of vertical synchronization signal and horizontal synchronization signal are measured by a vertical synchronization signal frequency counter and a horizontal synchronization signal frequency counter, respectively, and the result of measurement is outputted to a microcomputer 20 via a bus 19 and read thereat. As a result, the determination of display mode is made. Then, the resolution of display mode determined and the resolution of a liquid crystal pannel 24 are compared with each other. When the former is higher than the latter, a liquid crystal horizontal display start position and a liquid crystal vertical display start position are tentatively set so as to display the center of input data on the panel 24. Thereafter, a message of specified contents is displayed at an OSD(operation sequence diagram).

9. 发明专利

JP2000148080A DISPLAY CONTROLLER FOR MULTI-DISPLAY DEVICE, DISPLAY DEVICE AND MULTI-DISPLAY DEVICE 失效
公开(公告)号：JP2000148080A
公开(公告)日：2000-05-26
申请号：JP32315498
申请日：1998-11-13
申请人： HITACHI LTD
发明人： FURUHASHI TSUTOMU , MORI TATSUMI , NISHITANI SHIGEYUKI , KASAI SHIGEHIKO , IKEDA MAKIKO , KAMIMAKI HIDEKI
IPC分类号： G09G3/36 , G06F3/14 , G09G3/20 , G09G5/399
摘要： PROBLEM TO BE SOLVED: To provide a display controller, a display device, a multi-display device and a multi-display system realizing an expansion display, a high definition display with inexpensive constitution in a multi-display constituted of plural liquid crystal displays. SOLUTION: A circuit setting a horizontal data fetch start position, horizontal data fetch width, a vertical data fetch start position, vertical data fetch width and an expansion rate, the circuit storing the display data and the circuit setting an ID number of liquid crystal panels 102 (1-n) are provided in multi-display circuits 101 (1-n) answering to respective liquid crystal panels 102-1 to 102-n. Thus, by that respective multi-display circuits 101-1 to 101-n fetch/display the display data of the same or different areas, a colorful display image is obtained.

10. 发明专利

JP2000003152A IMAGE DISPLAY DEVICE 失效
公开(公告)号：JP2000003152A
公开(公告)日：2000-01-07
申请号：JP16877298
申请日：1998-06-16
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： MORI MASASHI , MORI TATSUMI , NISHITANI SHIGEYUKI , KURIHARA HIROSHI , HIRUTA YUKIO , OHARA TOSHIYUKI
IPC分类号： G09G3/36 , G09G3/20 , G09G5/00
摘要： PROBLEM TO BE SOLVED: To make it possible to suppress the oozing of colors even when an analog video signal has a skew between the respective colors by making it possible to regulate the phase of the analog video signal or the phase of a dot clock by colors. SOLUTION: A PLL circuit 15 forms the dot clock 109 synchronized with the edge of a horizontal synchronizing signal 104 by multiplying the horizontal synchronizing signal 104. The dot clock 109 is further discretely subjected to delay regulation by variable delay circuits 16 to 18 and is then outputted as conversion clocks 111 to 113, which are respectively the conversion timings to AD circuits 10 to 12. The AD circuits 10 to 12 convert the analog signals 101 to 103 respectively in synchronization with the conversion clocks 111 to 113 to digital video data 106 to 109 and output the data. As for the delay quantities of the variable delay circuit 16 to 18, a control circuit 20 changes the values of regulation signals 114 to 116 by colors in accordance with the operation result of a regulation switch circuit 19, thereby discretely regulating the delay quantities of the variable delay circuits 16 to 18 by colors.

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