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1. 发明专利

JP2003309096A Wafer edge cleaning device 有权
标题翻译： WAFER边缘清洁装置
公开(公告)号：JP2003309096A
公开(公告)日：2003-10-31
申请号：JP2002110923
申请日：2002-04-12
申请人： Hitachi Ltd , Kaijo Corp , Yac Co Ltd , ワイエイシイ株式会社 , 株式会社カイジョー , 株式会社日立製作所
发明人： ARAI TOSHIYUKI , KAWAI AKINARI , TSUJI SHINJI , MUTO YASUSHI , TAKAHASHI OSAMU
IPC分类号： B08B1/04 , B08B3/02 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To vary the pressure-contact part with a wafer side plane so that wear and tear of an edge cleaning brush can be prevented.
SOLUTION: There are provided an edge cleaning brush 43 which comes into pressure contact with a side plane of a wafer 1 (1a, 1b) and is rotated about an axis in parallel with the center of a wafer, and has soft properties and compressibility; a wafer holding roller 2 with a gear which has a gear part 2c rotating by holding an outer periphery of the wafer; a wafer holding roller 3; further a drive motor 22 for driving to rotate the wafer holding roller 2 with a gear; a cam gear 35 which is directly or indirectly geared with the gear part 2c of the wafer holding roller 2 with a gear to rotate, and is formed with a cam 35b on an upper surface of the outer periphery; and a brush holder 44 which is mounted to the cam gear 35 so as to move vertically and rotate and has an edge cleaning brush 43.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：为了改变与晶片侧面的压力接触部分，从而可以防止边缘清洁刷的磨损。解决方案：提供了边缘清洁刷43，其与晶片1（1a，1b）的侧面进行压力接触，并且围绕与晶片中心平行的轴线旋转，并且具有柔软的特性和压缩性; 具有齿轮的晶片保持辊2，其具有通过保持晶片的外周而旋转的齿轮部2c; 晶片保持辊3; 进一步驱动用于驱动晶片保持辊2的齿轮的驱动马达22; 凸轮齿轮35，其与齿轮一起旋转的直接或间接地与晶片保持辊2的齿轮部分2c配合，并且在外周的上表面上形成有凸轮35b; 以及电刷架44，其安装到凸轮齿轮35上以便垂直移动并且旋转并具有边缘清洁刷43。版权所有（C）2004，JPO

2. 发明专利

JPH10315131A POLISHING METHOD OF SEMICONDUCTOR WAFER AND DEVICE THEREFOR 失效
公开(公告)号：JPH10315131A
公开(公告)日：1998-12-02
申请号：JP13343397
申请日：1997-05-23
申请人： HITACHI LTD
发明人： MATSUDA HIROSHI , MATSUBARA SUNAO , MORIYAMA SHIGEO , YASUI KAN , KAWAI AKINARI
IPC分类号： B24B53/00 , B24B1/00 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To accurately control a dressing condition by measuring a surface condition of a polishing tool dressed in a dressing process, and judging a finish of dressing of the polishing tool by its measured value. SOLUTION: Dressing is started, and a dresser 21 moves downward toward a polishing tool 15, and is pressed to the polishing tool 15. A surface condition measuring machine 23 is actuated, and a surface condition of the polishing tool 15 is measured. When the fact that the surface condition of the polishing tool 15 is dressed up to a prescribed surface condition is judged, the dressing is stopped, and the dresser 21 is moved upward, and whether or not polishing work is finished is judged, When the other wafer is successively polished, polishing is repeated up to a finish of the polishing work. When a finish of the polishing work is judged, rotation of a polishing board 13 is stopped, and the polishing finishes. In this way, since a change in a surface condition of the polishing tool 15 is seized, a dressing condition can be accurately controlled.

3. 发明专利

JPH06163814A FORMING METHOD OF THIN FILM RESISTOR 失效
公开(公告)号：JPH06163814A
公开(公告)日：1994-06-10
申请号：JP8190792
申请日：1992-04-03
申请人： HITACHI LTD
发明人： KAWAHITO MICHIYOSHI , KAWAI AKINARI
IPC分类号： H01C7/00 , H01C17/06 , H01L21/822 , H01L27/01 , H01L27/04
摘要： PURPOSE:To provide a forming method of thin film resistor capable of forming the resistor films causing no cracking at all forming the resistor in high reliability reducing the fraction defective in manufacture within the thin film multilayer wiring substrate inner-packaged with the thin film resistor. CONSTITUTION:A thin film multilayer wiring substrate is formed of multiple insulating films and wiring conductor films laminated on an insulating substrate while the first insulating film 2, a resistor film 3, a wiring conductor film 4 and the second insulating film 5 comprising the same material as that of the first insulating film 2 are laminated on the wiring substrate 1 electrically connected to the rear surface thereof by filling contact holes with a conductor. At this time, the first insulating film 2, the resistor film 3 and the wiring conductor film 4 are formed on the wiring substrate 1 furthermore, the resistor film 3 is heat-treated for stabilization in one step after the formation of the upper layer second insulating film 5.

4. 发明专利

JPH0677664A THIN FILM RESISTIVE ELEMENT INSTALLED IN MULTILAYERED WIRING BOARD AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH0677664A
公开(公告)日：1994-03-18
申请号：JP22768192
申请日：1992-08-27
申请人： HITACHI LTD
发明人： KAWAI AKINARI , KAWAHITO MICHIYOSHI
IPC分类号： H01C7/00 , H01C17/24 , H05K1/16 , H05K3/46
摘要： PURPOSE:To reduce contact resistance and decrease scattering of resistance values by preventing the surface of a resistive film from being contacted with air or liquid, and preventing the resistive film from being directly contacted with the resistive electrode film below the resistive film. CONSTITUTION:On a board 1, an insulating film 2 is grown on which a resistive film 3, a first resistive electrode 4 and a second resistive electrode 5 also active as a wiring electrode film are sequentially grown, and the second resistive electrode film 5 is electrically contacted with a conductor 6 mounted in a throughhole of the board 1. In addition, the resistive film 3 and the first resistive electrode film 4 are consecutively grown in the same vacuum bath without breaking vacuum and connected in a throughhole 9 to the conductor 6 of the lower layer via the second resistive electrode film 5 above the first resistive electrode film 4, and there is no resistive film in the lower layer forming a resistive element.

5. 发明专利

JPH0572052A METHOD FOR MEASURING THIN-FILM TREATING TEMPERATURE 失效
公开(公告)号：JPH0572052A
公开(公告)日：1993-03-23
申请号：JP23645391
申请日：1991-09-17
申请人： HITACHI LTD
发明人： KAWAI AKINARI , KAWAHITO MICHIYOSHI , TATEISHI HIDEKI
IPC分类号： G01K3/02 , G01K7/16
摘要： PURPOSE:To obtain a method for measuring thin-film treating temperature, which can accurately and readily measure the post-treatment temperature after the formation of a metal oxide thin film with thickness of 50nm or more wherein the effects of especially the surface roughness of a substrate, combination and corrosion of the surface of the film and the like are suppressed without contaminating vacuum atmosphere. CONSTITUTION:This method is applied in temperature measurement when a resistor film is treated in a manufacturing process. A vapor deposition film having the composition of, e.g. Cr-Si-O is formed with the thickness of 0.2mum by a sputtering vapor deposition method using a Cr-SiO2 target at 60 deg.C in order to obtain a metal oxide thin film. The resistivity of the formed metal oxide film is measured before and after the heating treatment (steps 202 and 204). The temperature in heating treatment is obtained by using the relationship of a resistivity/highest-temperature curve which is calibrated beforehand (step 205).

6. 发明专利

JP2002313757A METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2002313757A
公开(公告)日：2002-10-25
申请号：JP2001118413
申请日：2001-04-17
申请人： HITACHI LTD
发明人： ARAI TOSHIYUKI , KAWAI AKINARI , TSUCHIYAMA YOJI , KANAI FUMIYUKI , NAKABAYASHI SHINICHI
IPC分类号： H01L21/76 , H01L21/304 , H01L21/3105 , H01L21/3205 , H01L21/321 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To prevent generation of foreign matters caused by separation of a thin film at the edge of a wafer. SOLUTION: The entire region of the edge of a wafer 1 is polished by using three polishing drums 4A to 4C, for example. The polishing drum 4A relatively polishes the upper face of the edge of the wafer 1, the polishing drum 4B relatively polishes the center of the edge of the wafer 1, and the polishing drum 4C relatively polishes the lower face of the edge of the wafer 1.

7. 发明专利

JP2002305168A POLISHING METHOD, POLISHING MACHINE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2002305168A
公开(公告)日：2002-10-18
申请号：JP2002031859
申请日：2002-02-08
申请人： HITACHI LTD
发明人： MORIYAMA SHIGEO , YAMAGUCHI KATSUHIKO , HONMA YOSHIO , MATSUBARA SUNAO , ISHIDA YOSHIHIRO , KAWAI AKINARI
IPC分类号： B24B7/20 , B24B27/00 , B24B37/04 , B24D3/00 , B24D3/28 , B24D3/34 , B24D13/14 , C08J5/14 , H01L21/304 , H01L21/3105
摘要： PROBLEM TO BE SOLVED: To provide a polishing method and a polishing machine which have low running cost, have small pattern width dependence and generate no working damages. SOLUTION: The polishing machine is provided with a grindstone which is made of abrasive grains and a bonding resin for bonding them, and has the modulus of elasticity ranging from 5 to 500 kg/mm . For planarizing the surface 31 having unevenness of a substrate, the surface is polished by a polishing tool 11L having a small modulus of elasticity, and then is polished by a polishing tool 11L having a large modulus of elasticity.

8. 发明专利

JP2000173955A MANUFACTURE OF SEMICONDUCTOR DEVICE AND DEVICE FOR FLATTENING MACHINING 失效
公开(公告)号：JP2000173955A
公开(公告)日：2000-06-23
申请号：JP34513998
申请日：1998-12-04
申请人： HITACHI LTD
发明人： YASUI KAN , KATAGIRI SOUICHI , KAWAMURA YOSHIO , KAWAI AKINARI , SATO MASAHIKO
IPC分类号： B24B37/00 , C09K3/14 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To prevent generation of a polishing flaw, and to increase the amount of liberated abrasive grains and to perform a high-speed flattening machining of a wafer surface pattern by a method wherein when the wafer surface pattern is to be polished by a grinding stone, a dispersion agent for accelerating the discharge of the liberated abrasive grains is added to a machining liquid. SOLUTION: A grinding stone is constituted of abrasive grains 3, a resin 24 for bonding the abrasive grains and pores 26, and the abrasive grains are separated into abrasive grains 23 fixed in the grinding stone and abrasive grains 27 liberated from the stone into a cooking liquid according to their states. A dispersion agent 29 is added to the machining liquid for increasing the discharge amount of the liberated abrasive grains. In an anionic surfactant dispersion agent, for example, the dispersion agent molecules are adsorbed on the surfaces of solid materials, such as the abrasive grains, and a state that the surfaces of the solid are charged in a negative state is made. As a repulsive force works between the abrasive grains and between the abrasive grains and the grinding stone by that charge, the dispersibility of the dispersion agent is enhanced. As the surfactant concentratedly exists on only the interfaces between the abrasive grains and the grinding stone and between the stone and the machining liquid, a liberation of the abrasive grains from the surface of the stone is accelerated by the action of the dispersion agent 29.

9. 发明专利

JP2000117616A MANUFACTURE AND WORKING DEVICE FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000117616A
公开(公告)日：2000-04-25
申请号：JP10127699
申请日：1999-04-08
申请人： HITACHI LTD
发明人： YASUI KAN , KATAGIRI SOUICHI , MORIYAMA SHIGEO , KAWAMURA YOSHIO , KAWAI AKINARI , SATO MASAHIKO , NISHIMURA SADAYUKI
IPC分类号： B24B57/02 , B24B1/04 , B24B37/12 , B24B53/017 , B24B53/12 , H01L21/304 , B24B37/00
摘要： PROBLEM TO BE SOLVED: To perform working at a high abrasive rate and controllable abrasive quantity when the irregular pattern on the surface of a semiconductive wafer is grindably worked by using a grinding wheel to flatten the irregular pattern. SOLUTION: Grinding is made by holding a semiconductive wafer formed of an irregular pattern on the surface by a wafer holder 14, and pushing the wafer onto the surface of a grinding wheel 16 constituted of abrasive grains and material for retaining these grains, to relative move the wafer. In this case, the wheel 16 is made surface activation treatment by a brush 21 or a supersonic wave, etc., when the irregular pattern is flattened.

10. 发明专利

JPH09185176A DIVIDED EXPOSURE METHOD 失效
公开(公告)号：JPH09185176A
公开(公告)日：1997-07-15
申请号：JP35401995
申请日：1995-12-29
申请人： HITACHI LTD
发明人： WATANABE TETSUYA , SAKAMURA YUKIO , KAWAI AKINARI , TATEISHI HIDEKI
IPC分类号： G03F9/00 , H01L21/027 , H05K3/00 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To easily increase the number of products to be yielded without changing the size of a projecting lens in the conventional limited substrate areas. SOLUTION: Alignment marks (hereafter, marks) 5 are disposed on the outside and inside of a product exposure area consisting of plural (3×3) unit product areas 7 on a wiring board 6 to provide a pair of the marks. The marks 5 are disposed on the outside and inside of a mask pattern area consisting of plural unit mask pattern areas on a photomask to be used at the time of exposure to provide a pair of the marks. The alignment of the wiring board is optically executed in accordance with a pair of the marks by an alignment means. The exposure of the wiring board is executed by moving the wiring board to an exposure means having a light source disposed in the position apart by a predetermined distance from this means, the photomask described above and a projecting optical system. A light shielding plate is used to irradiate the inner side near the alignment marks with the light to be cast to the marks in the optical alignment.

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