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1. 发明专利

JPH03211754A WAFER CARRIER 失效
公开(公告)号：JPH03211754A
公开(公告)日：1991-09-17
申请号：JP610690
申请日：1990-01-17
申请人： HITACHI LTD
发明人： KAWAI KUMIKO , TOKISUE HIROMITSU , NAKABAYASHI SHINICHI
IPC分类号： H01L21/673 , H01L21/68
摘要： PURPOSE:To equalize the potential of each wafer so as to enable the same wafer carrier to be used even during cleaning treatment by equipping a wafer carrier with a wafer conduction member capable of mounting and removal, and bringing it into contact with each wafer in a wafer carrier, and then making each wafer conductive electrically with each other. CONSTITUTION:When a wafer conduction part is attached to a wafer carrier after wafers are stored in the wafer carrier, the wafers 5 stored in the wafer carrier and the comb-shaped projection 7 of a wafer conduction part contact with each other, and the exchange of charge occurs between wafers through the wafer conduction part, and the potential of each wafer becomes equal. Moreover, when processing the wafers in chemicals, the corrosion of the wafer conduction part can be prevented by removing the wafer conduction part and performing chemical treatment. Since the wafers in the carrier becomes the same potential, the dust adhesion by Coulomb force can be prevented without causing electric fields among wafers, and also since a mounting jig is attached to the wafer conduction part, an existing wafer carrier can be made use of only by boring an attaching hole in the carrier main body, and the wafer conduction part can be mounted or removed easily.

2. 发明专利

JPS63107030A WASHING METHOD FOR WAFER AND WAFER WASHING JIG USED THEREFOR 失效
公开(公告)号：JPS63107030A
公开(公告)日：1988-05-12
申请号：JP25165786
申请日：1986-10-24
申请人： HITACHI LTD
发明人： TSUKAHARA MASARU , NAKABAYASHI SHINICHI
IPC分类号： H01L21/304 , H01L21/673 , H01L21/68
摘要： PURPOSE:To improve the degree of washing of the surface of a wafer by inclining the wafer in the direction of a liquid flow when the wafer is dipped into the liquid and the surface of the wafer is washed. CONSTITUTION:When wafers 1 are dipped into a liquid 6 and the surfaces of the wafers are washed, the wafers 1 are tilted in the direction of the liquid flow 6. A washing jig 2, which has a plurality of guide grooves 4, into which the wafers 1 are inserted and which hold them, and in which the guide grooves 4 are slanted in the vertical direction, is used. A large number of guide grooves 4 are formed at the angle of inclination such as approximately 15 deg. one in the vertical direction to both internal walls of the washing jig 2 such as a cartridge 2 in which a fluorocarbon resin is monolithic-molded, and the wafers 1 are inserted into the guide grooves 4 one by one under the state in which specular surfaces thereof 1a are directed downward. When the cartridge 2 is immersed into a washing tank 5, a wash liquid 6 injected from a filling tube 7 flows to an upper section from a lower section in the clearances of each wafer 1 in the cartridge 2, and the surfaces of the wafers 1 are washed.

3. 发明专利

JP2002118083A METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2002118083A
公开(公告)日：2002-04-19
申请号：JP2000306646
申请日：2000-10-05
申请人： HITACHI LTD
发明人： NAKABAYASHI SHINICHI , ABE TOSHIHIKO , TSUCHIYAMA YOJI , KENBO YUKIO , KATSUMURA YOSHITERU
IPC分类号： G01N21/956 , H01L21/02 , H01L21/304 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To detect microscratches of a wafer, without destructively inspecting wafers flowing in a mass production process. SOLUTION: The manufacturing method comprises a step of forming silicon oxide insulation films on main surfaces of a plurality of wafers flowing in a mass production process, a step of preparing a monitoring dummy wafer having a silicon oxide insulation film, a step of applying the chemical-mechanical polishing to the insulation films formed on the main surfaces of the wafers and the dummy wafer, a step of etching the insulation film of the dummy wafer using a solution containing hydrofluoric acid after the polishing step, and a step of measuring the number of scratched of the etched insulation film of the dummy wafer, to control the member of scratches caused in the polishing step into the insulation films of the wafers.

4. 发明专利

JPH02178927A METHOD OF POLISHING PLATE 失效
公开(公告)号：JPH02178927A
公开(公告)日：1990-07-11
申请号：JP33310588
申请日：1988-12-29
申请人： HITACHI LTD
发明人： TSUKAHARA MASARU , NAKABAYASHI SHINICHI , MURAMATSU TAKASHI , ICHIKAWA NAKA
IPC分类号： B24B37/04 , B24B37/10 , H01L21/304
摘要： PURPOSE:To improve throughput and high flatness at the same time by bonding the surfaces of two plates together, and polishing the surfaces which are not bonded at the same time. CONSTITUTION:The surface of a wafer 1 is cleaned very finely through etching. The rear surface of the wafer 1 is bonded to the rear surface of another wafer 1 which is treated by the same way through wax 10. A pair of the bonded wafers 1 and 1 are housed in a housing hole 7 in a carrier 3. Pressure is applied for an upper surface plate and a lower surface plate. The carrier 3 starts planetary rotation in the horizontal direction. The surfaces of the two wafers 1 and 1 whose rear surfaces are bonded are polished with polishing clothes 11 and 11 at the same time. In this way, the processing in the polishing step can be performed efficiently, and the polishing having the high throughput can be performed without decreasing the flatness in polishing.

5. 发明专利

JP2001326199A MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JP2001326199A
公开(公告)日：2001-11-22
申请号：JP2000145379
申请日：2000-05-17
申请人： HITACHI LTD
发明人： NAKABAYASHI SHINICHI , ABE TOSHIHIKO , OTA KATSUHIRO
IPC分类号： B24B37/00 , H01L21/304 , H01L21/3105 , H01L21/3205 , H01L21/321 , H01L21/762 , H01L21/768 , H01L21/8242
摘要： PROBLEM TO BE SOLVED: To reduce the density of cohesive grains in a polishing slurry, which is used in the chemical-mechanical polishing process in the manufacturing method of a semiconductor integrated circuit device, and to suppress generation of microscratches in the surface to be treated of each wafer. SOLUTION: When a polishing slurry is fed to the surface to be treated of each wafer to flow in a mass production process to perform a chemical machinery polishing treatment, the slurry is made left standing for at least more than 30 days, preferably more then 40 days and more preferably more then 50 days, in a state in which the slurry is filled in a container, whereby concentration of cohesive grains of a grain diameter of 1 μm or larger in the slurry is reduced to two hundred thousand pieces/0.5 cc or smaller, preferably less than fifty thousand pieces/0.5 cc and more preferably less than twenty thousand pieces/0.5 cc and the polishing slurry is used in the chemical- mechanical polishing process in the manufacturing method of a semiconductor integrated circuit device.

6. 发明专利

JPH0480911A SEMICONDUCTOR MANUFACTURING METHOD 失效
公开(公告)号：JPH0480911A
公开(公告)日：1992-03-13
申请号：JP19542390
申请日：1990-07-24
申请人： HITACHI LTD
发明人： TSUKAHARA MASARU , NAKABAYASHI SHINICHI , MURAMATSU TAKASHI , ICHIKAWA HAN , YAMADA EIICHI
IPC分类号： H01L21/02
摘要： PURPOSE:To reduce as much as possible the adhesion of foreign substances on wafers due to static electricity by a method wherein the semiconductor wafers, constituting each batch and having approximate resistivity with one another, are housed in a case. CONSTITUTION:The more the irregularity of resistivity value between wafer becomes smaller, the more the number of adhered foreign substances decrease. The reason is that if the irregularity of resistivity value between the wafers is large, the potential difference formed between the wafers increases. Accordingly, when a plurality of semiconductor wafers 1 are housed in a cartridge 2 for conveyance and various treatments, the semiconductor wafers 1, having the approximate resistivity are housed in one cartridge 2 so that the irregularity of resistivity value of each semiconductor wafer 1 is brought close to zero, desirably 1.0OMEGAcm or smaller. Consequently, as the electrification of static electricity between the semiconductor wafers 1 in the cartridge 2 is suppressed, the adhesion of foreign substance to the semiconductor wafers l can be reduced.

7. 发明专利

JP2003243504A METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 审中-公开
公开(公告)号：JP2003243504A
公开(公告)日：2003-08-29
申请号：JP2002042193
申请日：2002-02-19
申请人： HITACHI LTD
发明人： NAKABAYASHI SHINICHI , OKUDA SHUICHI , TACHIKAWA KOSAKU
IPC分类号： H01L21/304 , H01L21/3105 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To flatten a BPSG film by a chemical mechanical polishing method and to suppress microscratches. SOLUTION: The BPSG film 20 is deposited on the principal surface of a substrate 1 where a MISFET is formed. Then, the surface of the BPSG film 20 is flattened by a chemical mechanical polishing method. Thereafter, by reflowing the BPSG film 20 by heat-treating the substrate 1, microscratches generated on the surface of the BPSG film 20 from the polishing of the film 20 are removed. The amount of polishing the surface of the BPSG film 20 is not less than 90 nm and not more than 300 nm, preferably not less than 100 nm and not more than 250 nm, and more preferably not less than 120 nm and not more than 200 nm. COPYRIGHT: (C)2003,JPO

8. 发明专利

JP2001274048A METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND PROCESSING DEVICE 失效
公开(公告)号：JP2001274048A
公开(公告)日：2001-10-05
申请号：JP2000088506
申请日：2000-03-24
申请人： HITACHI LTD
发明人： KATSUMURA YOSHITERU , ABE TOSHIHIKO , NAKABAYASHI SHINICHI , KANAI FUMIYUKI , KENBO YUKIO
IPC分类号： H01L21/02
摘要： PROBLEM TO BE SOLVED: To solve a problem in which a wafer is warped as a whole due to the distortion of films when the films are repeatedly formed on the wafer in a semiconductor manufacturing process, and the warpage of a wafer causes a critical problem with an increase in diameter of the wafer and wiring density. SOLUTION: The deformation of a semiconductor wafer is measured through a polarization method or a shape measuring method in which a laser displacement gauge is used, and the state of distortion of the wafer is calculated on the basis of measured shape of the wafer. A processing pattern is provided on the rear of the wafer at a proper position corresponding to the state of distortion, by which the rear of the wafer is turned to an isotropic state, and the wafer is corrected on shape. A processing method is carried out by the use of an ion beam, a flow of high-pressure liquid or the like which is capable of cutting a fine groove, or a high-speed particle irradiating method, a laser beam irradiating method or the like which modifies the state of a surface is used, by which the above processing pattern is provided corresponding to a state of distortion.

9. 发明专利

JPH0697147A DRYER 失效
公开(公告)号：JPH0697147A
公开(公告)日：1994-04-08
申请号：JP24318892
申请日：1992-09-11
申请人： HITACHI LTD
发明人： MATSUZAKI TORU , NAKABAYASHI SHINICHI
IPC分类号： F26B21/00 , H01L21/304
摘要： PURPOSE:To suppress adhesion of dust particles to a member to be dries in drying step while allowing mass processing in a short time and to carry out cleaning step and drying step of the member to be dried in assembly-line operation. CONSTITUTION:The dryer comprises a filter 2 for purifying the air 1 and a heater 6 for heating the purified air 1 and a wafer (member to be dried) 3 is dried through convection of purified and heated air 1. The wafer (member to be dried) 3 is contained in a cartridge (containing means) 5 and transferred on a transferring means 4 continuous with a cleaning equipment.

10. 发明专利

JPH0236072A POLISHING METHOD FOR SEMICONDUCTOR WAFER AND POLISHING PLATE USED THEREFOR 失效
公开(公告)号：JPH0236072A
公开(公告)日：1990-02-06
申请号：JP18561188
申请日：1988-07-27
申请人： HITACHI LTD
发明人： TSUKAHARA MASARU , NAKABAYASHI SHINICHI , ICHIKAWA NAKABA , MURAMATSU TAKASHI
IPC分类号： B24B37/04 , B24B37/30 , H01L21/304
摘要： PURPOSE:To obtain the semiconductor wafer whose thickness is uniform on the wafer whole face and having a high flatness by holding the semiconductor wafer by a polishing plate and polishing it with rotating by pressing onto a rotatable polishing means. CONSTITUTION:A semiconductor wafer 1 is polished with rotating it by holding it with a polishing plate 3 and pressing onto a rotatable polishing means. In this case, the semiconductor wafer 1 is polished by being converted in the plane direction on the way of polishing. Only one part of the wafer 1 being polished more or less than the other part is thus eliminated and the whole body can be polished in uniform thickness evenly.

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