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1. 发明专利

AU9031401A Resin-sealed semiconductor device, and die bonding material and sealing materialfor use therein 未知
公开(公告)号：AU9031401A
公开(公告)日：2002-04-08
申请号：AU9031401
申请日：2001-09-28
申请人： HITACHI CHEMICAL CO LTD
发明人： KURAFUCHI KAZUHIKO , SUZUKI NAOYA , YASUDA MASAAKI , KAWATA TATSUO , SAKAI HIROYUKI , KAWASUMI MASAO
IPC分类号： C08G59/30 , C08L63/00 , H01L23/29 , H01L23/31 , H01L21/58 , H01L23/28 , C08L63/02 , C08K3/00
摘要： A resin-sealed semiconductor device which comprises a lead frame having a die bond pad and an inner lead, a semiconductor chip installed on the die bond pad via a die bonding material and a sealing material for sealing the semiconductor chip and the lead frame, wherein properties of the die bonding material and the sealing material after curing satisfies the following formulae: sigmae =2.0x10 xsigmaei formula (2) Ud>=4.69x10 xed formula (3) wherein sigmab (MPa)represents the flexural strength at break of the sealing material at 25°, Ui (N.m) and Ud (N.m) represent shear strain energies of the sealing material at a soldering temperature for the inner lead and the die bonding pad, respectively, at a peak temperature during soldering, where sigmae=(1/log(kd1))xEe1x(alpham-alphae1)xDeltaT1 formula (4), sigmaei=Ee2x(alphae2-alpham)xDeltaT2 formula (5), sigmaed=log(kd2)xEe2x(alphae2-alpham)xDeltaT2 Formula (6), kd1: a ratio of the flexural elastic modulus Ed1 (MPa) of the die bonding material at 25° to 1 MPa of elastic modulus (Ed1>1 MPa), kd2: a ratio of the flexural elastic modulus Ed2 (MPa) of the die bonding material at the peak temperature during the soldering to 1 MPa of elastic modulus (Ed2>1 MPa), Ee1: a flexural modulus (MPa) of the sealing material at 25°, Ee2: a flexural modulus (MPa) of the sealing material at the peak temperature during soldering, alphae1: an average thermal expansion coefficient (1/° C.) of the sealing material from forming temperature for the semiconductor to room temperature (25° C.), alphae2: an average thermal expansion coefficient (1/° C.) of the sealing material from the forming temperature for the semiconductor to a peak temperature during soldering, alpham: a thermal expansion coefficient (1/° C.) of the lead frame, DeltaT1: the difference (° C.) between the forming temperature for the semiconductor and the low temperature side temperature in the temperature cycle, and DeltaT2: the difference (° C.) between the forming temperature for the semiconductor and the peak temperature during soldering.

2. 发明专利

SG11202002226QA SEMICONDUCTOR ELEMENT MOUNTING STRUCTURE, AND COMBINATION OF SEMICONDUCTOR ELEMENT AND SUBSTRATE 未知
公开(公告)号：SG11202002226QA
公开(公告)日：2020-04-29
申请号：SG11202002226Q
申请日：2018-09-14
申请人： HITACHI CHEMICAL CO LTD
发明人： ONOZEKI HITOSHI , FUKUZUMI SHIZU , SUZUKI NAOYA , NONAKA TOSHIHISA
IPC分类号： H01L21/60
摘要： Provided is a semiconductor element mounting structure, including: a semiconductor element including an element electrode, and a substrate including a substrate electrode that is provided on a surface facing the semiconductor element at a position facing the element electrode, the semiconductor element and the substrate being connected via the element electrode and the substrate electrode, in which: one of the element electrode or the substrate electrode is a first protruding electrode including a solder layer at a tip portion thereof, the other of the element electrode or the substrate electrode is a first electrode pad including one or more metal protrusions on a surface thereof, the one or more metal protrusions of the first electrode pad extend into the solder layer of the first protruding electrode, and a bottom area of each of the one or more metal protrusions of the first electrode pad is 70% or less with respect to an area of the first electrode pad, or 75% or less with respect to a maximum cross-sectional area of the solder layer of the first protruding electrode.

3. 发明专利

AU4802199A Semiconductor device and method for manufacturing the same 未知
公开(公告)号：AU4802199A
公开(公告)日：2000-02-21
申请号：AU4802199
申请日：1999-07-27
申请人： HITACHI CHEMICAL CO LTD
发明人： KOUSAKA TAKASHI , SUZUKI NAOYA , TANAKA TOSHIAKI , YASUDA MASAAKI , KANEDA AIZOU
IPC分类号： H01L21/58 , H01L23/31 , H01L23/498
摘要： In the present invention, provided are a semiconductor device having a semiconductor-element-mounting substrate on which a semiconductor element has been mounted via an adhesive having an exothermic-reaction curing start temperature of 130 DEG C or below as measured with a differential scanning calorimeter at a heating rate of 10 DEG C/minute, and a process for its fabrication.

4. 发明公开

EP1111667A4 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件和方法
公开(公告)号：EP1111667A4
公开(公告)日：2005-06-22
申请号：EP99931560
申请日：1999-07-27
申请人： HITACHI CHEMICAL CO LTD
发明人： KOUSAKA T , SUZUKI NAOYA , TANAKA TOSHIAKI , YASUDA M , KANEDA AIZOU
IPC分类号： H01L21/58 , H01L23/31 , H01L23/498 , H01L21/52
CPC分类号： H01L24/83 , H01L23/3121 , H01L23/3128 , H01L23/49816 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/73 , H01L2224/29 , H01L2224/29101 , H01L2224/2919 , H01L2224/29298 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83136 , H01L2224/8319 , H01L2224/83855 , H01L2224/92247 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01027 , H01L2924/01033 , H01L2924/01039 , H01L2924/01045 , H01L2924/01058 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/12042 , H01L2924/12044 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00 , H01L2924/3512 , H01L2224/29099 , H01L2224/29199 , H01L2224/29299 , H01L2224/2929 , H01L2924/20753
摘要： An encapsulated semiconductor device wherein a semiconductor chip is mounted on a semiconductor chip mounting substrate with an adhesive having a curing start temperature of exothermic reaction of 130 °C or less measured by means of a differential scanning calorimeter on the assumption that the temperature rise rate is 10 °C/min. A method for manufacturing the same is also disclosed.

5. 发明专利

JP2013110403A Reflow film, method for forming solder bump, method for forming solder join, and semiconductor device 审中-公开
标题翻译：反射膜，形成焊接保护的方法，形成焊接加工的方法和半导体器件
公开(公告)号：JP2013110403A
公开(公告)日：2013-06-06
申请号：JP2012236848
申请日：2012-10-26
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： MIYAUCHI KAZUHIRO , SUZUKI NAOYA , TAKANO MARE , YAMASHITA YUKIHIKO
IPC分类号： H01L21/60 , B23K35/26 , C22C12/00 , C22C13/00 , H01L23/12
CPC分类号： H01L24/81 , H01L2224/16225
摘要： PROBLEM TO BE SOLVED: To provide, by unevenly distributing a solder constituent on an electrode of a substrate by means of self-structuring thereof, a reflow film which is excellent in self stability, transportability, and handleability in use, and which allows selective formation of a solder bump or solder join on the electrode, and to provide a simple and convenient method for forming a solder bump or solder join by use of the reflow film, a solder bump having less voids and smaller variation thereby formed, and a substrate with such solder bumps.SOLUTION: The reflow film 21 comprises: a polyvinyl alcohol; a compound which has a molecular weight of 500 or less and which is dissolved or dispersed in water; and solder particles dispersed therein. In the film, the compound with a molecular weight of 500 or less accounts for 20-300 pts.mass to 100 pts.mass of the polyvinyl alcohol. The method for forming a solder bump comprises the steps of: putting the reflow film on a face of a substrate 10 where an electrode 12 is located; further putting a plat plate 12 thereon; heating them; and removing and melting the reflow film.
摘要翻译：要解决的问题：为了通过其自身结构将焊料成分不均匀地分布在基板的电极上，提供使用中自稳定性，输送性和可操作性优异的回流膜，并且其中允许在电极上选择性地形成焊料凸块或焊料接合，并且提供通过使用回流膜形成焊料凸块或焊料接合的简单和方便的方法，具有较小空隙和由此形成的较小变化的焊料凸块，以及具有这种焊料凸块的基板。解决方案：回流膜21包括：聚乙烯醇; 分子量为500以下并溶于或分散于水中的化合物; 和分散在其中的焊料颗粒。在膜中，分子量为500以下的化合物占聚乙烯醇的20〜300质量％〜100质量份。用于形成焊料凸块的方法包括以下步骤：将回流膜放置在电极12所在的基板10的表面上; 进一步在其上放置平板12; 加热它们并且去除和熔化回流膜。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2015032637A 電子部品装置の製造方法及び電子部品装置有权
标题翻译：电子元件装置的制造方法和电子元件装置
公开(公告)号：JP2015032637A
公开(公告)日：2015-02-16
申请号：JP2013159867
申请日：2013-07-31
申请人：日立化成株式会社 , Hitachi Chemical Co Ltd
发明人： TAKAHASHI HIROSHI , SUZUKI NAOYA , MASUDA TOMOYA
IPC分类号： H01L21/60 , H01L23/29 , H01L23/31
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83192 , H01L2924/00
摘要：【課題】ボイドが少ない電子部品装置の製造方法、及び電子部品装置を提供する。【解決手段】前記電子部品1の前記基板5と対向する側の面及び前記基板5の前記電子部品1と対向する側の面の少なくとも一方に、200℃におけるゲル化時間が2.0秒以下である硬化性組成物6を付与する付与工程と、前記電子部品1と前記基板5との間隙に前記硬化性組成物6を充填し、かつ、前記電子部品1と前記基板5とを前記バンプ2を介して接触させる加圧工程と、前記電子部品1と前記基板5とが前記バンプ2を介して接触している状態で熱処理して、前記電子部品1と前記基板5とを前記バンプ2を介して接合し、かつ、前記硬化性組成物6を硬化する熱処理工程と、を有し、前記加圧工程では、せん断速度200s−1において測定される前記硬化性組成物6の粘度が2.0Pa・s以下となるように前記硬化性組成物6の温度を制御する、電子部品装置の製造方法。【選択図】図1
摘要翻译：要解决的问题：提供减少空穴的电子部件装置的制造方法和电子部件装置。电子部件装置的制造方法包括：施加固化性组合物6的涂布工序，其中凝胶化在电子部件1的与基板5相对的表面或基板5的与电子部件1相对的面的至少任一面上，在200℃的时间为2.0秒以下。用可固化组合物6填充电子部件1和基板5之间的间隙的加压步骤，并且使电子部件1和基板5经由凸块2接触; 以及通过在电子部件1和基板5经由凸块2接触的状态下进行热处理，经由凸块2将电子部件1和基板5接合的热处理工序，以及固化可固化组合物6 在加压工序中，以剪切速度200s测定的固化性组合物6的粘度为2.0Pa·s以下的方式控制固化性组合物6的温度。

7. 发明专利

JP2015018837A 回路基板およびそれを用いた半導体装置审中-公开
标题翻译：使用相同的电路板和半导体器件
公开(公告)号：JP2015018837A
公开(公告)日：2015-01-29
申请号：JP2013142983
申请日：2013-07-08
申请人：日立化成株式会社 , Hitachi Chemical Co Ltd
发明人： MINO MASAYUKI , KONO TSUTOMU , SUZUKI NAOYA , TAKAHASHI HIROSHI
IPC分类号： H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/83192 , H01L2224/92125 , H01L2924/00
摘要：【課題】フリップチップ接続部の信頼性の向上を図る。【解決手段】半導体チップ2に設けられた複数のバンプ3と電気的に接続する複数の電極部1eと、複数の電極部1eのそれぞれが配置された複数の開口部1dとを有する回路基板1であり、電極部1eは第1電極部1eaと第2電極部1ebとを備え、さらに第2電極部1ebは、開口部1dの底面1daに沿って第1電極部1eaより突出する突出部1ecを有している。また、第2電極部1ebの体積は、第1電極部1eaの体積より大きく形成されている。【選択図】図8
摘要翻译：要解决的问题：提高倒装芯片接合部分的可靠性。解决方案：电路板1包括：电连接到设置在半导体芯片2中的多个凸块3的多个电极部分1e; 以及多个开口1d，其中布置有多个电极部分1e。电极部分1e包括第一电极部分1ea和第二电极部分1eb。第二电极部分1eb具有从开口1d的底面1da从第一电极部分1ea突出的突起1ec。第二电极部分1eb的体积大于第一电极部分1ea的体积。

8. 发明专利

JP2014168791A Flux film, flip-chip connection method, and semiconductor device 审中-公开
标题翻译： FLUX膜，FLIP-CHIP连接方法和半导体器件
公开(公告)号：JP2014168791A
公开(公告)日：2014-09-18
申请号：JP2013041100
申请日：2013-03-01
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： MIYAUCHI KAZUHIRO , SUZUKI NAOYA
IPC分类号： B23K35/363 , B23K1/00 , B23K3/00 , B23K101/40 , H01L21/60
CPC分类号： H01L24/81 , H01L2224/81001 , H01L2224/81191
摘要： PROBLEM TO BE SOLVED: To provide a flux film being a flux that exhibits a stable flux action, is excellent in formability of a solder joint, is excellent in workability and storage stability, and has a reduced load on the environment, a flip-chip connection method using the flux film, and a semiconductor device in which a chip and a substrate are connected by the connection method.SOLUTION: A flux film contains a resin (A1) having a structure derived from polyvinyl alcohol or a resin (A2) having a structure derived from polyvinyl pyrrolidone, and a flux agent (B).
摘要翻译：要解决的问题：为了提供具有稳定的助焊剂作用的助焊剂的助焊剂膜，焊接接头的成形性优异，具有优异的加工性和储存稳定性，并且对环境的负载降低，倒装芯片使用该助焊剂膜的连接方法，以及通过连接方法连接芯片和基板的半导体装置。熔剂膜包含具有衍生自聚乙烯醇的结构的树脂（A1）或具有衍生自聚乙烯醇的树脂（A2）衍生自聚乙烯吡咯烷酮的结构和助熔剂（B）。

9. 发明专利

JP2013187491A Circuit connection structure manufacturing method 有权
标题翻译：电路连接结构制造方法
公开(公告)号：JP2013187491A
公开(公告)日：2013-09-19
申请号：JP2012053473
申请日：2012-03-09
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： HONDA KAZUTAKA , SUZUKI NAOYA , TAZAWA TSUYOSHI
IPC分类号： H01L21/60
CPC分类号： H01L2224/73204 , H01L2224/83192
摘要： PROBLEM TO BE SOLVED: To provide a circuit connection structure manufacturing method which can reduce warpage.SOLUTION: A circuit connection structure manufacturing method according to an embodiment comprises: a preparation process of preparing a circuit member 10 including a wiring circuit board 11 and wiring 13, and a circuit member 20 including a semiconductor chip 21 and wiring 23; a connection process of pressure bonding the circuit member 10 and the circuit member 20 while sandwiching an adhesive layer 40a between the wiring circuit board 11 and the semiconductor chip 21 to obtain a laminate 100a in which the wiring 13 and the wiring 23 are electrically connected with each other; a first heating process of heating the laminate 100a after the connection process at a temperature T1; and a second heating process of heating the laminate 100a after the first heating process at a temperature T2. The temperature T1 and the temperature T2 satisfy the following formula (1): temperature T1>temperature T2≥glass-transition temperature of adhesive layer 40a (1).
摘要翻译：要解决的问题：提供一种可以减少翘曲的电路连接结构制造方法。解决方案根据实施例的电路连接结构制造方法包括：准备包括布线电路板11和布线13的电路部件10的准备工序以及包括半导体芯片21和布线23的电路部件20; 将电路部件10和电路部件20压接在一起，同时将布线电路基板11与半导体芯片21之间的粘接层40a夹在中间，得到布线13与布线23电连接的层叠体100a 彼此; 在温度T1的连接处理之后加热层叠体100a的第一加热工序; 以及在温度T2下在第一加热处理之后加热层压体100a的第二加热过程。温度T1和温度T2满足下列公式（1）：温度T1>温度T2≥粘合剂层40a（1）的玻璃化转变温度。

10. 发明专利

JP2013110402A Reflow film, method for forming solder bump, method for forming solder join, and semiconductor device 审中-公开
标题翻译：反射膜，形成焊接保护的方法，形成焊接加工的方法和半导体器件
公开(公告)号：JP2013110402A
公开(公告)日：2013-06-06
申请号：JP2012236847
申请日：2012-10-26
申请人： Hitachi Chemical Co Ltd , 日立化成株式会社
发明人： MIYAUCHI KAZUHIRO , SUZUKI NAOYA , TAKANO MARE , YAMASHITA YUKIHIKO
IPC分类号： H01L21/60 , H05K1/18 , H05K3/34 , H05K3/36
CPC分类号： H01L2224/11 , H01L2224/11001 , H01L2224/1152 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide, by unevenly distributing a solder constituent on an electrode of a substrate by means of self-structuring thereof, a reflow film which is excellent in self stability, transportability, and handleability in use, and which allows selective formation of a solder bump or solder join only on the electrode, and to provide a simple and convenient method for forming a solder bump or solder join by use of the reflow film, a solder bump having less voids and smaller variation thereby formed, and a substrate with such solder bumps.SOLUTION: The reflow film comprises, in a solvent: a meltable thermoplastic resin; and solder particles. The solder particles are dispersed in the film. The method for forming a solder bump comprises: (a) the step of putting the reflow film on an electrode face of a substrate; (b) the step of further putting a plat plate thereon and then fixing them; (c) the step of heating them; and (d) the step of melting and removing the reflow film.
摘要翻译：要解决的问题：为了通过其自身结构将焊料成分不均匀地分布在基板的电极上，提供使用中自稳定性，输送性和可操作性优异的回流膜，并且其中允许仅在电极上选择性地形成焊料凸块或焊料，并且通过使用回流膜提供用于形成焊料凸块或焊料接合的简单和方便的方法，具有较小空隙和由此形成的较小变化的焊料凸块，以及具有这种焊料凸块的基板。解决方案：回流膜在溶剂中包括：可熔融的热塑性树脂; 和焊料颗粒。焊料颗粒分散在薄膜中。用于形成焊料凸块的方法包括：（a）将回流膜放置在基板的电极面上的步骤; （b）在其上进一步放置平板，然后固定它们的步骤; （c）加热它们的步骤; 和（d）熔融和去除回流膜的步骤。版权所有（C）2013，JPO＆INPIT

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