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1. 发明申请

WO2012044276A1 DEVICE STRUCTURE FOR LONG ENDURANCE MEMRISTORS 审中-公开
标题翻译：长寿命仪器的器件结构
公开(公告)号：WO2012044276A1
公开(公告)日：2012-04-05
申请号：PCT/US2010/050381
申请日：2010-09-27
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , YANG, Jianhua , ZHANG, Minxian, Max , WILLIAMS, R., Stanley
发明人： YANG, Jianhua , ZHANG, Minxian, Max , WILLIAMS, R., Stanley
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L45/14 , G11C13/0007 , G11C2213/15 , G11C2213/32 , G11C2213/52 , H01L27/2463 , H01L27/2472 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/148 , H01L45/149 , H01L45/1608
摘要： A memristor (100) includes a first electrode (102) formed of a first metal, a second electrode (104) formed of a second material, wherein the second material comprises a different material from the first metal, and a switching layer (110) positioned between the first electrode (102) and the second electrode (104). The switching layer (110) is formed of a composition of a first material comprising the first metal and a second nonmetal material, in which the switching layer (110) is in direct contact with the first electrode (102) and in which at least one conduction channel (120) is configured to be formed in the switching layer (110) from an interaction between the first metal and the second nonmetal material.
摘要翻译：忆阻器（100）包括由第一金属形成的第一电极（102），由第二材料形成的第二电极（104），其中第二材料包括与第一金属不同的材料，以及开关层（110）位于第一电极（102）和第二电极（104）之间。开关层（110）由包括第一金属和第二非金属材料的第一材料的组合物形成，其中开关层（110）与第一电极（102）直接接触，并且其中至少一个导电沟道（120）被配置为从第一金属和第二非金属材料之间的相互作用形成在开关层（110）中。

2. 发明申请

WO2011002443A1 INDIVIDUALLY ADDRESSABLE NANO-SCALE MECHANICAL ACTUATORS 审中-公开
标题翻译：独立的纳米尺度机械执行器
公开(公告)号：WO2011002443A1
公开(公告)日：2011-01-06
申请号：PCT/US2009/049156
申请日：2009-06-30
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , YANG, Jianhua , WILLIAMS, R., Stanley , TONG, William
发明人： YANG, Jianhua , WILLIAMS, R., Stanley , TONG, William
IPC分类号： B81B7/00 , B81B7/04
CPC分类号： F03G7/005
摘要： An addressable nano-scale mechanical actuator is formed at the intersection of two nanowires. The actuator has an active region disposed between the two nanowires, which form the electrodes of the actuator. The active region contains an electrolytically decomposable material. When an activation voltage is applied to the electrodes, the material releases a gas that forms a bubble at one electrode, causing a bulging of a top surface of the actuator. The bulging may be used, via mechanical coupling, to provide mechanical actuation on a nanometer scale. The nanowires may be arranged in a two-dimensional array to provide an array of individually addressable actuators.
摘要翻译：在两个纳米线的交叉处形成可寻址的纳米级机械致动器。致动器具有设置在两个纳米线之间的有源区域，其形成致动器的电极。活性区域含有电解质的材料。当激活电压施加到电极时，材料释放在一个电极处形成气泡的气体，导致致动器的顶表面膨胀。可以通过机械耦合使用凸起来提供纳米尺度的机械致动。纳米线可以被布置成二维阵列以提供单独可寻址致动器的阵列。

3. 发明申请

WO2010110803A1 SWITCHABLE JUNCTION WITH INTRINSIC DIODE 审中-公开
标题翻译：具有内置二极管的可切换连接
公开(公告)号：WO2010110803A1
公开(公告)日：2010-09-30
申请号：PCT/US2009/038682
申请日：2009-03-27
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , YANG, Jianhua , STRUKOV, Dmitri, Borisovich , WILLIAMS, R., Stanley
发明人： YANG, Jianhua , STRUKOV, Dmitri, Borisovich , WILLIAMS, R., Stanley
IPC分类号： H01L29/861 , H01L29/872 , H01L27/115 , H01L21/8247 , H01L29/40
CPC分类号： H01L27/101 , B82Y10/00 , H01L27/1021 , H01L29/861 , H01L29/872
摘要： A switchable junction (600) with an intrinsic diode includes a first electrode (635) and second electrode (640). A first memristive matrix (605) forms an electrical interface (625) with the first electrode (635) which has a programmable conductance. A semiconductor matrix (615) is electrical contact with the first memristive matrix (605) and forms a rectifying diode interface (630) with the second electrode (640).
摘要翻译：具有本征二极管的可切换结（600）包括第一电极（635）和第二电极（640）。第一忆阻矩阵（605）与具有可编程电导的第一电极（635）形成电接口（625）。半导体矩阵（615）与第一忆阻矩阵（605）电接触并与第二电极（640）形成整流二极管接口（630）。

4. 发明申请

WO2010151260A1 SWITCHABLE JUNCTION WITH INTRINSIC DIODES WITH DIFFERENT SWITCHING THRESHOLDS 审中-公开
标题翻译：具有不同开关阈值的内置二极管的可切换接点
公开(公告)号：WO2010151260A1
公开(公告)日：2010-12-29
申请号：PCT/US2009/048627
申请日：2009-06-25
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , YANG, Jianhua , WANG, Shih-Yuan , WILLIAMS, R., Stanley
发明人： YANG, Jianhua , WANG, Shih-Yuan , WILLIAMS, R., Stanley
IPC分类号： H01L29/861 , H01L29/872 , H01L29/417
CPC分类号： H01L29/872 , H01L27/101 , H01L27/1021
摘要： A switchable junction (600) having intrinsic diodes with different switching thresholds is disclosed. The switchable junction comprises a first electrode (610) formed of a first conductive material and a second electrode (630) formed of a second conductive material. The junction (600) further includes a memristive matrix (615) configured to form a first and a second electrical interface with the first and second electrodes to form a first rectifying diode interface (626) with a first switching threshold and a second rectifying diode interface (628) with a second switching threshold.
摘要翻译：公开了具有不同开关阈值的本征二极管的可切换接点（600）。可切换接头包括由第一导电材料形成的第一电极（610）和由第二导电材料形成的第二电极（630）。结（600）还包括忆阻矩阵（615），其构造成与第一和第二电极形成第一和第二电接口以形成具有第一开关阈值的第一整流二极管接口（626）和第二整流二极管接口（628）具有第二切换阈值。

5. 发明申请

WO2006115968A2 ACTIVE INTERCONNECTS AND CONTROL POINTS IN INTEGRATED CIRCUITS 审中-公开
标题翻译：集成电路中的主动互连和控制点
公开(公告)号：WO2006115968A2
公开(公告)日：2006-11-02
申请号：PCT/US2006/014856
申请日：2006-04-19
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , WILLIAMS, R., Stanley , KUEKES, Phillip, J. , PERNER, Frederick, A. , SNIDER, Gregory, S. , STEWART, Duncan
发明人： WILLIAMS, R., Stanley , KUEKES, Phillip, J. , PERNER, Frederick, A. , SNIDER, Gregory, S. , STEWART, Duncan
IPC分类号： H01L21/66
CPC分类号： H05K7/1092 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： In various embodiments of the present invention, tunable resistors (1102) are introduced at the interconnect layer of the integrated circuits (102) in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronics characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors (1102) included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains. In some cases, components and modules may be turned off, while, in other cases, components and modules may be turned on.
摘要翻译：在本发明的各种实施例中，可调谐电阻器（1102）被引入集成电路（102）的互连层，以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或配置后续制造的集成电路。例如，当诸如晶体管的某些内部部件由于制造缺陷而没有指定的电子特性时，根据本发明的实施例调整包括在集成电路的互连层中的可调电阻器（1102）的可变电阻可以用于调整内部电压和/或电平，以改善有缺陷的部件。在其他情况下，可调谐电阻器可以用作开关来配置集成电路组件，包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。在某些情况下，可能会关闭组件和模块，而在其他情况下，可能会打开组件和模块。

6. 发明申请

WO2011093888A1 OPTICAL SENSOR NETWORKS AND METHODS FOR FABRICATING THE SAME 审中-公开
标题翻译：光传感器网络及其制作方法
公开(公告)号：WO2011093888A1
公开(公告)日：2011-08-04
申请号：PCT/US2010/022640
申请日：2010-01-29
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY L.P. , CHO, Hans, S. , BRATKOVSKI, Alexandre, M. , WILLIAMS, R., Stanley , HARTWELL, Peter, George
发明人： CHO, Hans, S. , BRATKOVSKI, Alexandre, M. , WILLIAMS, R., Stanley , HARTWELL, Peter, George
IPC分类号： H04B10/12 , H04B10/00
CPC分类号： G02B6/2938 , G01D5/268 , G01N21/7703 , G01N2021/7793 , G02B6/136 , G02B6/4403
摘要： Various embodiments of the present invention are directed to sensor networks and to methods for fabricating sensor networks. In one aspect, a sensor network includes a processing node (110, 310), and one or more sensor lines (102,202,302) optically coupled to fee processing node. Each sensor line comprises a waveguide {116,216,316), and one or more sensor nodes (112,210), Each sensor node is optically coupled to the waveguide and configured to measure one or more physical conditions and encode measurement results in one or more wavelengths of light carried by the waveguide to the processing node.
摘要翻译：本发明的各种实施例涉及传感器网络以及用于制造传感器网络的方法。在一个方面，传感器网络包括处理节点（110,310）以及与费用处理节点光耦合的一个或多个传感器线（102,202,302）。每个传感器线包括波导{116,216,316）和一个或多个传感器节点（112,210），每个传感器节点光学耦合到波导并且被配置成测量一个或多个物理条件，并且在携带的光的一个或多个波长中编码测量结果通过波导到处理节点。

7. 发明申请

WO2010074689A1 MEMRISTIVE DEVICE AND METHODS OF MAKING AND USING THE SAME 审中-公开
标题翻译：测量装置及其制造和使用方法
公开(公告)号：WO2010074689A1
公开(公告)日：2010-07-01
申请号：PCT/US2008/088258
申请日：2008-12-23
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , WILLIAMS, R., Stanley , STRUKOV, Dmitri, Borisovich , BRATKOVSKI, Alexandre
发明人： WILLIAMS, R., Stanley , STRUKOV, Dmitri, Borisovich , BRATKOVSKI, Alexandre
IPC分类号： H01L27/115 , H01L21/8247 , H01L21/336 , H01L21/265
CPC分类号： H01L27/2463 , G11C13/02 , G11C2213/11 , H01L45/08 , H01L45/085 , H01L45/14 , H01L45/142 , H01L45/143 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/165 , H01L45/1658
摘要： A memristive device is disclosed herein. The device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. At least two mobile species are present in the active region. Each of the at least two mobile species is configured to define a separate state variable of the memristive device.
摘要翻译：本文公开了忆阻装置。该器件包括第一电极，第二电极和设置在第一和第二电极之间的有源区。活性区域中至少有两种移动物种。所述至少两个移动物种中的每一个被配置为限定所述忆阻器件的单独状态变量。

8. 发明申请

WO2006116534A2 NANOSCALE INTERCONNECTION INTERFACE 审中-公开
标题翻译：纳米互连接口
公开(公告)号：WO2006116534A2
公开(公告)日：2006-11-02
申请号：PCT/US2006/015882
申请日：2006-04-26
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , KUEKES, Phillip, J. , ROBINETT, Warren, J. , SEROUSSI, Gadiel , WILLIAMS, R., Stanley
发明人： KUEKES, Phillip, J. , ROBINETT, Warren, J. , SEROUSSI, Gadiel , WILLIAMS, R., Stanley
IPC分类号： G06F11/10 , G11C8/10 , G11C8/20 , G11C13/00
CPC分类号： G11C13/0023 , B82Y10/00 , G06F11/1016 , G11C8/10 , G11C11/54 , G11C13/0002 , G11C2213/77 , G11C2213/81
摘要： One embodiment of the present invention provides a demultiplexer implemented as a nonowire crossbar (3000) or a hybrid nanowire/microscale-signal-line crossbar with resistor-like nanowire junctions. The demultiplexer of one embodiment provides demultiplexing of signals input on k microscale address lines (3003, 3004) to 2 k or fewer nanowires (3006-3009), employing supplemental, internal address lines (3010, 3012) to map 2 k nanowire addresses to a larger, internal, n -bit address space, where n > k . A second demultiplexer embodiment of the present invention provides demultiplexing of signals input on n microscale address lines to 2 k nanowires, with n > k , using 2 k , well-distributed, n -bit external addresses to access the 2 k nanowires. Additional embodiments of the present invention include a method for evaluating different mappings of nanowire address to internal address-spaces of different sizes, or to evaluate mappings of nanowires to external address-spaces of different sizes, metrics for evaluating address mapping and demultiplexer designs, and demultiplexer design methods.
摘要翻译：本发明的一个实施例提供了实现为非线性横杆（3000）或具有电阻器状纳米线结的混合纳米线/微型信号线交叉开关的解复用器。一个实施例的解复用器将使用补充的内部地址线（3010,3012）的k个微米地址线（3003,3004）上输入的信号解复用到更少的纳米线（3006-3009）将2nm的纳米线地址映射到更大的内部n位地址空间，其中n> k。本发明的第二解复用器实施例提供了在n个微米级地址线上输入的信号到n≥k的二极管，使用2分布良好的分布， n位外部地址以访问2nm的纳米线。本发明的另外的实施例包括用于评估纳米线地址与不同大小的内部地址空间的不同映射的方法，或者评估纳米线与不同大小的外部地址空间的映射，用于评估地址映射和解复用器设计的度量，以及解复用器设计方法。

9. 发明申请

WO2005026957A2 DEFECT-TOLERANT AND FAULT-TOLERANT CIRCUIT INTERCONNECTIONS 审中-公开
标题翻译：缺陷容忍和容错电路互连
公开(公告)号：WO2005026957A2
公开(公告)日：2005-03-24
申请号：PCT/US2004/029333
申请日：2004-09-08
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , KUEKES, Philip, J. , WILLIAMS, R., Stanley , SEROUSSI, Gadiel
发明人： KUEKES, Philip, J. , WILLIAMS, R., Stanley , SEROUSSI, Gadiel
IPC分类号： G06F11/00
CPC分类号： G06F11/1016 , B82Y10/00 , G11C8/10 , G11C13/0014 , G11C2213/77 , G11C2213/81
摘要： Methods for increasing defect tolerance and fault tolerance in systems containing interconnected components, in which a signal level is classified as belonging to one of a plurality of different, distinguishable classes based on one or more thresholds separating the signal-level classes, and defect-and-fault tolerant systems embodying the methods. An electronic-device embodiment including an array of nanowire crossbars, the nanoscale memory elements within the nanowire crossbars addressed through conventional microelectronic address lines, and a method embodiment for providing fault-tolerant interconnection interfaces with electrically distinguishable signal levels are described. In the described embodiment, in order to interconnect microelectronic address lines with the nanowire crossbars within the electronic memory, an address encoding technique is employed to generate a number of redundant, parity-check address lines to supplement a minimally required set of address signal lines needed to access the nanoscale memory elements.
摘要翻译：用于增加包含相互连接的部件的系统中的缺陷容忍度和容错性的方法，其中根据分离信号级别类别的一个或多个阈值将信号级别分类为多个不同的可区分类别之一，以及缺陷和体现这种方法的容错系统。描述了一种电子器件实施例，其包括纳米线交叉杆阵列，通过常规微电子地址线寻址的纳米线交叉管内的纳米级存储元件，以及用于提供具有电可区分信号电平的容错互连接口的方法实施例。在所描述的实施例中，为了将微电子地址线与电子存储器内的纳米线交叉点互连，采用地址编码技术来生成多个冗余的奇偶校验地址线，以补充所需的最低要求的地址信号线组以访问纳米尺度的存储元件。

10. 发明申请

WO2011093865A1 SENSOR NODES WITH FREE-SPACE SIGNALING 审中-公开
标题翻译：具有自由空间信号的传感器
公开(公告)号：WO2011093865A1
公开(公告)日：2011-08-04
申请号：PCT/US2010/022496
申请日：2010-01-29
申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. , BRATKOVSKI, Alexandre , WILLIAMS, R., Stanley
发明人： BRATKOVSKI, Alexandre , WILLIAMS, R., Stanley
IPC分类号： G01D15/00 , G01D11/00 , G01V11/00 , H04B7/00 , G06F15/00
CPC分类号： G01V1/223 , G01D21/00
摘要： Apparatus and systems are provided for data signaling between a centralized transceiver and a plurality of sensor nodes. Each sensor node independently generates electrical power from one or more renewable sources. Each sensor node transmits data corresponding to sensed physical variables to the transceiver by free-space signaling. Large areas can be monitored by a vast array of such sensors without the need for wiring, optical fibers or other tangible interconnections.
摘要翻译：为集中收发器和多个传感器节点之间的数据信令提供装置和系统。每个传感器节点独立地从一个或多个可再生能源产生电力。每个传感器节点通过自由空间信令将与检测到的物理变量相对应的数据发送到收发器。可以通过大量这样的传感器来监视大面积的区域，而不需要布线，光纤或其它有形互连。

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