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1. 发明申请

US20080164495A1 HETEROJUNCTION BIPOLAR TRANSISTOR (HBT) WITH SELF-ALIGNED SUB-LITHOGRAPHIC METAL-SEMICONDUCTOR ALLOY BASE CONTACTS 有权
标题翻译：具有自对准亚垂直金属 - 半导体合金基底接触的异相双极晶体管（HBT）
公开(公告)号：US20080164495A1
公开(公告)日：2008-07-10
申请号：US11621864
申请日：2007-01-10
申请人： Guy M. Cohen , Francois Pagette
发明人： Guy M. Cohen , Francois Pagette
IPC分类号： H01L29/737 , H01L21/04
CPC分类号： H01L29/737 , H01L29/1004 , H01L29/66242
摘要： A heterojunction bipolar transistor structure with self-aligned sub-lithographic extrinsic base region including a self-aligned metal-semiconductor alloy and self-aligned metal contacts made to the base is disclosed. The lateral dimension of the extrinsic base region is defined by the footprint of a sacrificial spacer, and its thickness is controlled by selective epitaxy. A self-aligned semiconductor-metal alloy and self-aligned metal contacts are made to the extrinsic base using a method compatible with conventional silicon processing.
摘要翻译：公开了一种异质结双极晶体管结构，其具有包括自对准金属半导体合金和自底向金属触点的自对准亚光刻非本征基极区域。外部基极区域的横向尺寸由牺牲间隔物的覆盖层限定，并且其厚度通过选择性外延进行控制。使用与常规硅处理兼容的方法，将非对准半导体 - 金属合金和自对准金属接触制成外部基极。

2. 发明授权

US07952165B2 Heterojunction bipolar transistor (HBT) with self-aligned sub-lithographic metal-semiconductor alloy base contacts 有权
标题翻译：具有自对准亚光刻金属 - 半导体合金基底触点的异质结双极晶体管（HBT）
公开(公告)号：US07952165B2
公开(公告)日：2011-05-31
申请号：US11621864
申请日：2007-01-10
申请人： Guy M. Cohen , Francois Pagette
发明人： Guy M. Cohen , Francois Pagette
IPC分类号： H01L27/082
CPC分类号： H01L29/737 , H01L29/1004 , H01L29/66242
摘要： A heterojunction bipolar transistor structure with self-aligned sub-lithographic extrinsic base region including a self-aligned metal-semiconductor alloy and self-aligned metal contacts made to the base is disclosed. The lateral dimension of the extrinsic base region is defined by the footprint of a sacrificial spacer, and its thickness is controlled by selective epitaxy. A self-aligned semiconductor-metal alloy and self-aligned metal contacts are made to the extrinsic base using a method compatible with conventional silicon processing.
摘要翻译：公开了一种异质结双极晶体管结构，其具有包括自对准金属半导体合金和自底向金属触点的自对准亚光刻非本征基区。外部基极区域的横向尺寸由牺牲间隔物的覆盖层限定，并且其厚度通过选择性外延进行控制。使用与常规硅处理兼容的方法，将非对准半导体 - 金属合金和自对准金属接触制成外部基极。

3. 发明授权

US07585740B2 Fully silicided extrinsic base transistor 失效
标题翻译：全硅化外基晶体管
公开(公告)号：US07585740B2
公开(公告)日：2009-09-08
申请号：US11308259
申请日：2006-03-14
申请人： David C. Ahlgren , Guy M. Cohen , Christian Lavoie , Francois Pagette , Anna W. Topol
发明人： David C. Ahlgren , Guy M. Cohen , Christian Lavoie , Francois Pagette , Anna W. Topol
IPC分类号： H01L21/331
CPC分类号： H01L29/1004 , H01L29/1608 , H01L29/66242 , H01L29/66287 , H01L29/732 , H01L29/7378
摘要： A system and method comprises forming an intrinsic base on a collector. The system and method further includes forming a fully silicided extrinsic base on the intrinsic base by a self-limiting silicidation process at a predetermined temperature and for a predetermined amount of time, the silicidation substantially stopping at the intrinsic base. The system and method further includes forming an emitter which is physically insulated from the extrinsic base and the collector, and which is in physical contact with the intrinsic base.
摘要翻译：一种系统和方法包括在收集器上形成固有碱基。该系统和方法还包括通过在预定温度下的自限硅化工艺在本征基底上形成完全硅化的外在碱，并且预定量的时间，硅化物在本征碱基本上停止。该系统和方法还包括形成与外部基极和集电器物理绝缘的发射极，并与内部基极物理接触。

4. 发明申请

US20090065804A1 BIPOLAR TRANSISTOR WITH LOW RESISTANCE BASE CONTACT AND METHOD OF MAKING THE SAME 审中-公开
标题翻译：具有低电阻基底接触的双极晶体管及其制造方法
公开(公告)号：US20090065804A1
公开(公告)日：2009-03-12
申请号：US11852507
申请日：2007-09-10
申请人： Francois Pagette , Kathryn Turner Schonenberg
发明人： Francois Pagette , Kathryn Turner Schonenberg
IPC分类号： H01L29/737 , H01L21/331
CPC分类号： H01L29/66242 , H01L29/0817 , H01L29/1004 , H01L29/7371
摘要： Embodiments of the present invention provide a bipolar transistor with low resistance base contact and method of manufacturing the same. The bipolar transistor includes an emitter, a collector, and an intrinsic base between the emitter and the collector. The intrinsic base extends laterally to an extrinsic base. The extrinsic base further includes a first semiconductor material with a first bandgap and a second semiconductor material with a second bandgap that is smaller than the first bandgap.
摘要翻译：本发明的实施例提供一种具有低电阻基极触点的双极晶体管及其制造方法。双极晶体管包括在发射极和集电极之间的发射极，集电极和本征基极。本征基础横向扩展到外在基础。外部基极还包括具有第一带隙的第一半导体材料和具有小于第一带隙的第二带隙的第二半导体材料。

5. 发明授权

US07473610B2 Local collector implant structure for heterojunction bipolar transistors and method of forming the same 失效
标题翻译：用于异质结双极晶体管的局部集电极注入结构及其形成方法
公开(公告)号：US07473610B2
公开(公告)日：2009-01-06
申请号：US12047457
申请日：2008-03-13
申请人： Francois Pagette
发明人： Francois Pagette
IPC分类号： H01L21/331 , H01L21/8222
CPC分类号： H01L29/66318 , H01L29/0821 , H01L29/66242 , H01L29/7371 , H01L29/7378
摘要： A method of forming a heterojunction bipolar transistor (HBT) device is disclosed. The method includes forming an intrinsic base layer over a collector layer; forming a sacrificial block structure over the intrinsic base layer; formina a sacrificial spacer layer surrounding top and side surfaces of the sacrificial block structure; forming an extrinsic base layer over the intrinsic layer and adjacent the sacrificial spacer layer; forming a protective layer over the extrinsic base layer; removing the sacrificial spacer layer and implanting a ring shaped dopant profile within an upper portion of the collector layer, wherein the ring shaped collector implant structure corresponds to a pattern of the removed protective layer; removing the sacrificial block structure so as to expose an emitter opening; forming sidewall spacers within the emitter opening; and forming an emitter within the emitter opening, wherein the ring shaped dopant profile is disposed so as to be aligned beneath a perimeter portion of the emitter.
摘要翻译：公开了一种形成异质结双极晶体管（HBT）器件的方法。该方法包括在集电极层上形成本征基层; 在本征基层上形成牺牲块结构; 围绕牺牲块结构的顶表面和侧表面的牺牲间隔层; 在所述本征层上形成并邻近所述牺牲间隔层的非本征基层; 在外基层上形成保护层; 去除所述牺牲间隔层并在所述集电极层的上部内注入环形掺杂剂轮廓，其中所述环形集电体注入结构对应于所述去除的保护层的图案; 去除牺牲块结构以暴露发射器开口; 在发射器开口内形成侧壁间隔物; 以及在所述发射器开口内形成发射器，其中所述环形掺杂剂轮廓被设置成在所述发射体的周边部分下方对齐。

6. 发明授权

US07394113B2 Self-alignment scheme for a heterojunction bipolar transistor 有权
标题翻译：异质结双极晶体管的自对准方案
公开(公告)号：US07394113B2
公开(公告)日：2008-07-01
申请号：US11460013
申请日：2006-07-26
申请人： Francois Pagette , Anna Topol
发明人： Francois Pagette , Anna Topol
IPC分类号： H01L29/70
CPC分类号： H01L29/7378 , H01L29/66242
摘要： Embodiments herein present a structure, method, etc. for a self-alignment scheme for a heterojunction bipolar transistor (HBT). An HBT is provided, comprising an extrinsic base, a first self-aligned silicide layer over the extrinsic base, and a nitride etch stop layer above the first self-aligned silicide layer. A continuous layer is also included between the first self-aligned silicide layer and the nitride etch stop layer, wherein the continuous layer can comprise oxide. The HBT further includes spacers adjacent the continuous layer, wherein the spacers and the continuous layer separate the extrinsic base from an emitter contact. In addition, an emitter is provided, wherein the height of the emitter is less than or equal to the height of the extrinsic base. Moreover, a second self-aligned silicide layer is over the emitter, wherein the height of the second silicide layer is less than or equal to the height of the first silicide layer.
摘要翻译：本文的实施方案提供了用于异质结双极晶体管（HBT）的自对准方案的结构，方法等。提供了一种HBT，其包括非本征基极，在外部基极上的第一自对准硅化物层，以及位于第一自对准硅化物层上方的氮化物蚀刻停止层。第一自对准硅化物层和氮化物蚀刻停止层之间还包括连续层，其中连续层可以包括氧化物。 HBT还包括邻近连续层的间隔物，其中间隔物和连续层将外部碱基与发射体接触分开。此外，提供了发射器，其中发射器的高度小于或等于外部基极的高度。此外，第二自对准硅化物层在发射极之上，其中第二硅化物层的高度小于或等于第一硅化物层的高度。

7. 发明申请

US20070272946A1 SILICON GERMANIUM EMITTER 有权
公开(公告)号：US20070272946A1
公开(公告)日：2007-11-29
申请号：US11838941
申请日：2007-08-15
申请人： Francois Pagette
发明人： Francois Pagette
IPC分类号： H01L29/739
CPC分类号： H01L29/7378 , H01L29/66318
摘要： Disclosed are an improved hetero-junction bipolar transistor (HBT) structure and a method of forming the structure that incorporates a silicon-germanium emitter layer with a graded germanium profile. The graded germanium concentration creates a quasi-drift field in the neutral region of the emitter layer. This quasi-drift field induces valence bandgap grading within the emitter layer so as to accelerate movement of holes from the base layer through the emitter layer. Accelerated movement of the holes from the base layer through the emitter layer reduces emitter delay time and thereby, increases the cut-off frequency (fT) and the maximum oscillation frequency (fMAX) of the resultant HBT.

8. 发明申请

US20070235762A1 SILICON GERMANIUM EMITTER 有权
标题翻译：硅锗发射体
公开(公告)号：US20070235762A1
公开(公告)日：2007-10-11
申请号：US11308541
申请日：2006-04-04
申请人： Francois Pagette
发明人： Francois Pagette
IPC分类号： H01L31/00
CPC分类号： H01L29/7378 , H01L29/66318
摘要： Disclosed are an improved hetero-junction bipolar transistor (HBT) structure and a method of forming the structure that incorporates a silicon-germanium emitter layer with a graded germanium profile. The graded germanium concentration creates a quasi-drift field in the neutral region of the emitter layer. This quasi-drift field induces valence bandgap grading within the emitter layer so as to accelerate movement of holes from the base layer through the emitter layer. Accelerated movement of the holes from the base layer through the emitter layer reduces emitter delay time and thereby, increases the cut-off frequency (fT) and the maximum oscillation frequency (fMAX) of the resultant HBT.
摘要翻译：公开了一种改进的异质结双极晶体管（HBT）结构和形成具有分级锗型材的硅 - 锗发射极层的结构的方法。分级锗浓度在发射极层的中性区域产生准漂移场。该准漂移场引发发射极层内的价带隙分级，以加速空穴从基极层通过发射极层的移动。通过发射极层从基极层加速孔的移动减少了发射极延迟时间，从而增加了截止频率（f T T T T）和最大振荡频率（f MAX） SUB>）。

9. 发明授权

US07217988B2 Bipolar transistor with isolation and direct contacts 有权
标题翻译：双极晶体管具有隔离和直接接触
公开(公告)号：US07217988B2
公开(公告)日：2007-05-15
申请号：US10709905
申请日：2004-06-04
申请人： David C. Ahlgren , Gregory G. Freeman , Francois Pagette , Christopher M. Schnabel , Anna W. Topol
发明人： David C. Ahlgren , Gregory G. Freeman , Francois Pagette , Christopher M. Schnabel , Anna W. Topol
IPC分类号： H01L27/082
CPC分类号： H01L29/66242 , H01L29/7378
摘要： A bipolar transistor has a collector that is contacted directly beneath a base-collector junction by metallization to reduce collector resistance. A conventional reach-through and buried layer, as well as their associated resistance, are eliminated. The transistor is well isolated, nearly eliminating well-to-substrate capacitance and device-to-device leakage current. The structure provides for improved electrical performance, including improved fT, Fmax and drive current.
摘要翻译：双极晶体管具有通过金属化直接接触基极 - 集电极结下方的集电极，以降低集电极电阻。消除了常规的通孔和掩埋层以及它们的相关电阻。晶体管非常隔离，几乎消除了良好的衬底电容和器件到器件的漏电流。该结构提供了改进的电性能，包括改进的f T，F max和驱动电流。

10. 发明申请

US20060081934A1 Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same 失效
标题翻译：双极晶体管具有可选择的自对准的外部基极和其形成方法
公开(公告)号：US20060081934A1
公开(公告)日：2006-04-20
申请号：US11289915
申请日：2005-11-30
申请人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen Onge , Andreas Stricker
发明人： Marwan Khater , James Dunn , David Harame , Alvin Joseph , Qizhi Liu , Francois Pagette , Stephen Onge , Andreas Stricker
IPC分类号： H01L23/62
CPC分类号： H01L29/66287 , H01L29/1004 , H01L29/66242 , H01L29/732 , H01L29/7378
摘要： A bipolar transistor with raised extrinsic base and selectable self-alignment between the extrinsic base and the emitter is disclosed. The fabrication method may include the formation of a predefined thickness of a first extrinsic base layer of polysilicon or silicon on an intrinsic base. A dielectric landing pad is then formed by lithography on the first extrinsic base layer. Next, a second extrinsic base layer of polysilicon or silicon is formed on top of the dielectric landing pad to finalize the raised extrinsic base total thickness. An emitter opening is formed using lithography and RIE, where the second extrinsic base layer is etched stopping on the dielectric landing pad. The degree of self-alignment between the emitter and the raised extrinsic base is achieved by selecting the first extrinsic base layer thickness, the dielectric landing pad width, and the spacer width.
摘要翻译：公开了一种具有凸起的外在基极和在本征基极和发射极之间可选自对准的双极晶体管。制造方法可以包括在内在基底上形成多晶硅或硅的第一非本征基极层的预定厚度。然后通过在第一非本征基层上的光刻形成电介质着色焊盘。接下来，在电介质贴片垫的顶部上形成第二非多晶硅或硅的非本征基极层，以最终确定凸出的非本征基本总厚度。使用光刻和RIE形成发射器开口，其中第二外部基极层被蚀刻停止在电介质着色焊盘上。通过选择第一非本征基极层厚度，电介质着陆焊盘宽度和间隔物宽度来实现发射极和凸出的外部基极之间的自对准程度。

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