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    • 7. 发明授权
    • Method of fabricating a bipolar transistor having reduced collector-base capacitance
    • 制造具有减小的集电极 - 基极电容的双极晶体管的方法
    • US07462547B2
    • 2008-12-09
    • US11633380
    • 2006-12-04
    • Hiroyuki AkatsuRama DivakaruniMarwan KhaterChristopher M. SchnabelWilliam Tonti
    • Hiroyuki AkatsuRama DivakaruniMarwan KhaterChristopher M. SchnabelWilliam Tonti
    • H01L21/331H01L27/082
    • H01L29/66242H01L29/0649H01L29/0692H01L29/0821
    • A method is provided for fabricating a bipolar transistor that includes growing an epitaxial layer onto an underlaying region having a low dopant concentration and a trench isolation region defining the edges of an active region layer, implanting a portion of the epitaxial layer through a mask to define a collector region having a relatively high dopant concentration, the collector region laterally adjoining a second region of the epitaxial layer having the low dopant concentration; forming an intrinsic base layer overlying the collector region and the second region, the intrinsic base layer including an epitaxial region in conductive communication with the collector region; forming a low-capacitance region laterally separated from the collector region by the second region, the low-capacitance region including a dielectric region disposed in an undercut directly underlying the intrinsic base layer; and forming an emitter layer overlying the intrinsic base layer.
    • 提供了一种用于制造双极晶体管的方法,该双极晶体管包括将外延层生长到具有低掺杂剂浓度的衬底区域和限定有源区域层的边缘的沟槽隔离区域,通过掩模注入外延层的一部分以限定 具有相对较高掺杂剂浓度的集电极区域,所述集电极区域横向邻接所述外延层的具有低掺杂浓度的第二区域; 形成覆盖所述集电极区域和所述第二区域的本征基极层,所述本征基极层包括与所述集电极区域导通连通的外延区域; 形成由所述第二区域与所述集电极区域横向分离的低电容区域,所述低电容区域包括设置在所述本征基极层下方的底切处的电介质区域; 并形成覆盖本征基层的发射极层。