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1. 发明授权

US5965932A Contamination free source for shallow low energy junction implants using implanted molecules containing titanium and boron 失效
标题翻译：使用含有钛和硼的注入分子的浅层能量结植入物的无污染源
公开(公告)号：US5965932A
公开(公告)日：1999-10-12
申请号：US73257
申请日：1998-05-05
申请人： Gurtej S. Sandhu , Mohammed Anjum
发明人： Gurtej S. Sandhu , Mohammed Anjum
IPC分类号： H01L21/265 , H01L21/285
CPC分类号： H01L21/26513 , H01L21/26506 , H01L21/28518
摘要： A method for forming a P-type region in a semiconducting crystalline substrate by ion implantation is disclosed, wherein the implant species is an ionic molecule that contains titanium and boron.
摘要翻译：公开了一种通过离子注入在半导体晶体衬底中形成P型区的方法，其中注入物质是含有钛和硼的离子分子。

2. 发明授权

US5258637A Semiconductor devices produced according to a method which reduces contact resistance at silicide/active area interfaces 失效
标题翻译：根据降低硅化物/有源区界面处的接触电阻的方法制造的半导体器件
公开(公告)号：US5258637A
公开(公告)日：1993-11-02
申请号：US849685
申请日：1992-03-11
申请人： Gurtej S. Sandhu , Mohammed Anjum
发明人： Gurtej S. Sandhu , Mohammed Anjum
IPC分类号： H01L21/265 , H01L21/285 , H01L23/48 , H01L29/40
CPC分类号： H01L21/26506 , H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L2924/0002
摘要： Disclosed is a semiconductor processing method for reducing contact resistance between an active area and an overlying silicide resulting from diffusion of an impurity from the active area into the silicide. The method comprises implanting germanium through the contact opening and into the active area of the wafer to a peak density at an elevation which is at or above the elevation of the peak density of the conductivity enhancing impurity. A layer of metal is applied atop the wafer and into the contact opening to contact the active area. The metal and silicon within the contact opening are annealed to form a metal silicide. The annealing step consumes elemental silicon into the wafer to an elevation which is at or above the elevation of the germanium peak density. The germanium restricts diffusion of the conductivity enhancing impurity therethrough during the silicide anneal.
摘要翻译：公开了一种半导体处理方法，用于降低有源区和由有源区扩散到硅化物中而产生的上覆硅化物之间的接触电阻。该方法包括将锗通过接触开口植入到晶片的有效区域中，使其处于等于或高于导电性增强杂质峰值密度的高度处的峰值密度。将一层金属施加在晶片顶部并进入接触开口以接触有源区。接触孔内的金属和硅退火形成金属硅化物。退火步骤将元素硅消耗到晶片中至高于锗峰密度的高度的高度。锗在硅化物退火期间限制了增强导电性杂质的扩散。

3. 发明授权

US5358894A Oxidation enhancement in narrow masked field regions of a semiconductor wafer 失效
标题翻译：半导体晶片的窄掩模场区域的氧化增强
公开(公告)号：US5358894A
公开(公告)日：1994-10-25
申请号：US175481
申请日：1993-12-30
申请人： Pierre Fazan , Viju Mathews , Gurtej S. Sandhu , Mohammed Anjum , Hiang C. Chan
发明人： Pierre Fazan , Viju Mathews , Gurtej S. Sandhu , Mohammed Anjum , Hiang C. Chan
IPC分类号： H01L21/316 , H01L21/762 , H01L21/76
CPC分类号： H01L21/02238 , H01L21/02299 , H01L21/31662 , H01L21/76213 , Y10S148/116 , Y10S148/163
摘要： A LOCOS process is enhanced by enhancing the depth of field oxide in regions having a narrow field oxide width. Subsequent to forming a pattern of nitride to define the field oxide and active area, photoresist is applied to selected areas of the wafer. An impurity is then applied to the underlying semiconductor substrate in areas not protected by photoresist and nitride. The impurity results in an enhanced oxidation rate and therefore compensates for a thinning effect in selected field oxide areas, such as those having a narrow width. Subsequent formation of the field oxide results in the doped material being consumed by the oxide.
摘要翻译：通过在具有窄场氧化物宽度的区域中增强场氧化物来增强LOCOS工艺。在形成氮化物图案以限定场氧化物和有源区域之后，将光致抗蚀剂施加到晶片的选定区域。然后在不受光致抗蚀剂和氮化物保护的区域中将杂质施加到下面的半导体衬底。杂质导致增强的氧化速率，因此补偿了选择的场氧化物区域（例如具有窄宽度的区域）中的稀化效应。随后形成场氧化物导致掺杂材料被氧化物消耗。

4. 发明授权

US5108954A Method of reducing contact resistance at silicide/active area interfaces and semiconductor devices produced according to the method 失效
标题翻译：根据该方法制造的硅化物/有源区界面和半导体器件的接触电阻降低的方法
公开(公告)号：US5108954A
公开(公告)日：1992-04-28
申请号：US764352
申请日：1991-09-23
申请人： Gurtej S. Sandhu , Mohammed Anjum
发明人： Gurtej S. Sandhu , Mohammed Anjum
IPC分类号： H01L21/285
CPC分类号： H01L21/28518 , H01L21/76814 , H01L21/76843 , H01L21/76855 , H01L23/485 , H01L2924/0002 , Y10S148/019
摘要： Disclosed is a semiconductor processing method for reducing contact resistance between an active area and an overlying silicide resulting from diffusion of an impurity from the active area into the silicide. The method comprises implanting germanium through the contact opening and into the active area of the wafer to a peak density at an elevation which is at or above the elevation of the peak density of the conductivity enhancing impurity. A layer of metal is applied atop the wafer and into the contact opening to contact the active area. The metal and silicon within the contact opening are annealed to form a metal silicide. The annealing step consumes elemental silicon into the wafer to an elevation which is at or above the elevation of the germanium peak density. The germanium restricts diffusion of the conductivity enhancing impurity therethrough during the silicide anneal.
摘要翻译：公开了一种半导体处理方法，用于降低有源区和由有源区扩散到硅化物中而产生的上覆硅化物之间的接触电阻。该方法包括将锗通过接触开口植入到晶片的有效区域中，使其处于等于或高于导电性增强杂质峰值密度的高度处的峰值密度。将一层金属施加在晶片顶部并进入接触开口以接触有源区。接触孔内的金属和硅退火形成金属硅化物。退火步骤将元素硅消耗到晶片中至高于锗峰密度的高度的高度。锗在硅化物退火期间限制了增强导电性杂质的扩散。

5. 发明授权

US5891791A Contamination free source for shallow low energy junction implants 失效
标题翻译：浅层低能量结植入物的无污染源
公开(公告)号：US5891791A
公开(公告)日：1999-04-06
申请号：US863993
申请日：1997-05-27
申请人： Gurtej S. Sandhu , Mohammed Anjum
发明人： Gurtej S. Sandhu , Mohammed Anjum
IPC分类号： H01L21/265 , H01L21/285
CPC分类号： H01L21/26513 , H01L21/26506 , H01L21/28518
摘要： A method for forming a P-type region in a semiconducting crystalline substrate by ion implantation is disclosed, wherein the implant specie is an ionic molecule that contains titanium and boron.
摘要翻译：公开了一种通过离子注入在半导体晶体衬底中形成P型区域的方法，其中植入物是含有钛和硼的离子分子。

6. 发明授权

US06482719B1 Semiconductor field region implant methodology 失效
标题翻译：半导体领域植入方法
公开(公告)号：US06482719B1
公开(公告)日：2002-11-19
申请号：US08526149
申请日：1995-08-02
申请人： Mohammed Anjum , Alan L. Stuber , Maung H. Kyaw
发明人： Mohammed Anjum , Alan L. Stuber , Maung H. Kyaw
IPC分类号： H01L2130
CPC分类号： H01L21/76216 , H01L21/823481
摘要： An MOS device is provided having a channel-stop implant placed between active regions and beneath field oxides. The channel-stop dopant material is a p-type material of atomic weight greater than boron, and preferably utilizes solely indium ions. The indium ions, once implanted, have a greater tendency to remain in their position than boron ions. Subsequent temperature cycles caused by, for example, field oxide growth do not significantly change the initial implant position. Thus, NMOS devices utilizing indium channel-stop dopant can achieve higher pn junction breakdown voltages and lower parasitic source/drain-to-substrate capacitances. Furthermore, the heavier indium ions can be more accurately placed than lighter boron ions to a region just below the silicon layer which is to be consumed by subsequent field oxide growth. By fixing the peak concentration density of indium at a depth just below the field oxide lower surface, channel-stop implant region is very shallow. Small dispersions in range allow for more precise control of the indium atoms just below the field oxide, further from the inner bulk material of the underlying substrate.
摘要翻译：提供了MOS器件，其具有放置在有源区域之间和场氧化物之下的通道停止植入物。通道阻挡掺杂剂材料是原子量大于硼的p型材料，并且优选仅使用铟离子。一旦注入，铟离子比硼离子具有更大的保留位置的倾向。由例如场氧化物生长引起的后续温度循环不会显着改变初始植入位置。因此，利用铟通道停止掺杂剂的NMOS器件可以实现更高的pn结击穿电压和较低的寄生源/漏极到衬底电容。此外，较重的铟离子可以比较轻的硼离子更准确地放置在正好在随后的场氧化物生长消耗的硅层之下的区域。通过在刚好低于场氧化物下表面的深度固定铟的峰浓度密度，通道停止注入区非常浅。范围内的小分散体允许对场氧化物正下方的铟原子进行更精确的控制，远离底层基底的内部体积材料。

7. 发明授权

US5593907A Large tilt angle boron implant methodology for reducing subthreshold current in NMOS integrated circuit devices 失效
标题翻译：用于降低NMOS集成电路器件中的亚阈值电流的大倾角硼注入方法
公开(公告)号：US5593907A
公开(公告)日：1997-01-14
申请号：US400609
申请日：1995-03-08
申请人： Mohammed Anjum , Klaus H. Koop , Maung H. Kyaw
发明人： Mohammed Anjum , Klaus H. Koop , Maung H. Kyaw
IPC分类号： H01L21/265 , H01L21/336 , H01L29/423 , H01L29/78
CPC分类号： H01L29/6659 , H01L21/26513 , H01L21/26586 , H01L29/42376 , H01L29/7833
摘要： A semiconductor structure with large tile angle boron implant is provided for reducing threshold shifts or rolloff at the channel edges. By minimizing threshold shifts, short channel effects and subthreshold currents at or near the substrate surface are lessened. The semiconductor structure is prepared by implanting boron at a non-perpendicular into the juncture between the channel and the source/drain as well as the juncture between the field areas and the source/drain. Placement of boron into these critical regions replenishes segregating and redistributing threshold adjust implant species and channel stop implant species resulting from process temperature cycles. Using lighter boron ions allow for a lesser annealing temperature and thereby avoids the disadvantages of enhanced redistribution and diffusion caused by high temperature anneal.
摘要翻译：提供了具有大瓦片角度硼注入的半导体结构，用于减少通道边缘处的阈值偏移或滚降。通过最小化阈值偏移，减小衬底表面处或附近的短沟道效应和亚阈值电流。半导体结构通过在非垂直方向上注入硼，在沟道和源极/漏极之间的接合处以及场区域和源极/漏极之间的接合处来制备。将硼置入这些关键区域补充了分离和重新分配由工艺温度循环产生的阈值调整植入物种和通道停止植入物种。使用较轻的硼离子允许较小的退火温度，从而避免了由高温退火引起的增强再分配和扩散的缺点。

8. 发明授权

US5470794A Method for forming a silicide using ion beam mixing 失效
标题翻译：使用离子束混合形成硅化物的方法
公开(公告)号：US5470794A
公开(公告)日：1995-11-28
申请号：US200628
申请日：1994-02-23
申请人： Mohammed Anjum , Ibrahim K. Burki , Craig W. Christian
发明人： Mohammed Anjum , Ibrahim K. Burki , Craig W. Christian
IPC分类号： H01L21/265 , H01L21/285 , H01L21/336 , H01L21/283
CPC分类号： H01L29/66575 , H01L21/26506 , H01L21/26526 , H01L21/28518 , Y10S148/019
摘要： An improved method is provided for fabricating a metal silicide upon a semiconductor substrate. The method utilizes ion beam mixing by implanting germanium to a specific elevation level within a metal layer overlying a silicon contact region. The implanted germanium atoms impact upon and move a plurality of metal atoms through the metal-silicon interface and into a region residing immediately below the silicon (or polysilicon) surface. The metal atoms can therefore bond with silicon atoms to cause a pre-mixing of metal with silicon near the interface in order to enhance silicidation. Germanium is advantageously chosen as the irradiating species to ensure proper placement of the germanium and ensuing movement of dislodged metal atoms necessary for minimizing oxides left in the contact windows and lattice damage within the underlying silicon (or polysilicon).
摘要翻译：提供了一种用于在半导体衬底上制造金属硅化物的改进方法。该方法通过将锗注入到覆盖硅接触区域的金属层内的特定高度水平上来利用离子束混合。植入的锗原子冲击并移动多个金属原子通过金属 - 硅界面并移动到位于硅（或多晶硅）表面正下方的区域中。因此，为了增强硅化物，金属原子可以与硅原子键合以在界面附近引起金属与硅的预混合。有利地，锗被选择为照射种类，以确保锗的适当放置和随后的移动的金属原子的移动，以使残留在接触窗口中的氧化物和底层硅（或多晶硅）中的晶格损伤最小化。

9. 发明授权

US5633177A Method for producing a semiconductor gate conductor having an impurity migration barrier 失效
标题翻译：一种具有杂质迁移屏障的半导体栅极导体的制造方法
公开(公告)号：US5633177A
公开(公告)日：1997-05-27
申请号：US194985
申请日：1993-11-08
申请人： Mohammed Anjum
发明人： Mohammed Anjum
IPC分类号： H01L21/28 , H01L21/336 , H01L21/265
CPC分类号： H01L29/66575 , H01L21/28052
摘要： A PMOS device is provided having a diffusion barrier placed within the polysilicon gate. The diffusion barrier is purposefully deposited to a concentration peak density within the gate which is deeper than subsequently placed impurity dopant. The barrier comprises germanium atoms placed in fairly close proximity to one another within the gate conductor, and the impurity dopant comprises an ionized compound of BF.sub.2 subsequently placed as boron within the gate and source/drain region, at least a majority and preferably greater than eighty percent of which are placed shallower within the gate than the germanium atoms. The barrier region substantially prevents or retards penetration of boron atoms through the gate oxide and into the channel region. Thus, the barrier helps prevent change in channel concentration and problems associated with boron penetration such as flatband voltage (Vfb) and threshold voltage (Vth) shift.
摘要翻译：提供PMOS器件，其具有放置在多晶硅栅极内的扩散势垒。扩散阻挡层被有目的地沉积到栅极内的浓度峰值密度，其比随后放置的杂质掺杂物更深。阻挡层包括在栅极导体内彼此非常接近地放置的锗原子，杂质掺杂剂包括随后在栅极和源极/漏极区中放置为硼的电离化合物BF 2，至少大部分，优选大于八十其中百分之一比锗原子在门内更浅。阻挡区域基本上防止或阻止硼原子穿过栅极氧化物并进入沟道区域。因此，屏障有助于防止通道浓度的变化和与硼渗透相关的问题，例如平带电压（Vfb）和阈值电压（Vth）偏移。

10. 发明授权

US5444024A Method for low energy implantation of argon to control titanium silicide formation 失效
标题翻译：用于低能量注入氩气以控制硅化钛形成的方法
公开(公告)号：US5444024A
公开(公告)日：1995-08-22
申请号：US258542
申请日：1994-06-10
申请人： Mohammed Anjum , Ibrahim K. Burki , Craig W. Christian
发明人： Mohammed Anjum , Ibrahim K. Burki , Craig W. Christian
IPC分类号： H01L21/285 , H01L21/265 , H01L21/28
CPC分类号： H01L21/28518 , Y10S148/019 , Y10S148/144
摘要： A method is provided for controlling growth of silicide to a defined thickness based upon the relative position of peak concentration density depth within a layer of titanium. The titanium layer is deposited over silicon and namely over the silicon junction regions. Thereafter the titanium is implanted with argon ions. The argon ions are implanted at a peak concentration density level corresponding to a depth relative to the upper surface of the titanium. The peak concentration density depth can vary depending upon the dosage and implant energies of the ion implanter. Preferably, the peak concentration density depth is at a midpoint between the upper and lower surfaces of the titanium or at an elevational level beneath the midpoint and above the lower surface of the titanium. Subsequent anneal of the argon-implanted titanium causes the argon atoms to occupy a diffusion area normally taken by silicon consumed and growing within overlying titanium. However, based upon the presence of argon, the diffusion length and therefore the silicide thickness is reduced to a controllable amount necessary for applications with ultra-shallow junction depths.
摘要翻译：提供了一种基于钛层内的峰浓度密度深度的相对位置来控制硅化物的规定厚度的方法。钛层沉积在硅上，即在硅结区上。之后，用氩离子注入钛。以与钛的上表面相对应的深度的峰值浓度密度水平注入氩离子。峰浓度密度深度可以根据离子注入机的剂量和植入能量而变化。优选地，峰浓度密度深度处于钛的上表面和下表面之间的中点处，或者在钛的下表面上方的中点以上。氩注入钛的后续退火导致氩原子占据通常被硅消耗并在上覆钛内生长的扩散区域。然而，基于氩的存在，扩散长度以及因此的硅化物厚度减小到具有超浅结深度的应用所需的可控量。

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