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1. 发明申请

US20120229890A1 Optical Devices and Method of Counting Optical Pulses 有权
标题翻译：光学器件和计数光脉冲的方法
公开(公告)号：US20120229890A1
公开(公告)日：2012-09-13
申请号：US13496190
申请日：2009-10-20
申请人： Gianluca Meloni , Antonella Bogoni , Antonio D'Errico , Gianluca Berrettini , Luca Poti
发明人： Gianluca Meloni , Antonella Bogoni , Antonio D'Errico , Gianluca Berrettini , Luca Poti
IPC分类号： H01S5/20 , H04J14/00
CPC分类号： G06E1/00 , G02F3/02 , G06E1/02 , H04Q11/0005 , H04Q11/0066 , H04Q2011/0041
摘要： An optical device comprises an optical device stage, which comprises an optical input, an optical AND gate, an optical flip-flop and an optical output. The optical input is arranged to receive an optical input pulse at an input wavelength. The optical AND gate comprises a first input arranged to receive a part of said optical input pulse, a second input arranged to receive at least a part of a flip-flop optical output signal, and an output. The optical AND gate is arranged to generate an AND gate optical output pulse dependent on said flip-flop optical output signal. The optical flip-flop comprises a first input arranged to receive a further part of said optical input pulse, a second input arranged to receive a said AND gate optical output pulse, and an output. The optical flip-flop is arranged to generate said flip-flop output signal at a flip-flop output wavelength. At least a part of the flip-flop output signal is provided to said output.
摘要翻译：光学器件包括光学器件级，其包括光学输入，光学与门，光学触发器和光学输出。光输入被布置成在输入波长处接收光输入脉冲。光学与门包括布置成接收所述光输入脉冲的一部分的第一输入，布置成接收触发器光输出信号的至少一部分的第二输入和输出。光与门被配置为根据所述触发器光输出信号产生与门光输出脉冲。光学触发器包括布置成接收所述光学输入脉冲的另一部分的第一输入，被布置为接收所述与门光输出脉冲的第二输入和输出。光触发器被布置为以触发器输出波长产生所述触发器输出信号。触发器输出信号的至少一部分被提供给所述输出。

2. 发明授权

US08717651B2 Optical devices and method of counting optical pulses 有权
标题翻译：光学器件和光脉冲计数方法
公开(公告)号：US08717651B2
公开(公告)日：2014-05-06
申请号：US13496190
申请日：2009-10-20
申请人： Gianluca Meloni , Antonella Bogoni , Antonio D'Errico , Gianluca Berrettini , Luca Poti
发明人： Gianluca Meloni , Antonella Bogoni , Antonio D'Errico , Gianluca Berrettini , Luca Poti
IPC分类号： G02F3/02 , G06E1/00
CPC分类号： G06E1/00 , G02F3/02 , G06E1/02 , H04Q11/0005 , H04Q11/0066 , H04Q2011/0041
摘要： An optical device comprises an optical device stage, which comprises an optical input, an optical AND gate, an optical flip-flop and an optical output. The optical input is arranged to receive an optical input pulse at an input wavelength. The optical AND gate comprises a first input arranged to receive a part of said optical input pulse, a second input arranged to receive at least a part of a flip-flop optical output signal, and an output. The optical AND gate is arranged to generate an AND gate optical output pulse dependent on said flip-flop optical output signal. The optical flip-flop comprises a first input arranged to receive a further part of said optical input pulse, a second input arranged to receive a said AND gate optical output pulse, and an output. The optical flip-flop is arranged to generate said flip-flop output signal at a flip-flop output wavelength. At least a part of the flip-flop output signal is provided to said output.
摘要翻译：光学器件包括光学器件级，其包括光学输入，光学与门，光学触发器和光学输出。光输入被布置成在输入波长处接收光输入脉冲。光学与门包括布置成接收所述光输入脉冲的一部分的第一输入，布置成接收触发器光输出信号的至少一部分的第二输入和输出。光与门被配置为根据所述触发器光输出信号产生与门光输出脉冲。光学触发器包括布置成接收所述光学输入脉冲的另一部分的第一输入，被布置为接收所述与门光输出脉冲的第二输入和输出。光触发器被布置为以触发器输出波长产生所述触发器输出信号。触发器输出信号的至少一部分被提供给所述输出。

3. 发明授权

US08369711B2 Ethernet transmitter apparatus 失效
标题翻译：以太网发射机设备
公开(公告)号：US08369711B2
公开(公告)日：2013-02-05
申请号：US12677165
申请日：2008-03-17
申请人： Mirco Scaffardi , Gianluca Berrettini , Rodolfo Di Muro , Bimal Nayar , Antonella Bogoni , Luca Poti
发明人： Mirco Scaffardi , Gianluca Berrettini , Rodolfo Di Muro , Bimal Nayar , Antonella Bogoni , Luca Poti
IPC分类号： H04B10/12
CPC分类号： H04J14/06 , H04J14/08
摘要： An optical transmitter apparatus comprises at least three input transmitters that each provide at an output an NRZ optical signal, at least two of the NRZ optical signals having substantially the same bit rate, each of the signals having a bit rate which is less than 100 Gbit/s and the sum of the bit rates of all of the at least three transmitters being equal to or greater than 100 Gbit/s, an NRZ to RZ converter associated with each transmitter which converts each NRZ signal into an optical RZ signal, an optical time division multiplexer which converts the RZ signals into at least two further signals, and a polarization multiplexer which processes the two further signals to provide two output signals of differing polarization.
摘要翻译：光发射机装置包括至少三个输入发射机，每个至少三个输入发射机在输出端提供NRZ光信号，NRZ光信号中的至少两个具有基本上相同的比特率，每个信号的比特率小于100Gbit / s，并且所有至少三个发射机的比特率的总和等于或大于100Gbit / s，与每个发射机相关联的NRZ至RZ转换器，其将每个NRZ信号转换为光学RZ信号，光学时分复用器，其将RZ信号转换为至少两个另外的信号;以及偏振复用器，其处理两个另外的信号以提供两个不同极化的输出信号。

4. 发明申请

US20110122470A1 OPTICAL FLIP-FLOP 有权
公开(公告)号：US20110122470A1
公开(公告)日：2011-05-26
申请号：US12989598
申请日：2008-04-25
申请人： Gianluca Berrettini , Antonio Malacarne , Luca Poti , Antonella Bogoni
发明人： Gianluca Berrettini , Antonio Malacarne , Luca Poti , Antonella Bogoni
IPC分类号： G02F3/02 , G02F1/00
CPC分类号： G02F3/026 , G02F2203/70
摘要： An optical flip-flop comprises first (102) and second (104) flip-flop elements arranged to respectively provide first (output 1) and second (output 3) optical outputs. Each output is in one of a plurality of states, wherein switching the output from a relatively high power state to a relatively low power state has an associated falling edge transition time, and switching the output from a relatively low power state to a relatively high power state has an associated rising edge transition time. The rising edge transition time is greater than the falling edge transition time. The optical flip-flop also comprises a processor (106) arranged to process the first and second outputs to provide an optical flip-flop output, being one of a plurality of state outputs, wherein switching the flip-flop output from a relatively high power state to a relatively low power state has an associated falling edge transition time, and switching the flip-flop output from a relatively low power state to a relatively high power state has an associated rising edge transition time. The processor is arranged to process the first and second outputs such that both the falling edge transition time and the rising edge transition time of the flip-flop output are independent of the rising edge transition times of both the first and second flip-flop elements. The invention also provides a method of operating the flip-flop, an optical switching arrangement and an optical switching method.
摘要翻译：光学触发器包括布置成分别提供第一（输出1）和第二（输出3）光输出的第一（102）和第二（104）触发器元件。每个输出处于多个状态之一，其中将输出从相对高功率状态切换到相对低功率状态具有相关联的下降沿转换时间，并且将输出从相对低功率状态切换到相对较高的功率状态具有相关联的上升沿转换时间。上升沿转换时间大于下降沿转换时间。光学触发器还包括处理器（106），其被配置为处理第一和第二输出以提供作为多个状态输出之一的光学触发器输出，其中将触发器输出从相对高的功率切换状态到相对低功率状态具有相关联的下降沿转换时间，并且将触发器输出从相对低功率状态切换到相对高功率状态具有相关联的上升沿转换时间。处理器被布置为处理第一和第二输出，使得触发器输出的下降沿转换时间和上升沿转换时间都与第一和第二触发器元件的上升沿转换时间无关。本发明还提供了一种操作触发器，光开关装置和光开关方法的方法。

5. 发明申请

US20110110671A1 Optical Networks 审中-公开
标题翻译：光网络
公开(公告)号：US20110110671A1
公开(公告)日：2011-05-12
申请号：US12936209
申请日：2008-04-09
申请人： Antonella Bogoni , Luca Poti , Francesco Fresi , Fabio Cavaliere , Gianluca Berrettini
发明人： Antonella Bogoni , Luca Poti , Francesco Fresi , Fabio Cavaliere , Gianluca Berrettini
IPC分类号： H04B10/02 , H04B10/06 , H04B10/04
CPC分类号： H04B10/2587 , H04J14/02 , H04J14/0226 , H04J14/0246 , H04J14/0247 , H04J14/025 , H04J14/0252 , H04J14/0282 , H04J2014/0253
摘要： Improvements in or relating to Optical Networks. The invention relates to improvements in or relating to optical networks, and methods and an apparatus for providing communications services. Receiving an optical signal is described comprising a carrier wavelength and optical data. The optical data is substantially erased, and the carrier wavelength is re-modulated with user data for onward transmission of the user data.
摘要翻译：光网络改进或涉及光网络。本发明涉及光网络的改进或涉及光网络，以及用于提供通信服务的方法和装置。描述了接收光信号，其包括载波波长和光数据。基本上擦除光学数据，并且用用户数据重新调制载波波长，用于向前发送用户数据。

6. 发明申请

US20090060501A1 All Optical Batcher Banyan Switch, Batcher Switch, Banyan Switch and Contention Manager 失效
标题翻译：所有光批发器榕树开关，蝙蝠侠交换机，悦榕庄交换机和竞争管理器
公开(公告)号：US20090060501A1
公开(公告)日：2009-03-05
申请号：US12183637
申请日：2008-07-31
申请人： Antonella Bogoni , Luca Poti , Nicola Andriolli , Mirco Scaffardi , Gianluca Berrettini , Piero Castoldi
发明人： Antonella Bogoni , Luca Poti , Nicola Andriolli , Mirco Scaffardi , Gianluca Berrettini , Piero Castoldi
IPC分类号： H04J14/00
CPC分类号： H04Q11/0005 , H04Q11/0066 , H04Q2011/0041 , H04Q2011/005 , H04Q2011/0054
摘要： An all-optical contention manager includes at least two inputs and at least two outputs. The outputs are configured to output signals to a Banyan switch. The contention manager detects and resolves routing contentions between incoming optical signals prior to outputting the signals to the Banyan switch. The signals have tags that include routing information. A photonic comparator in the contention manager compares the tags of incoming optical signals in order to detect contention.
摘要翻译：全光争用管理器至少包括两个输入和至少两个输出。输出被配置为向Banyan开关输出信号。竞争管理器在将信号输出到悦榕庄交换机之前检测并解决输入光信号之间的路由争用。这些信号具有包括路由信息的标签。竞争管理器中的光子比较器比较输入光信号的标签，以便检测竞争。

7. 发明授权

US08542422B2 Optical flip-flop 有权
标题翻译：光学触发器
公开(公告)号：US08542422B2
公开(公告)日：2013-09-24
申请号：US12989598
申请日：2008-04-25
申请人： Gianluca Berrettini , Antonio Malacarne , Luca Poti , Antonella Bogoni
发明人： Gianluca Berrettini , Antonio Malacarne , Luca Poti , Antonella Bogoni
IPC分类号： G06E3/00
CPC分类号： G02F3/026 , G02F2203/70
摘要： An optical flip-flop comprises first (102) and second (104) flip-flop elements arranged to respectively provide first (output 1) and second (output 3) optical outputs. Each output is in one of a plurality of states, wherein switching the output from a relatively high power state to a relatively low power state has an associated falling edge transition time, and switching the output from a relatively low power state to a relatively high power state has an associated rising edge transition time. The rising edge transition time is greater than the falling edge transition time. The optical flip-flop also comprises a processor (106) arranged to process the first and second outputs to provide an optical flip-flop output, being one of a plurality of state outputs, wherein switching the flip-flop output from a relatively high power state to a relatively low power state has an associated falling edge transition time, and switching the flip-flop output from a relatively low power state to a relatively high power state has an associated rising edge transition time. The processor is arranged to process the first and second outputs such that both the falling edge transition time and the rising edge transition time of the flip-flop output are independent of the rising edge transition times of both the first and second flip-flop elements. The invention also provides a method of operating the flip-flop, an optical switching arrangement and an optical switching method.
摘要翻译：光学触发器包括布置成分别提供第一（输出1）和第二（输出3）光输出的第一（102）和第二（104）触发器元件。每个输出处于多个状态之一，其中将输出从相对高功率状态切换到相对低功率状态具有相关联的下降沿转换时间，并且将输出从相对低功率状态切换到相对较高的功率状态具有相关联的上升沿转换时间。上升沿转换时间大于下降沿转换时间。光学触发器还包括处理器（106），其被配置为处理第一和第二输出以提供作为多个状态输出之一的光学触发器输出，其中将触发器输出从相对高的功率切换状态到相对低功率状态具有相关联的下降沿转换时间，并且将触发器输出从相对低功率状态切换到相对高功率状态具有相关联的上升沿转换时间。处理器被布置为处理第一和第二输出，使得触发器输出的下降沿转换时间和上升沿转换时间都与第一和第二触发器元件的上升沿转换时间无关。本发明还提供了一种操作触发器，光开关装置和光开关方法的方法。

8. 发明授权

US08149488B2 Method of operating a reconfigurable and integrable optical logic gate based on a single SOA 有权
标题翻译：基于单个SOA操作可重构和可积分的光逻辑门的方法
公开(公告)号：US08149488B2
公开(公告)日：2012-04-03
申请号：US12088585
申请日：2006-09-22
申请人： Antonella Bogoni , Luca Poti , Gianluca Berrettini , Antonio Malacarne
发明人： Antonella Bogoni , Luca Poti , Gianluca Berrettini , Antonio Malacarne
IPC分类号： G02F3/00
CPC分类号： G02F3/00
摘要： An optical logic gate (10) comprising inputs (12) for optical signals on which to perform a chosen logical operation. An SOA (11) element receives such input signals to be piloted thereby in saturation and its output is connected to at least one optical filter (14, 15, 16) that filters components of signals output from the SOA and which represent a desired logical result of the signals input at the gate so that at the output (13) of the filter there is an optical signal as the result of the desired logical operation. A probe signal (17) can also be provided. An appropriate combination of power of the input, power and probe signal wavelength and central wavelength of the filter allows obtaining a plurality of logic functions such as NOR, NOT, inverted XOR, AND, OR.
摘要翻译：光学逻辑门（10）包括用于执行选择的逻辑运算的光信号的输入（12）。 SOA（11）元件接收这样的输入信号以在饱和中被引导，并且其输出连接到至少一个滤光器（14,15,16），该滤光器对从SOA输出的信号的分量进行滤波，并且代表期望的逻辑结果在门处输入的信号，使得在滤波器的输出端（13）处有作为所需逻辑运算结果的光信号。还可以提供探测信号（17）。滤波器的输入，功率和探头信号波长的功率与中心波长的适当组合允许获得多个逻辑功能，例如NOR，NOT，反相XOR，AND，OR。

9. 发明授权

US08134777B2 Optical switch assembly and network incorporating same 有权
标题翻译：光开关组合和集成的网络
公开(公告)号：US08134777B2
公开(公告)日：2012-03-13
申请号：US12442268
申请日：2006-09-22
申请人： Gianluca Berrettini , Antonella Bogoni , Luca Poti
发明人： Gianluca Berrettini , Antonella Bogoni , Luca Poti
IPC分类号： H01S5/00 , H04J14/00 , H04B10/12
CPC分类号： H01S5/50 , H01S5/40 , H01S5/4025
摘要： An optical switch assembly comprising at least two optical amplifiers (10, 20), means for applying a first input signal to one end of both amplifiers (10, 20) and a second input signal to another end, and means for simultaneously driving one or other of the amplifiers into a saturated state whilst the other is unsaturated such that only the amplifier that is unsaturated provides any significant amplification to the input signals at each end, and means for feeding the amplified output signals from the amplifiers to at least two output nodes such that the two amplifiers (10, 20) are connected to the two output nodes in opposite connections.
摘要翻译：一种光开关组件，包括至少两个光放大器（10,20），用于将第一输入信号施加到两个放大器（10,20）的一端并将另一端的第二输入信号施加到第一输入信号的装置，以及用于同时驱动一个或其他放大器进入饱和状态，而另一个是不饱和的，使得只有不饱和的放大器对每端的输入信号提供任何显着的放大，以及用于将放大的输出信号从放大器馈送到至少两个输出节点使得两个放大器（10,20）以相反的连接连接到两个输出节点。

10. 发明申请

US20080247018A1 Reconfigurable and Integrable Optical Logic Gate Based on a Single Soa 有权
标题翻译：基于单一Soa的可重构和可集成的光逻辑门
公开(公告)号：US20080247018A1
公开(公告)日：2008-10-09
申请号：US12088585
申请日：2006-09-22
申请人： Antonella Bogoni , Luca Poti , Gianluca Berrettini , Antonio Malacarne
发明人： Antonella Bogoni , Luca Poti , Gianluca Berrettini , Antonio Malacarne
IPC分类号： G02F3/00
CPC分类号： G02F3/00
摘要： An optical logic gate (10) comprising inputs (12) for optical signals on which to perform a chosen logical operation. An SOA (11) element receives such input signals to be piloted thereby in saturation and its output is connected to at least one optical filter (14, 15, 16) that filters components of signals output from the SOA and which represent a desired logical result of the signals input at the gate so that at the output (13) of the filter there is an optical signal as the result of the desired logical operation. A probe signal (17) can also be provided. An appropriate combination of power of the input, power and probe signal wavelength and central wavelength of the filter allows obtaining a plurality of logic functions such as NOR, NOT, inverted XOR, AND, OR.
摘要翻译：光学逻辑门（10）包括用于执行选择的逻辑运算的光信号的输入（12）。 SOA（11）元件接收这样的输入信号以在饱和中被引导，并且其输出连接到至少一个滤光器（14,15,16），该滤光器对从SOA输出的信号的分量进行滤波，并且代表期望的逻辑结果在门处输入的信号，使得在滤波器的输出端（13）处有作为所需逻辑运算结果的光信号。还可以提供探测信号（17）。滤波器的输入，功率和探头信号波长的功率与中心波长的适当组合允许获得多个逻辑功能，例如NOR，NOT，反相XOR，AND，OR。

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