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    • 7. 发明授权
    • Semiconductor amplifier
    • 半导体放大器
    • US5270668A
    • 1993-12-14
    • US856446
    • 1992-03-24
    • Yukio IkedaGen ToyoshimaKiyoharu SeinoTadashi Takagi
    • Yukio IkedaGen ToyoshimaKiyoharu SeinoTadashi Takagi
    • H03F3/60H03F3/193
    • H03F3/601
    • A small-sized, high-efficiency semiconductor amplifier exhibits a satisfactory efficiency characteristic over a wide band and a low output level for secondary and tertiary higher harmonics. The semiconductor amplifier is equipped with an output circuit which is composed of a parallel resonance circuit for the secondary higher harmonic of the fundamental-operation frequency, a first connection line, a second connection line, and an open-end line having a length corresponding to approximately 1/4 of the wavelength of the tertiary higher harmonic, the drain terminal of FETs leading to the output circuit being connected to one end of the parallel resonance circuit through the first connection line, an open point being formed at one end of the parallel resonance circuit, the other end of the parallel resonance circuit for the secondary higher harmonic being connected to the open-end line having a length corresponding to approximately 1/4 of the wavelength of the tertiary higher harmonic through the second connection line, the length and width of the first connection line being adjusted to determine the secondary-higher-harmonic load-reflection coefficient of the FETs as seen from the drain thereof to such a value as will maximize the efficiency of the amplifier, the length and width of the second connection line being appropriately adjusted so as to adjust the impedance matching conditions with respect to the fundamental wave.
    • 小型,高效率半导体放大器在宽频带上表现出令人满意的效率特性,对于二次和三次高次谐波具有低输出电平。 半导体放大器配备有输出电路,其由用于基波运算频率的次高次谐波的并联谐振电路,第一连接线,第二连接线和开口端线组成,长度对应于 三分之一高次谐波的波长的大约1/4,导通输出电路的FET的漏极端子通过第一连接线连接到并联谐振电路的一端,开口点形成在并联的一端 谐振电路,用于次级高次谐波的并联谐振电路的另一端连接到具有对应于通过第二连接线的三次高次谐波的波长的大约1/4的长度的开路线,长度和 第一连接线的宽度被调整以确定如图f所示的FET的二次高次谐波负载反射系数 将其漏极设定为使放大器的效率最大化的值,适当调整第二连接线的长度和宽度,以便调整相对于基波的阻抗匹配条件。