专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2004088731A2 METHODS FOR FABRICATING THREE-DIMENSIONAL ALL ORGANIC INTERCONNECT STRUCTURES 审中-公开
标题翻译：制造三维有机互连结构的方法
公开(公告)号：WO2004088731A2
公开(公告)日：2004-10-14
申请号：PCT/US2004/009458
申请日：2004-03-29
申请人： GEORGIA TECH RESEARCH CORPORATION , WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
发明人： WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
IPC分类号： H01L21/00
CPC分类号： B32B37/00 , H01F17/0033 , H01F41/041 , H01L21/4857 , H01L25/0652 , H01L27/08 , H01L2224/16 , H01L2224/16235 , H01L2224/48235 , H01L2924/00014 , H01L2924/01012 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/19041 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H05K1/00 , H05K1/162 , H05K1/167 , H05K3/4617 , H05K3/4632 , H05K3/4688 , H05K2201/0129 , H05K2201/0141 , H05K2201/0209 , Y10T29/49126 , Y10T29/49149 , Y10T29/49158 , H01L2224/0401
摘要： The present invention comprises methods for making three-dimensional (3-D) liquid crystalline polymer (LCP) interconnect structures using a high temperature singe sided liquid crystalline polymer, and low temperature single sided liquid crystalline polymer, whereas both the high temperature LCP and the low temperature LCP are drilled using a laser or mechanical drill or mechanically punch to form a z-axis connection. The single sided Conductive layer is used as a bus layer to form z axis conductive stud within the high temperature and low temperature LCP, followed by deposition of a metallic capping layer of the stud that serves as the bonding metal between the conductive interconnects to form the z-axis electrical connection. High temperature and low temperature LCP circuit layers are etched or built up to form circuit patterns and subsequently bonded together to form final 3-D multilayer circuit pattern whereas the low temperature LCP melts to form both dielectric to dielectric bond to high temperature LCP circuit layer, and dielectric to conductive bond, whereas, metal to metal bonding occurs with high temperature metal capping layer bonding to conductive metal layer. The resultant structure is then packaged using two metallized organic cores that are laminated onto either side of the device using a low temperature adhesive with similar electrical properties and subsequently metallized to form the input output terminals and EM shielding.
摘要翻译：本发明包括使用高温单面液晶聚合物和低温单面液晶聚合物制备三维（3-D）液晶聚合物（LCP）互连结构的方法，而高温LCP和使用激光或机械钻或机械冲孔钻低温LCP以形成z轴连接。单面导电层用作总线层，以在高温和低温LCP内形成z轴导电螺柱，随后在导电互连之间沉积用作接合金属的螺柱的金属覆盖层，以形成 z轴电气连接。高温低温LCP电路层被蚀刻或构建以形成电路图案，并随后结合在一起以形成最终的3-D多层电路图案，而低温LCP熔化以形成与高温LCP电路层的电介质至电介质结合，并且电介质到导电键合，而金属与金属之间的键合是与导电金属层接合的高温金属覆盖层发生的。然后使用两个金属化有机芯包裹所得到的结构，使用具有类似电性能的低温粘合剂层压到装置的任一侧上，随后金属化以形成输入输出端子和EM屏蔽。

2. 发明申请

WO2021184035A1 ALUMINUM ANODE CURRENT COLLECTORS FOR LITHIUM ION BATTERIES 审中-公开
公开(公告)号：WO2021184035A1
公开(公告)日：2021-09-16
申请号：PCT/US2021/070250
申请日：2021-03-08
申请人： NOVELIS INC. , GEORGIA TECH RESEARCH CORPORATION
发明人： MAJUMDAR, Diptarka , SUNDARAM, Venkatesh , MCDOWELL, Matthew , QUINTERO CORTES, Francisco J. , KANG, DaeHoon
IPC分类号： H01M4/66 , H01G11/00 , H01M10/0525
摘要： Described are substrates including a layer of an aluminum alloy with a conductive coating, also referred to as a protective overlayer. The conductive coating can prevent certain material from coming into contact with the aluminum alloy layer while allowing transmission of electrons to the aluminum alloy. The substrates may be used, for example, in electronics applications, such as current collectors or electrodes for batteries, electrochemical cells, capacitors, supercapacitors, or the like.

3. 发明申请

WO2010126966A1 THIN-FILM CAPACITOR STRUCTURES EMBEDDED IN SEMICONDUCTOR PACKAGES AND METHODS OF MAKING 审中-公开
标题翻译：半导体封装中嵌入的薄膜电容器结构和制造方法
公开(公告)号：WO2010126966A1
公开(公告)日：2010-11-04
申请号：PCT/US2010/032706
申请日：2010-04-28
申请人： E. I. DU PONT DE NEMOURS AND COMPANY , GEORGIA TECH RESEARCH CORPORATION , CHAN, Cheong-Wo Hunter , DELLIS, Lynne E. , LIU, Fuhan , MCGREGOR, David Ross , SUNDARAM, Venkatesh , NAIR, Deepukumar M.
发明人： CHAN, Cheong-Wo Hunter , DELLIS, Lynne E. , LIU, Fuhan , MCGREGOR, David Ross , SUNDARAM, Venkatesh , NAIR, Deepukumar M.
IPC分类号： H05K1/16 , H05K3/46
CPC分类号： H05K1/162 , H05K3/0035 , H05K3/0038 , H05K3/108 , H05K3/4644 , H05K3/4652 , H05K2201/0175 , H05K2201/0355 , H05K2201/09309 , H05K2201/09518 , H05K2201/09718 , H05K2201/10674 , H05K2203/0353 , H05K2203/1126
摘要： Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printed wiring board core through build-up layers, wherein a first electrode of the thin-film capacitor comprises a thin nickel foil, a second electrode comprises a copper electrode, and a copper layer is formed on the nickel foil. The interconnections between the thin-film capacitor and the semiconductor device provide a low inductance path to transfer charge to and from the semiconductor device. Also provided are methods for fabricating such semiconductor packages.
摘要翻译：提供了包括通过堆积层附着到印刷线路板芯的至少一个薄膜电容器的半导体封装，其中薄膜电容器的第一电极包括薄镍箔，第二电极包括铜电极和在镍箔上形成铜层。薄膜电容器和半导体器件之间的互连提供了将电荷转移到半导体器件和从半导体器件传输电荷的低电感路径。还提供了制造这种半导体封装的方法。

4. 发明申请

WO2014193978A1 GLASS-POLYMER OPTICAL INTERPOSER 审中-公开
标题翻译：玻璃聚合物光学介入器
公开(公告)号：WO2014193978A1
公开(公告)日：2014-12-04
申请号：PCT/US2014/039828
申请日：2014-05-28
申请人： GEORGIA TECH RESEARCH CORPORATION
发明人： TUMMALA, Rao, R. , CHOU, Chia-Te , SUNDARAM, Venkatesh
IPC分类号： G02B6/125 , G02B6/13
CPC分类号： G02B6/43 , H05K1/0274 , H05K2201/09827
摘要： An optical interposer that includes a glass substrate (102) having one or more optical vias (104) extending through the glass substrate. A first optical polymer (112) may be bonded to the substrate and to interior surfaces of the one or more optical vias. Implementations include one or more optical via cores comprising a second optical polymer (110) that has a greater refractive index than the first optical polymer. The one or more optical via cores may be at least partially surrounded by the first optical polymer. Embodiments include encapsulated optical waveguides in communication with the optical vias and/or via cores. Example implementations include layers of electrical insulation (114), electrical traces, and electrical vias (118). A method of manufacture includes forming the optical vias by laser ablation. Certain embodiments may include chemically etching the inside of the vias to improve surface roughness.
摘要翻译：一种光学插入器，其包括具有延伸穿过玻璃基板的一个或多个光学通孔（104）的玻璃基板（102）。第一光学聚合物（112）可以结合到基底和一个或多个光学通孔的内表面。实施方案包括一个或多个光学通孔芯，其包含具有比第一光学聚合物更大的折射率的第二光学聚合物（110）。一个或多个光学通孔芯可以至少部分地被第一光学聚合物包围。实施例包括与光通孔和/或通孔芯通信的封装光波导。示例实施方式包括电绝缘层（114），电迹线和电通孔（118）。一种制造方法包括通过激光烧蚀形成光学通孔。某些实施例可以包括化学蚀刻通孔内部以改善表面粗糙度。

5. 发明申请

WO2012122388A3 CHIP-LAST EMBEDDED INTERCONNECT STRUCTURES AND METHODS OF MAKING THE SAME 审中-公开
公开(公告)号：WO2012122388A3
公开(公告)日：2012-09-13
申请号：PCT/US2012/028300
申请日：2012-03-08
申请人： GEORGIA TECH RESEARCH CORPORATION , LIU, Fuhan , KUMBHAT, Nitesh , SUNDARAM, Venkatesh , TUMMALA, Rao
发明人： LIU, Fuhan , KUMBHAT, Nitesh , SUNDARAM, Venkatesh , TUMMALA, Rao
IPC分类号： H01L21/50 , H01L23/48
摘要： CHIP-LAST EMBEDDED INTERCONNECT STRUCTURES AND METHODS OF MAKING THE SAME ABSTRACT The various embodiments of the present invention provide a novel chip-last embedded structure, wherein an IC is embedded within a one to two metal layer substrate. The various embodiments of the present invention are comparable to other two-dimensional and three-dimensional WLFO packages of the prior art as the embodiments have similar package thicknesses and X-Y form factors, short interconnect lengths, fine-pitch interconnects to chip I/Os, a reduced layer count for re-distribution of chip I/O pads to ball grid arrays (BGA) or land grid arrays (LGA), and improved thermal management options.

6. 发明申请

WO2010126989A1 THIN-FILM CAPACITOR STRUCTURES EMBEDDED IN SEMICONDUCTOR PACKAGES AND METHODS OF MAKING 审中-公开
标题翻译：半导体封装中嵌入的薄膜电容器结构和制造方法
公开(公告)号：WO2010126989A1
公开(公告)日：2010-11-04
申请号：PCT/US2010/032737
申请日：2010-04-28
申请人： E. I. DU PONT DE NEMOURS AND COMPANY , GEORGIA TECH RESEARCH CORPORATION , MCGREGOR, David Ross , CHAN, Cheong-Wo Hunter , DELLIS, Lynne E. , LIU, Fuhan , NAIR, Deepukumar M. , SUNDARAM, Venkatesh
发明人： MCGREGOR, David Ross , CHAN, Cheong-Wo Hunter , DELLIS, Lynne E. , LIU, Fuhan , NAIR, Deepukumar M. , SUNDARAM, Venkatesh
IPC分类号： H05K1/16 , H05K3/46
CPC分类号： H05K1/162 , H05K3/025 , H05K3/4652 , H05K2201/0175 , H05K2201/0355 , H05K2201/09309 , H05K2201/09481 , H05K2201/09518 , H05K2201/09718 , H05K2201/09763 , H05K2201/10674 , H05K2203/1126
摘要： Provided are semiconductor packages comprising at least one thin-film capacitor attached to a printed wiring board core through build-up layers, wherein a first electrode of the thin-film capacitor comprises a thin nickel foil, a second electrode of the thin-film capacitor comprises a copper electrode, and a copper layer is formed on the nickel foil. The interconnections between the thin-film capacitor and the semiconductor device provide a low inductance path to transfer charge to and from the semiconductor device. Also provided are methods for fabricating such semiconductor packages.
摘要翻译：提供了包括通过堆积层附着到印刷线路板芯的至少一个薄膜电容器的半导体封装，其中薄膜电容器的第一电极包括薄镍箔，薄膜电容器的第二电极包括铜电极，并且在镍箔上形成铜层。薄膜电容器和半导体器件之间的互连提供了将电荷转移到半导体器件和从半导体器件传输电荷的低电感路径。还提供了制造这种半导体封装的方法。

7. 发明申请

WO2004093238A1 INTEGRATED PASSIVE DEVICES FABRICATED UTILIZING MULTI-LAYER, ORGANIC LAMINATES 审中-公开
标题翻译：综合利用多层有机层压板的被动设备
公开(公告)号：WO2004093238A1
公开(公告)日：2004-10-28
申请号：PCT/US2004/009486
申请日：2004-03-29
申请人： GEORGIA TECH RESEARCH CORPORATION , WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
发明人： WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
IPC分类号： H01P1/203
CPC分类号： H01P1/20381 , H01F17/0033 , H01F41/041 , H01L21/4857 , H01L25/0652 , H01L27/08 , H01L2924/0002 , H01L2924/09701 , H01L2924/3011 , H03H7/38 , H01L2924/00
摘要： The present invention includes an organic device that can be integrated in a multilayer board made of organic material. The passive devices can be integrally fabricated on a circuit board in either surface mount device (SMD) or ball grid array (BGA) form. Alternatively, the passive device can be constructed in a stand alone SMD or BGA/chip scale package (CSP) form to make it mountable on a multilayer board, ceramic carrier or silicon platform in the form of an integrated passive device. The passive device includes side shielding on two sides in the SMD form and four sides in the BGA/CSP form. The side shielding can be external or in-built.
摘要翻译：本发明包括可以集成在由有机材料制成的多层板中的有机器件。无源器件可以在表面贴装器件（SMD）或球栅阵列（BGA）形式的电路板上整体制造。或者，无源器件可以以独立的SMD或BGA /芯片级封装（CSP）形式构造，使其可以以集成的无源器件的形式安装在多层板，陶瓷载体或硅平台上。无源器件包括SMD形式两侧的侧屏蔽和BGA / CSP形式的四面。侧面屏蔽可以是外部的或内置的。

8. 发明申请

WO2023044264A1 ALUMINUM-BASED ANODE FOR LITHIUM-ION BATTERIES 审中-公开
公开(公告)号：WO2023044264A1
公开(公告)日：2023-03-23
申请号：PCT/US2022/076169
申请日：2022-09-09
申请人： NOVELIS INC. , GEORGIA TECH RESEARCH CORPORATION
发明人： MCDOWELL, Matthew , CHEN, Timothy , MAJUMDAR, Diptarka , SUNDARAM, Venkatesh , QUINTERO CORTES, Francisco Javier , KANG, Daehoon , WANG, Congcheng
IPC分类号： H01M4/00 , C22C21/00
摘要： Described are composites having at least one layer, the at least one layer including an alloy of Al and at least another component or at least one layer including a first and second pluralities of particles. The first plurality of particles may be selected from at least one of Al particles and Al alloy particles. The second plurality of particles may be selected from at least one of metal particles and non-metal particles, wherein the metal particles are selected from at least one of zinc, silicon, bismuth, copper, germanium, indium, antimony, tin, magnesium, or combinations thereof, and the non-metal particles are selected from at least one of carbon, lithium titanium oxide, titania, MoO, MoS2, Co2O4, MnO2, Fe2O3, Fe3O4, FeS, CuO, or combinations thereof. The composites may be used as both current collectors and active material.

9. 发明申请

WO2005084090A1 LIQUID CRYSTALLINE POLYMER- AND MULTILAYER POLYMER-BASED PASSIVE SIGNAL PROCESSING COMPONENTS FOR RF/WIRELESS MULTI-BAND APPLICATIONS 审中-公开
标题翻译：液晶聚合物和多层聚合物基于无源多通道应用的无源信号处理组件
公开(公告)号：WO2005084090A1
公开(公告)日：2005-09-09
申请号：PCT/US2005/006006
申请日：2005-02-23
申请人： GEORGIA TECH RESEARCH CORPORATION , WHITE, George, E. , SWAMINATHAN, Madhavan , SUNDARAM, Venkatesh , DALMIA, Sidharth
发明人： WHITE, George, E. , SWAMINATHAN, Madhavan , SUNDARAM, Venkatesh , DALMIA, Sidharth
IPC分类号： H05K1/16
CPC分类号： H05K1/16 , H01L23/552 , H01L23/66 , H01L2924/0002 , H01L2924/09701 , H01L2924/15311 , H01L2924/3011 , H01P1/203 , H01P1/20381 , H01P1/2135 , H01P5/10 , H03H7/0115 , H03H7/075 , H03H7/09 , H03H7/1708 , H03H7/1758 , H03H7/1766 , H03H7/1775 , H03H7/38 , H03H7/42 , H03H7/463 , H03H2001/0085 , H05K1/024 , H05K1/162 , H05K1/165 , H05K3/4602 , H05K3/4623 , H05K3/4626 , H05K3/4632 , H05K3/4644 , H05K3/4673 , H05K3/4688 , H05K2201/0141 , H05K2201/09536 , H01L2924/00
摘要： The present invention provides all organic fully-packaged miniature bandpass filters, baluns, diplexers, multiplexers, couplers and a combination of the above manufactured using liquid crystalline polymer (LCP) and other multilayer polymer based substrates. These devices are manufactured using one or more LCP layers having integrated passive components formed thereon to provide the density and performance necessary for multi-band wireless devices. In the designs involving multiple LCP layers, the LCP layers are separated by prepeg layers. In accordance with an aspect of the present invention, coplanar waveguide, hybrid stripline/coplanar waveguide and/or microstrip topologies are utilized to form the integrated passive components, and the devices can be mass produced on large area panels at least 18 inches by 12 inches with line widths smaller than 10um.
摘要翻译：本发明提供了使用液晶聚合物（LCP）和其它多层聚合物基底板制造的所有有机全封装微型带通滤光器，平衡 - 不平衡转换器，双工器，多路复用器，耦合器和上述组合。这些设备使用一个或多个LCP层制造，其中形成有集成的无源元件，以提供多频带无线设备所需的密度和性能。在涉及多个LCP层的设计中，LCP层被预制层隔开。根据本发明的一个方面，使用共面波导，混合带状线/共面波导和/或微带线拓扑来形成集成的无源部件，并且可以在大面积面板上批量生产至少18英寸×12英寸线宽小于10um。

10. 发明申请

WO2005036567A3 STAND-ALONE ORGANIC-BASED PASSIVE DEVICES 审中-公开
公开(公告)号：WO2005036567A3
公开(公告)日：2005-04-21
申请号：PCT/US2004/009468
申请日：2004-03-29
申请人： GEORGIA TECH RESEARCH CORPORATION , WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
发明人： WHITE, George, E. , SWANIMATHAN, Madhavan , DALMIA, Sidharth , SUNDARAM, Venkatesh
IPC分类号： H01F17/00
摘要： The present invention provides for low cost discrete inductor devices in an all organic platform. The inductor devices can utilize virtually any organic material that provides the desired properties, such as liquid crystalline polymer (LCP) or polyphenyl ether (PPE), in a multilayer structure, wherein the organic materials have low moisture uptake and good temperature stability. Each layer may be metalized and selectively interconnected by vias formed in respective layers so as to form winding or coiled inductors. The inductor devices may advantageously include external shielding formed by metalizing the side walls and top surface of the inductor devices on in-built shielding achieved by the utilization of the hybrid co-planar waveguide topologies. The inductor devices can be configured for either ball grid array (BGA)/chip scale package (CSP) or surface mount device (SMD) mounting to circuit boards.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式