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    • 1. 发明专利
    • Detecting circuit of input and output fault
    • 检测输入和输出故障电路
    • JPS59114925A
    • 1984-07-03
    • JP22461482
    • 1982-12-20
    • Fujitsu LtdHitachi LtdNec CorpNippon Telegr & Teleph Corp Oki Electric Ind Co Ltd
    • SHINOZUKA TAKASHISANBE TAKESHIGOUHARA SHINOBUMUKAI KAZUHIKOSATOU HIROAKI
    • H03L7/095
    • H03L7/095
    • PURPOSE:To constitute the titled circuit by logic elements and to miniaturize the circuit by providing a differentiating circuit which differentiates the changing point of the input signal of a phase locked oscillation circuit to obtain the 1st output and then differentiates the output signal of said oscillation circuit to obtain the 2nd output, respectively, and detecting the coincidence and discordance between the 1st and 2nd outputs. CONSTITUTION:A phase locked oscillation circuit PLO1 is provided with a phase comparator 2, loop filter 3 and a voltage controlled oscillator 4. An input signal IN is applied to the comparator 2 and to a differentiating circuit 16. The changing point of the signal IN is differentiated by a delay circuit 21 and an AND circuit 22 to deliver the 1st signal (e). While the changing point of the output signal of the osillator 4 is differentiated by a delay circuit 23 and an AND circuit 24 of the circuit 16 to deliver the 2nd signal (f). The coincidence and dissidence between the signals (e) and (f) are detected by an asynchronism detecting circuit 5. Then an asynchronism detecting output (b) is outputted when no coincidence is detected between both signals, and only logic elements are used to constitute a circuit for miniaturization.
    • 目的:通过逻辑元件构成标题电路,并通过提供一个微分电路来区分电路的小电路,该差分电路区分锁相振荡电路的输入信号的变化点以获得第一输出,然后区分所述振荡电路的输出信号 分别获得第二输出,并检测第一和第二输出之间的一致性和不一致性。 构成:锁相振荡电路PLO1具有相位比较器2,环路滤波器3和压控振荡器4.输入信号IN被施加到比较器2和微分电路16.信号IN的变化点 由延迟电路21和“与”电路22进行区分,以传送第一信号(e)。 虽然振荡器4的输出信号的变化点被电路16的延迟电路23和与电路24区分,以输送第二信号(f)。 信号(e)和(f)之间的一致性和不一致性由异步检测电路5检测。然后,当在两个信号之间没有检测到符合时,输出异步检测输出(b),并且仅使用逻辑元件构成 用于小型化的电路。
    • 2. 发明专利
    • DE3584038D1
    • 1991-10-17
    • DE3584038
    • 1985-05-22
    • NEC CORP
    • SUZUKI TOSHIOHIRAIDE SATOSHISHINOZUKA TAKASHI
    • H04B3/10
    • In addition to an information signal subjected to a frequency dependent and a frequency independent loss component and delivered to an automatic equalizer through a transmission path which is typically subscriber's communication path between a subscriber's terminal equipment and an exchange, and equalizer input signal comprises a pilot signal subjected to the frequency independent loss component alone. The equalizer comprises a first equalizer (26, 27, 36) responsive to a pilot signal component derived from the pilot signal for compensating for the frequency independent loss component. A second equalizer (31, 32, 37) compensates for the frequency dependent loss component in response to an information signal component derived from the information signal. The first and the second equalizers are cooperative in various manners in equalizing the input signal into an equalizer output signal. The pilot and the information signal components are extracted either directly or indirectly from the input signal. The output signal is fed back to a frequency dependent component detector (31) either directly or indirectly.
    • 3. 发明专利
    • SUBSCRIBER LINE INTERFACE CIRCUIT
    • CA1206649A
    • 1986-06-24
    • CA444391
    • 1983-12-29
    • NEC CORP
    • HAYASHI TAKAOARAI MASANOBUSHINOZUKA TAKASHI
    • H04M3/00H04M19/00H04M7/00
    • "Subscriber Line Interface Circuit" In a subscriber line interface circuit of a telephone switching system, a differential amplifier (1) is coupled through the line terminals (T, R) of a two-wire subscriber line for detecting a voltage difference developed thereacross. First and second resistances (8, 9) of equal values are coupled at their first ends to the line terminals, respectively. Tip and ring drivers (2, 3) are connected to the other end of first and second resistances for driving the load impedance of the subscriber line. First, second and third feedback loops (f1, f2, f3) are provided, the first feedback loop being coupled from an output of differential amplifier (1) to the input of the drivers (2, 3) to vary the impedance characteristics of the first and second resistances (8, 9) so that a high impedance is synthesized across each of the first and second resistances. The second and third feedback loops are also coupled from the output of differential amplifier (1) to the drivers (2, 3), each of the second and third feedback loops having a different passband frequency characteristic and having the effect of reducing the synthesized impedances to a predetermined value.
    • 4. 发明专利
    • SUBSCRIBER LINE INTERFACE CIRCUIT
    • AU563506B2
    • 1987-07-09
    • AU2297883
    • 1983-12-29
    • NEC CORP
    • HAYASHI TAKAOARAI MASANOBUSHINOZUKA TAKASHI
    • H04M3/00H04M19/00
    • In a subscriber line interface circuit of a telephone switching system, a differential amplifier (1) is coupled through the line terminals (T, R) of a two-wire subscriber line for detecting a voltage difference developed thereacross. First and second resistances (8, 9) of equal values are coupled at their first ends to the line terminals, respectively. Tip and ring drivers (2, 3) are connected to the other end of fir.st and second resistances for driving the load impedance of the subscriber line. First, second and third feedback loops (f 1 , f 2 , f 31 are provided, the first feedback loop being coupled from an output of differential amplifier (1) to the input of the drivers (2, 3) to vary the impedance characteristics of the first and second resistances (8, 9) so that a high impedance is synthesized across each of the first and second resistances. The second and third feedback loops are also coupled from the output of differential amplifier (1) to the drivers (2, 3), each of the second and third feedback loops having a different passband frequency characteristic and having the effect of reducing the synthesized impedances to a predetermined value.
    • 5. 发明专利
    • SUBSCRIBER LINE INTERFACE CIRCUIT
    • AU2297883A
    • 1984-07-05
    • AU2297883
    • 1983-12-29
    • NEC CORP
    • HAYASHI TAKAOSHINOZUKA TAKASHIARAI MASANOBU
    • H04M3/00H04M19/00H04M19/02
    • In a subscriber line interface circuit of a telephone switching system, a differential amplifier (1) is coupled through the line terminals (T, R) of a two-wire subscriber line for detecting a voltage difference developed thereacross. First and second resistances (8, 9) of equal values are coupled at their first ends to the line terminals, respectively. Tip and ring drivers (2, 3) are connected to the other end of fir.st and second resistances for driving the load impedance of the subscriber line. First, second and third feedback loops (f 1 , f 2 , f 31 are provided, the first feedback loop being coupled from an output of differential amplifier (1) to the input of the drivers (2, 3) to vary the impedance characteristics of the first and second resistances (8, 9) so that a high impedance is synthesized across each of the first and second resistances. The second and third feedback loops are also coupled from the output of differential amplifier (1) to the drivers (2, 3), each of the second and third feedback loops having a different passband frequency characteristic and having the effect of reducing the synthesized impedances to a predetermined value.
    • 6. 发明专利
    • PILOT CONTROLLED EQUALIZATION
    • AU585228B2
    • 1989-06-15
    • AU4285385
    • 1985-05-24
    • NEC CORP
    • SUZUKI TOSHIOHIRAIDE SATOSHISHINOZUKA TAKASHI
    • H04B3/10H04B3/04
    • In addition to an information signal subjected to a frequency dependent and a frequency independent loss component and delivered to an automatic equalizer through a transmission path which is typically subscriber's communication path between a subscriber's terminal equipment and an exchange, and equalizer input signal comprises a pilot signal subjected to the frequency independent loss component alone. The equalizer comprises a first equalizer (26, 27, 36) responsive to a pilot signal component derived from the pilot signal for compensating for the frequency independent loss component. A second equalizer (31, 32, 37) compensates for the frequency dependent loss component in response to an information signal component derived from the information signal. The first and the second equalizers are cooperative in various manners in equalizing the input signal into an equalizer output signal. The pilot and the information signal components are extracted either directly or indirectly from the input signal. The output signal is fed back to a frequency dependent component detector (31) either directly or indirectly.
    • 8. 发明专利
    • PILOT CONTROLLED EQUALIZATION
    • AU4285385A
    • 1985-11-28
    • AU4285385
    • 1985-05-24
    • NEC CORP
    • SUZUKI TOSHIOHIRAIDE SATOSHISHINOZUKA TAKASHI
    • H04B3/10H04B3/04
    • In addition to an information signal subjected to a frequency dependent and a frequency independent loss component and delivered to an automatic equalizer through a transmission path which is typically subscriber's communication path between a subscriber's terminal equipment and an exchange, and equalizer input signal comprises a pilot signal subjected to the frequency independent loss component alone. The equalizer comprises a first equalizer (26, 27, 36) responsive to a pilot signal component derived from the pilot signal for compensating for the frequency independent loss component. A second equalizer (31, 32, 37) compensates for the frequency dependent loss component in response to an information signal component derived from the information signal. The first and the second equalizers are cooperative in various manners in equalizing the input signal into an equalizer output signal. The pilot and the information signal components are extracted either directly or indirectly from the input signal. The output signal is fed back to a frequency dependent component detector (31) either directly or indirectly.
    • 9. 发明专利
    • PHASE LOCKED LOOP OSCILLATOR
    • JPS6424631A
    • 1989-01-26
    • JP18276187
    • 1987-07-21
    • NEC CORP
    • SHINOZUKA TAKASHI
    • H03L7/091H03L7/08
    • PURPOSE:To output an output signal with less jitter by outputting a phase comparison output being a stepwise signal of pulse amplitude modulation wave corresponding to a phase difference between an input pulse and a comparison pulse. CONSTITUTION:A phase comparator 6 consists of a saw-tooth wave generating circuit 1 and a sample-hold circuit 2, and the saw-tooth wave generating circuit 1 outputs a saw-tooth wave 11 synchronously with the leading edge of an input pulse 10. The sample-hold circuit 2 samples an output level of the saw-tooth wave 11 at each leading edge of a comparison pulse 10, holds output levels V1, V2, V3 till the leading edge of the next comparison pulse 15 respectively and outputs the result as a phase comparison output 12. Since the band width where the side band wave exists is made narrow, the increase in jitter in the output signal is decreased.
    • 10. 发明专利
    • Current mirror circuit
    • 当前镜像电路
    • JPS59186409A
    • 1984-10-23
    • JP6087983
    • 1983-04-08
    • Nec Corp
    • ARAI MASANOBUSHINOZUKA TAKASHIHAYASHI TAKAO
    • H03F3/34H03F3/343H03F3/347
    • H03F3/343
    • PURPOSE:To realize a high-order current arithmetic filter by providing frequency characteristics to the input impedance and current mirror ratio of a current mirror circuit. CONSTITUTION:The emitters of TRs Q1 and Q2 are connected to a reference potential Vr through an emitter circuit 2 so that their emitter currents are in specific relation. A current circuit 3 is connected to the collector of the TRQ1 as a current input side, the reference potential Vr, and common-connected bases to supply a base current to the TRs Q1 and Q2. Then, a reactance element is incorporated to give frequency characteristics to transfer characteristics HCB of a current flowing from the collector to the base of the TRQ1. When the operating resistances of the TRs are ignored in the constitution in a figure, the collector voltage VC1 of the TRQ1 is VC1=VE/HCB (VE: voltage across RE). The input current Ii approximates VE/RE, and the input impedance Zin of the current mirror circuit has frequency characteristics depending upon HCB like Zin=VCI/Ii= RE/HCB. Further, when the current amplification factors hFE of the TRs are finite, the mirrror ratio also has frequency characteristics.
    • 目的:通过为电流镜电路的输入阻抗和电流镜像比提供频率特性来实现高阶电流运算滤波器。 构成:TR Q1和Q2的发射极通过发射极电路2连接到参考电位Vr,使得其发射极电流具有特定的关系。 电流电路3连接到TRQ1的集电极作为电流输入侧,参考电位Vr和公共连接的基极,以向TR Q1和Q2提供基极电流。 然后,结合电抗元件以产生频率特性以将从集电器流向TRQ1的基极的电流的特性HCB传递。 当在图中的结构中忽略TR的工作电阻时,TRQ1的集电极电压VC1为VC1 = VE / HCB(VE:RE之间的电压)。 输入电流Ii近似于VE / RE,并且电流镜电路的输入阻抗Zin具有取决于诸如Zin = VCI / Ii = RE / HCB的HCB的频率特性。 此外,当TRs的电流放大系数hFE有限时,mirrror比也具有频率特性。