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1. 发明专利

JPS59114925A Detecting circuit of input and output fault 失效
标题翻译：检测输入和输出故障电路
公开(公告)号：JPS59114925A
公开(公告)日：1984-07-03
申请号：JP22461482
申请日：1982-12-20
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： SHINOZUKA TAKASHI , SANBE TAKESHI , GOUHARA SHINOBU , MUKAI KAZUHIKO , SATOU HIROAKI
IPC分类号： H03L7/095
CPC分类号： H03L7/095
摘要： PURPOSE:To constitute the titled circuit by logic elements and to miniaturize the circuit by providing a differentiating circuit which differentiates the changing point of the input signal of a phase locked oscillation circuit to obtain the 1st output and then differentiates the output signal of said oscillation circuit to obtain the 2nd output, respectively, and detecting the coincidence and discordance between the 1st and 2nd outputs. CONSTITUTION:A phase locked oscillation circuit PLO1 is provided with a phase comparator 2, loop filter 3 and a voltage controlled oscillator 4. An input signal IN is applied to the comparator 2 and to a differentiating circuit 16. The changing point of the signal IN is differentiated by a delay circuit 21 and an AND circuit 22 to deliver the 1st signal (e). While the changing point of the output signal of the osillator 4 is differentiated by a delay circuit 23 and an AND circuit 24 of the circuit 16 to deliver the 2nd signal (f). The coincidence and dissidence between the signals (e) and (f) are detected by an asynchronism detecting circuit 5. Then an asynchronism detecting output (b) is outputted when no coincidence is detected between both signals, and only logic elements are used to constitute a circuit for miniaturization.
摘要翻译：目的：通过逻辑元件构成标题电路，并通过提供一个微分电路来区分电路的小电路，该差分电路区分锁相振荡电路的输入信号的变化点以获得第一输出，然后区分所述振荡电路的输出信号分别获得第二输出，并检测第一和第二输出之间的一致性和不一致性。构成：锁相振荡电路PLO1具有相位比较器2，环路滤波器3和压控振荡器4.输入信号IN被施加到比较器2和微分电路16.信号IN的变化点由延迟电路21和“与”电路22进行区分，以传送第一信号（e）。虽然振荡器4的输出信号的变化点被电路16的延迟电路23和与电路24区分，以输送第二信号（f）。信号（e）和（f）之间的一致性和不一致性由异步检测电路5检测。然后，当在两个信号之间没有检测到符合时，输出异步检测输出（b），并且仅使用逻辑元件构成用于小型化的电路。

2. 发明专利

JPS59131253A Test system for operation collation of duplex time division channel 失效
标题翻译：双重时间段通道操作测试系统
公开(公告)号：JPS59131253A
公开(公告)日：1984-07-28
申请号：JP561383
申请日：1983-01-17
申请人： Fujitsu Ltd , Hitachi Ltd , Nec Corp , Nippon Telegr & Teleph Corp , Oki Electric Ind Co Ltd
发明人： SASAKI YUUZOU , SANBE TAKESHI , MUKAI KAZUHIKO , SEO TOMIHIDE , YOSHIE TATSUO
IPC分类号： H04M3/22 , H04M3/24 , H04Q3/52 , H04Q3/545 , H04Q11/04
CPC分类号： H04M3/244
摘要： PURPOSE:To prevent the deterioration of processing capacity by deciding no fault as long as both time division channels are normal and even though some difference is generated between both channels when a control instruction is received. CONSTITUTION:A control instruction is transmitted from a control instruction transmitting circuit 8 at a time point TO and then sent to a control instruction receiving circuit 6 at a time point T1 via a transfer line 9. The control instruction is also sent to a control instruction receiving circuit 7 at a time point T2 via a transfer line 10. Under such conditions, the circuit 6 receives the control instruction at a time point Tb and actuates both an O-system channel 2 and a counter circuit 15. At the same time, the circuit 7 receives the instruction at a time point Tc and actuates both a 1-system channel 3 and a counter circuit 16. Both circuit 15 and 16 set the output to a collating circuit 5 at L level until time points T3 and T4 respectively after lapse of a prescribed time T. Thus no fault is detecting operation detected until the time point T4 when the outputs of both circuits 15 and 16 are set at H levels.
摘要翻译：目的：为了防止处理能力的恶化，只要两个时分通道正常，并且即使在接收到控制指令时两个通道之间产生一些差异，也可以通过确定无故障。构成：在时间点TO从控制指令发送电路8发送控制指令，然后经由传输线路9在时间点T1发送到控制指令接收电路6.控制指令也发送到控制指令在这样的条件下，电路6在时间点Tb接收控制指令，并且驱动O系统通道2和计数器电路15.同时，电路7在时间点Tc接收指令，并且驱动1系统通道3和计数器电路16.电路15和16都将输出设置为处于L电平的对照电路5，直到时间点T3和T4分别在因此，当两个电路15和16的输出被设置为H电平时，直到检测到直到时间点T4为止的检测操作都没有故障。

3. 发明专利

JPS58147295A HIGHWAY CONNECTING SYSTEM OF DIGITAL EXCHANGE 失效
公开(公告)号：JPS58147295A
公开(公告)日：1983-09-02
申请号：JP2904682
申请日：1982-02-26
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： KATSUYAMA TSUNEO , SANBE TAKESHI , KAWADA AKIRA , WATANABE NOBORU , MUKAI KAZUHIKO
IPC分类号： H04Q11/04
摘要： PURPOSE:To connect a highway selection circuit to the 2nd device of redundant constitution, by providing the highway selection circuit for each device, in a digital exchange having the 1st device of duplicate constitution and the highway connecting device connected to the 1st device. CONSTITUTION:Time division channel devices 300, 301 of duplicate constitution and the highway connecting device 210 are provided respectively with highway selection circuits 60, 61, 62, 63, and the circuits 60, 62 select fixedly a signal processing device 400 of the system (0) via the highway connecting device 200 and the time division channel 300 of the system (0). Similarly, the circuits 61, 63 select fixedly a signal processing device 401 of the system (1) via a highway connecting device 200 and the time division channel 301 of the system (1). If a failure takes place in the signal processors 400-411 of duplicate constitution and the system is switched from the system (0) to the system (1) or vice versa, the system of the time division channel system is switched in matching with the failure of the system (0) (400 and 410) of the 2nd device and the system (1) (401 and 411).

4. 发明专利

JPH0548022B2 失效
公开(公告)号：JPH0548022B2
公开(公告)日：1993-07-20
申请号：JP561383
申请日：1983-01-17
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： SASAKI JUZO , SANPEI TAKESHI , MUKAI KAZUHIKO , SEO TOMIHIDE , YOSHE TATSUO
IPC分类号： H04M3/22 , H04M3/24 , H04Q3/52 , H04Q3/545 , H04Q11/04

5. 发明专利

JPS52144934A SENDING OUT INFORMATION INTERCEPTING UNIT 失效
公开(公告)号：JPS52144934A
公开(公告)日：1977-12-02
申请号：JP6110976
申请日：1976-05-28
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , JAPAN STORAGE BATTERY CO LTD , FUJITSU LTD
发明人： MIYAZAKI KATSUYUKI , MATSUSHITA SHIGEHIKO , MUKAI KAZUHIKO , MANBUKURO AKIRA , KIMURA AKIO
IPC分类号： G06F13/12 , G06F3/00 , G06F13/00 , G06F13/14 , H04L29/10
摘要： PURPOSE:To make the hardwares for command interpretation unnecessary and avoid the lowering of throughput of the channel unit, by telling the net information quantity transferred from CPU to the communication control unit, in the system having different transmitting unit to the line and to the information transfer between CPU and communicating control unit.

6. 发明专利

JPS51100648A 失效
公开(公告)号：JPS51100648A
公开(公告)日：1976-09-06
申请号：JP2500275
申请日：1975-03-03
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： YAMAGUCHI KOICHIRO , SAITO HISATARO , MUKAI KAZUHIKO , ITO KIICHIRO , ARIMA SHUHEI
IPC分类号： H04L29/02 , G06F3/00 , G06F5/00 , G06F13/00 , H04L13/06

7. 发明专利

JPS51100647A 失效
公开(公告)号：JPS51100647A
公开(公告)日：1976-09-06
申请号：JP2500175
申请日：1975-03-03
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： YAMAGUCHI KOICHIRO , MATSUSHITA SHIGEHIKO , MUKAI KAZUHIKO , KIMURA MAKOTO , NISHIBORI HITOSHI
IPC分类号： H04L29/02 , G06F3/00 , G06F5/00 , G06F13/00

8. 发明专利

JPS60102093A EXPANDING SYSTEM OF TIME DIVISION NETWORK 失效
公开(公告)号：JPS60102093A
公开(公告)日：1985-06-06
申请号：JP20917183
申请日：1983-11-09
申请人： OKI ELECTRIC IND CO LTD
发明人： MUKAI KAZUHIKO
IPC分类号： H04M9/02 , H04Q11/04
摘要： PURPOSE:To connect lots of time division switch devices without increasing a block rate of a communication channel of a common loop highway by increasing the switch multiplexity of a time division switch section and extending the sub network. CONSTITUTION:Line exchange units CSU30-0-30-3 having a time division switch device and expansion line exchange unit ECSU20 are connected in a loop by a common loop highway 10- I . Moreover, units CSU30-4-30-7 and an ECSU20 are connected in a loop by a common loop highway 10-II. The units CSU30-0-30-7 store respectively various terminals and the communication among the units CSU30-0-30-3 and the CSU30-4-30-7 uses a communication channel on the common loop highways 10- I and 10-II in the rate of one channel/one communication via the unit ECSU20 and the communication among the units CSU30-0- 30-3 or the CSU30-4-30-7 uses one loop highway.

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