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    • 4. 发明授权
    • Method for manufacturing multiple layers of waveguides
    • 制造多层波导的方法
    • US08192638B2
    • 2012-06-05
    • US12517692
    • 2008-08-29
    • Andrew T. S. PomereneTimothy J. ConwayCraig M. HillMark Jaso
    • Andrew T. S. PomereneTimothy J. ConwayCraig M. HillMark Jaso
    • B29D11/00G02B6/10G02F1/00
    • G02B6/12002B82Y20/00G02B6/1223G02B6/132G02B6/136
    • A method for manufacturing multiple layers of waveguides is disclosed. Initially, a first cladding layer is deposited on a substrate, a first inner cladding layer is then deposited on the first cladding layer, and a first waveguide material is deposited on the first inner cladding layer. The first inner cladding layer and the first waveguide material are then selectively etched to form a first waveguide layer. Next, a second inner cladding layer followed by a second cladding layer are deposited on the first waveguide layer. The second inner cladding layer and the second cladding layer are removed by using a chemical-mechanical polishing process selective to the first waveguide material. A third inner cladding layer followed by a second waveguide material are deposited on the first waveguide material. The third inner cladding layer and the second waveguide material are then selectively etched to form a second waveguide layer. Finally, a fourth inner cladding layer followed by a third cladding layer are deposited on the second waveguide layer.
    • 公开了制造多层波导的方法。 首先,在基板上沉积第一包层,然后在第一包层上沉积第一内包层,在第一内包层上沉积第一波导材料。 然后选择性地蚀刻第一内包层和第一波导材料以形成第一波导层。 接下来,在第一波导层上沉积第二内包层和第二覆层。 通过使用对第一波导材料选择性的化学机械抛光工艺来除去第二内包层和第二包覆层。 在第一波导材料上沉积第三内包层和第二波导材料。 然后选择性地蚀刻第三内包层和第二波导材料以形成第二波导层。 最后,在第二波导层上沉积第四内包层和第三覆层。
    • 5. 发明授权
    • Apparatus for cooling or heating liquids and method of using same
    • 用于冷却或加热液体的设备及其使用方法
    • US5493864A
    • 1996-02-27
    • US259783
    • 1994-06-14
    • Andrew T. S. PomereneTerence W. SpoorRobert R. DeVenutoAnthony V. DiStefano
    • Andrew T. S. PomereneTerence W. SpoorRobert R. DeVenutoAnthony V. DiStefano
    • B67D3/00F25B21/04H01L35/30F25B21/02B67D5/62F28F13/00
    • F25B21/04B67D3/0009B67D3/0022H01L35/30
    • A manifold design which provides for highly efficient cooling or heating of flowing liquids using a small number of thermoelectric elements is constructed of a thermally insulting material. On exterior surface of at least two sides of the manifold, open channel are formed for use in defining a liquid flow path. On the interior of the manifold there are a plurality of internal chambers, one internal chamber for each side having an exterior channel. These internal chambers are essentially equal in size and are preferably symmetrically disposed within the manifold in alignment with the sides. The channels on the outside of the manifold and the chambers on the inside of the manifold are connected in such a way that liquid would flow in an alternating series of channel and chamber in a single liquid flow path through the manifold. The channels on the exterior of the manifold are sealed by placing a thermally conductive cover plate over each side of the manifold. A thermoelectric device is then placed on the outside of each cover plate. Finally, means for transferring heat to or from the exterior surfaces of the thermoelectric devices provided.
    • 使用热绝缘材料构成了使用少量热电元件提供流动液体的高效冷却或加热的歧管设计。 在歧管的至少两侧的外表面上,形成开口通道以用于限定液体流路。 在歧管的内部有多个内部腔室,每个侧面的一个内部腔室具有外部通道。 这些内部室的尺寸基本上相等,并且优选地对称地设置在歧管内与侧面对齐。 歧管外侧的通道和歧管内部的腔室以这样的方式连接,使得液体将在通过歧管的单个液体流动路径中的交替的通道和腔室中流动。 通过在歧管的每一侧上放置导热盖板来密封歧管外部的通道。 然后将热电装置放置在每个盖板的外侧。 最后,提供用于将热量传递到所提供的热电装置的外表面的装置。
    • 10. 发明授权
    • Method for fabricating butt-coupled electro-absorptive modulators
    • 对接耦合电吸收调制器的制造方法
    • US08871554B2
    • 2014-10-28
    • US12523801
    • 2008-08-29
    • Craig M. HillAndrew T. S. Pomerene
    • Craig M. HillAndrew T. S. Pomerene
    • H01L21/00G02F1/025
    • G02F1/025
    • A method for fabricating butt-coupled electro-absorptive modulators is disclosed. A butt-coupled electro-absorptive modulator with minimal dislocations in the electro-absorptive material is produced by adding a dielectric spacer for lining the coupling region before epitaxially growing the SiGe or other electro-absorptive material. It has been determined that during the SiGe growth, the current process has exposed single crystal silicon at the bottom of the hole and exposed amorphous silicon on the sides. SiGe growth on the amorphous silicon is expected to have more dislocations than single crystal silicon. There should also be dislocations or fissures where the SiGe growth from the each nucleation source finally join. Thus, a dielectric sidewall can protect an exposed waveguide face from any etching from an aggressive surface preparation prior to epi growth.
    • 公开了一种制造对接耦合的电吸收调制器的方法。 通过在外延生长SiGe或其他电吸收材料之前添加用于衬垫耦合区域的电介质间隔物来产生电吸收材料中具有最小位错的对接耦合电吸收调制器。 已经确定,在SiGe生长期间,目前的工艺已经在孔的底部露出单晶硅并在侧面露出非晶硅。 SiGe在非晶硅上的生长预期具有比单晶硅更多的位错。 也应该存在来自每个成核源的SiGe生长最终加入的位错或裂缝。 因此,电介质侧壁可以在外延生长之前保护暴露的波导面不受腐蚀性表面处理的任何蚀刻。