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1. 发明申请

US20130052829A1 METHOD FOR PRODUCING A DEEP TRENCH IN A MICROELECTRONIC COMPONENT SUBSTRATE 有权
标题翻译：在微电子元件基板中生产深层电感的方法
公开(公告)号：US20130052829A1
公开(公告)日：2013-02-28
申请号：US13599961
申请日：2012-08-30
申请人： Francois Leverd , Laurent Favennec , Arnaud Tournier
发明人： Francois Leverd , Laurent Favennec , Arnaud Tournier
IPC分类号： H01L21/3065
CPC分类号： H01L21/30655 , H01L21/76224
摘要： A method for producing a deep trench in a substrate includes a series of elementary etch cycles each etching a portion of the trench. Each elementary cycle includes deposition of a passivation layer on the sidewalls and the bottom of the trench portion etched during previous cycles; followed by pulsed plasma anisotropic ion etching of the trench portion etched during previous cycles, the etching; being implemented in an atmosphere comprising a passivating species; and including a first etch sequence followed by a second etch sequence of less power than the power of the first etch sequence. The first etch sequence etches the passivation layer deposited in the bottom of the portion so as to access the substrate and etches the free substrate at the bottom of the portion while leaving a passivation layer on sidewalls of the portion.
摘要翻译：用于在衬底中制造深沟槽的方法包括一系列基本蚀刻循环，每个蚀刻循环蚀刻沟槽的一部分。每个基本循环包括在先前循环中蚀刻的沟槽部分的侧壁和底部上沉积钝化层; 随后是在先前循环中蚀刻的沟槽部分的脉冲等离子体各向异性离子蚀刻，蚀刻; 在包括钝化物种的气氛中实施; 并且包括第一蚀刻序列，随后是比第一蚀刻序列的功率小的功率的第二蚀刻序列。第一蚀刻序列蚀刻沉积在该部分的底部中的钝化层，以便访问该衬底并在该部分的底部蚀刻自由衬底，同时在该部分的侧壁上留下钝化层。

2. 发明授权

US08796148B2 Method for producing a deep trench in a microelectronic component substrate 有权
标题翻译：微电子元件衬底中深沟槽的制造方法
公开(公告)号：US08796148B2
公开(公告)日：2014-08-05
申请号：US13599961
申请日：2012-08-30
申请人： François Leverd , Laurent Favennec , Arnaud Tournier
发明人： François Leverd , Laurent Favennec , Arnaud Tournier
IPC分类号： H01L21/311
CPC分类号： H01L21/30655 , H01L21/76224
摘要： A method for producing a deep trench in a substrate includes a series of elementary etch cycles each etching a portion of the trench. Each elementary cycle includes deposition of a passivation layer on the sidewalls and the bottom of the trench portion etched during previous cycles; followed by pulsed plasma anisotropic ion etching of the trench portion etched during previous cycles, the etching; being implemented in an atmosphere comprising a passivating species; and including a first etch sequence followed by a second etch sequence of less power than the power of the first etch sequence. The first etch sequence etches the passivation layer deposited in the bottom of the portion so as to access the substrate and etches the free substrate at the bottom of the portion while leaving a passivation layer on sidewalls of the portion.
摘要翻译：用于在衬底中制造深沟槽的方法包括一系列基本蚀刻循环，每个蚀刻循环蚀刻沟槽的一部分。每个基本循环包括在先前循环中蚀刻的沟槽部分的侧壁和底部上沉积钝化层; 随后是在先前循环中蚀刻的沟槽部分的脉冲等离子体各向异性离子蚀刻，蚀刻; 在包括钝化物种的气氛中实施; 并且包括第一蚀刻序列，随后是比第一蚀刻序列的功率小的功率的第二蚀刻序列。第一蚀刻序列蚀刻沉积在该部分的底部中的钝化层，以便访问该衬底并在该部分的底部蚀刻自由衬底，同时在该部分的侧壁上留下钝化层。

3. 发明申请

US20130026546A1 INTEGRATED CIRCUIT COMPRISING AN ISOLATING TRENCH AND CORRESPONDING METHOD 审中-公开
标题翻译：集成电路包含隔离稳定器和相应的方法
公开(公告)号：US20130026546A1
公开(公告)日：2013-01-31
申请号：US13560413
申请日：2012-07-27
申请人： Laurent Favennec , Arnaud Tournier , François Roy
发明人： Laurent Favennec , Arnaud Tournier , François Roy
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L21/76237
摘要： An integrated circuit including at least one isolating trench that delimits an active area made of a monocrystalline semiconductor material, the or each trench including an upper portion including an insulating layer that encapsulates a lower portion of the trench, the lower portion being at least partly buried in the active area and the encapsulation layer including nitrogen or carbon.
摘要翻译：一种集成电路，其包括限定由单晶半导体材料制成的有源区域的至少一个隔离沟槽，所述或每个沟槽包括上部，该上部包括封装沟槽的下部的绝缘层，所述下部至少部分地被埋置在活性区域和包封层中包括氮或碳。

4. 发明申请

US20060244090A1 Method for fabricating an integrated circuit comprising a photodiode and corresponding integrated circuit 审中-公开
标题翻译：一种用于制造包括光电二极管和相应的集成电路的集成电路的方法
公开(公告)号：US20060244090A1
公开(公告)日：2006-11-02
申请号：US11400728
申请日：2006-04-07
申请人： Francois Roy , Arnaud Tournier , Yann Marcellier
发明人： Francois Roy , Arnaud Tournier , Yann Marcellier
IPC分类号： H01L31/06
CPC分类号： H01L21/26586 , H01L27/14609 , H01L27/14643 , H01L31/0352
摘要： An integrated circuit includes a photodiode produced from the formation of a stack of three semiconductor layers. An overdoped storage zone is formed in a second (middle) layer of the stack. A read transistor connected to the photodiode includes a gate formed above the stack and source/drain regions formed in a third (upper) layer of the stack. A first (bottom) layer of the stack forms a floating substrate. During integrated circuit fabrication, an implantation mask is placed above the gate and the stack having an opening which exposes a part of the gate and a part of the upper surface of the stack lying beside the exposed part of the gate. An oblique implantation of dopants is then made through the opening in the mask to form the storage zone such that it is at least partially located underneath the gate area of the read transistor.
摘要翻译：集成电路包括由三层半导体层的堆叠形成的光电二极管。在堆叠的第二（中间）层中形成过量的储存区。连接到光电二极管的读取晶体管包括形成在堆叠上方的栅极和形成在堆叠的第三（上））层中的源极/漏极区域。堆叠的第一（底部）层形成浮动衬底。在集成电路制造期间，将注入掩模放置在栅极上方，并且堆叠具有露出栅极的一部分并且堆叠的上表面的一部分位于栅极的暴露部分旁边的开口。然后通过掩模中的开口进行掺杂剂的倾斜注入以形成存储区，使得其至少部分地位于读取晶体管的栅极区域的下方。

5. 发明申请

US20060258042A1 Integrated photodiode of the floating substrate type 有权
标题翻译：浮动基板类型的集成光电二极管
公开(公告)号：US20060258042A1
公开(公告)日：2006-11-16
申请号：US11432678
申请日：2006-05-10
申请人： Francois Roy , Arnaud Tournier
发明人： Francois Roy , Arnaud Tournier
IPC分类号： H01L21/00 , H01L33/00
CPC分类号： H01L27/14609 , H01L27/1443
摘要： An integrated circuit includes at least one photodiode of the floating substrate type which is associated with a read transistor. The photodiode is formed from a buried layer lying beneath the floating substrate and an upper layer lying on the floating substrate. The upper layer incorporates the source and drain regions of the read transistor. The source and drain regions are produced on either side of the gate of the read transistor. An isolating trench is located alongside the source region and extends from the upper surface of the upper layer down to below the buried layer, so as to isolate the source region from said buried layer.
摘要翻译：集成电路包括与读取晶体管相关联的浮置衬底类型的至少一个光电二极管。光电二极管由位于浮置衬底之下的掩埋层和位于浮动衬底上的上层形成。上层结合读取晶体管的源极和漏极区域。源极和漏极区域在读取晶体管的栅极的任一侧上产生。隔离沟槽位于源极区旁边，并从上层的上表面向下延伸到掩埋层的下方，从而将源极区域与掩埋层隔离。

6. 发明授权

US08754456B2 Miniature image sensor 有权
标题翻译：微型图像传感器
公开(公告)号：US08754456B2
公开(公告)日：2014-06-17
申请号：US12534344
申请日：2009-08-03
申请人： François Roy , Arnaud Tournier
发明人： François Roy , Arnaud Tournier
IPC分类号： H01L31/036
CPC分类号： H01L27/1463 , H01L21/26586 , H01L27/14634 , H01L27/1464 , H01L27/1469 , H01L29/045
摘要： An image sensor including at least one photodiode and at least one transistor formed in and on a silicon substrate, the assembly of the photodiode and of the transistor being surrounded with a heavily-doped insulating wall, wherein the silicon substrate has a crystal orientation (110).
摘要翻译：包括至少一个光电二极管和形成于硅衬底中的至少一个晶体管的图像传感器，所述光电二极管和所述晶体管的组件被重掺杂的绝缘壁包围，其中所述硅衬底具有晶体取向（110 ）。

7. 发明授权

US07642579B2 Image sensor comprising pixels with one transistor 有权
标题翻译：图像传感器包括具有一个晶体管的像素
公开(公告)号：US07642579B2
公开(公告)日：2010-01-05
申请号：US11713903
申请日：2007-03-05
申请人： Arnaud Tournier , François Roy
发明人： Arnaud Tournier , François Roy
IPC分类号： H01L31/062 , H01L21/00
CPC分类号： H01L27/14689 , H01L27/14601 , H01L27/1463 , H01L27/14654
摘要： A pixel having a MOS-type transistor formed in and above a semiconductor substrate of a first doping type, a buried semiconductor layer of a second doping type being placed in the substrate under the MOS transistor and separated therefrom by a substrate portion forming a well. The buried semiconductor layer comprises a thin portion forming a pinch area placed under the transistor channel area and a thick portion placed under all or part of the source/drain areas of the transistor.
摘要翻译：形成在第一掺杂型半导体衬底中和上方的MOS型晶体管的像素，第二掺杂类型的掩埋半导体层被放置在MOS晶体管下方的衬底中，并由形成阱的衬底部分分离。掩埋半导体层包括形成位于晶体管沟道区域下方的夹紧区域的薄部分和放置在晶体管的源极/漏极区域全部或部分之下的厚部分。

8. 发明申请

US20080179494A1 IMAGE SENSOR CIRCUIT AND METHOD COMPRISING ONE-TRANSISTOR PIXELS 有权
标题翻译：图像传感器电路和包含单晶体像素的方法
公开(公告)号：US20080179494A1
公开(公告)日：2008-07-31
申请号：US12006097
申请日：2007-12-28
申请人： Arnaud Tournier , Francois Roy
发明人： Arnaud Tournier , Francois Roy
IPC分类号： H01L27/146 , H01L31/18
CPC分类号： H01L27/14654 , H01L27/14601 , H01L27/14689
摘要： A pixel is formed in a semiconductor substrate of a first doping type, a first layer of the second doping type covering the substrate, a second layer of the first doping type covering the first layer. A MOS-type transistor is formed in the second layer and has a drain area and a source area of the second doping type. The pixel includes a first area of the second doping type, more heavily doped than the first layer, crossing the second layer and extending into the first layer and connected to the drain area. The pixel further includes a second area of the first doping type, more heavily doped than the second layer and bordering the source area.
摘要翻译：像素形成在第一掺杂型的半导体衬底中，覆盖衬底的第二掺杂类型的第一层，覆盖第一层的第一掺杂类型的第二层。在第二层中形成MOS型晶体管，并具有第二掺杂类型的漏极区域和源极区域。像素包括第二掺杂类型的第一区域，比第一层更重掺杂，与第二层交叉并延伸到第一层并连接到漏极区域。像素还包括第一掺杂类型的第二区域，比第二层更重掺杂并且与源极区域接壤。

9. 发明授权

US07875915B2 Integrated circuit comprising a photodiode of the floating substrate type and corresponding fabrication process 有权
标题翻译：集成电路包括浮置衬底类型的光电二极管和相应的制造工艺
公开(公告)号：US07875915B2
公开(公告)日：2011-01-25
申请号：US11432675
申请日：2006-05-10
申请人： François Roy , Arnaud Tournier
发明人： François Roy , Arnaud Tournier
IPC分类号： H01L31/062 , H01L31/113
CPC分类号： H01L27/1443 , H01L27/14609
摘要： An integrated circuit includes at least one photodiode associated with a read transistor. The photodiode is formed from a stack of three semiconductor layers comprising a buried layer, an floating substrate layer and an upper layer. The drain region and/or the source region of the transistor are incorporated within the upper layer. The buried layer is electrically isolated from the upper layer so as to allow the buried layer to be biased independently of the upper layer.
摘要翻译：集成电路包括与读取晶体管相关联的至少一个光电二极管。光电二极管由包括掩埋层，浮置衬底层和上层的三个半导体层的堆叠形成。晶体管的漏极区域和/或源极区域被并入上层。掩埋层与上层电隔离，以便允许掩埋层独立于上层被偏置。

10. 发明授权

US07777289B2 Integrated photodiode of the floating substrate type 有权
标题翻译：浮动基板类型的集成光电二极管
公开(公告)号：US07777289B2
公开(公告)日：2010-08-17
申请号：US11432678
申请日：2006-05-10
申请人： François Roy , Arnaud Tournier
发明人： François Roy , Arnaud Tournier
IPC分类号： H01L27/146
CPC分类号： H01L27/14609 , H01L27/1443
摘要： An integrated circuit includes at least one photodiode of the floating substrate type which is associated with a read transistor. The photodiode is formed from a buried layer lying beneath the floating substrate and an upper layer lying on the floating substrate. The upper layer incorporates the source and drain regions of the read transistor. The source and drain regions are produced on either side of the gate of the read transistor. An isolating trench is located alongside the source region and extends from the upper surface of the upper layer down to below the buried layer, so as to isolate the source region from said buried layer.
摘要翻译：集成电路包括与读取晶体管相关联的浮置衬底类型的至少一个光电二极管。光电二极管由位于浮置衬底之下的掩埋层和位于浮动衬底上的上层形成。上层结合读取晶体管的源极和漏极区域。源极和漏极区域在读取晶体管的栅极的任一侧上产生。隔离沟槽位于源极区旁边，并从上层的上表面向下延伸到掩埋层的下方，从而将源极区域与掩埋层隔离。

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