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    • 3. 发明申请
    • Electrically Conductive Accessory System for Non-Electrically Conductive Glove
    • 非导电手套导电配套系统
    • US20110221709A1
    • 2011-09-15
    • US12723685
    • 2010-03-15
    • Min YaoMin Guo
    • Min YaoMin Guo
    • G06F3/033
    • G06F3/039
    • This invention is directed to an accessory system including an outer touch component and inner locking component that transmits user inputs an electronic device through a conductive material.An outer touch component has a tip that stays between electronic device and a barrier material such as glove or apparel. Its root extends through the barrier material and connects the inner locking component.The locking component holds the root part of the touch component, through various mechanisms such as mechanically locked by screw thread, trap, etc or chemically bonding using glues or adhesives.Both outer touch component and inner locking component are made of conductive material, such as metal or conductive polymer. The touch tip part may be covered with conductive material, such as conductive fabric or thread, or coated with conductive plastic/polymer/rubber/gel.The distance between the outer touch component and inner locking component can be adjusted to fit various substrate material and thickness.
    • 本发明涉及一种包括外部触摸部件和内部锁定部件的附件系统,其通过导电材料传送用户输入电子设备。 外部触摸部件具有停留在电子设备和阻挡材料(例如手套或服饰)之间的尖端。 其根部延伸通过阻挡材料并连接内部锁定部件。 锁定部件通过各种机构(例如通过螺纹,陷阱等机械锁定)或使用胶水或粘合剂进行化学粘合来保持触摸部件的根部。 外部触摸部件和内部锁定部件都由导电材料制成,例如金属或导电聚合物。 触摸尖端部分可以被导电材料覆盖,例如导电织物或线,或用导电塑料/聚合物/橡胶/凝胶涂覆。 可以调节外部触摸部件和内部锁定部件之间的距离以适应各种基板材料和厚度。
    • 8. 发明授权
    • Space management for managing high capacity nonvolatile memory
    • 用于管理高容量非易失性存储器的空间管理
    • US06262918B1
    • 2001-07-17
    • US09610545
    • 2000-06-30
    • Petro EstakhriBerhanu ImanMin Guo
    • Petro EstakhriBerhanu ImanMin Guo
    • G11C1604
    • G11C8/12G06F12/0246G06F2212/7205G06F2212/7208G11C16/04G11C16/16
    • In accordance with an embodiment of the present invention, a method and apparatus is disclosed for use in a digital system having a host coupled to at least two nonvolatile memory devices. The host stores digital information in the nonvolatile memory devices and reads the stored digital information from the nonvolatile memory devices. The memory devices are organized into blocks of sectors of information. The method is for erasing digital information stored in the blocks of the nonvolatile memory devices and comprises assigning a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, each block having a predetermined number of sectors. The method further comprises forming ‘super’ blocks, each ‘super’ block comprising a plurality of blocks, identifying a particular ‘super’ block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device for erasure of the particular ‘super’ block and erasing the first and second selected blocks of the particular ‘super’ block so that erasure of the second block is performed without waiting for completion of the erasure of the first block; and indicating the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second selected blocks, wherein the speed of erase operations in the digital system is substantially increased thereby increasing the overall performance of the digital system.
    • 根据本发明的实施例,公开了一种在具有耦合到至少两个非易失性存储器件的主机的数字系统中使用的方法和装置。 主机将数字信息存储在非易失性存储器件中,并从非易失性存储器件读取所存储的数字信息。 存储器件被组织成块信息块。 该方法是用于擦除存储在非易失性存储器件的块中的数字信息,并且包括按顺序向每个非易失性存储器件分配预定数量的块,每个块具有预定数量的扇区。 该方法还包括形成“超”块,每个“超级”块包括多个块,标识具有至少两个块的特定“超级”块,第一块位于第一非易失性存储器件中,第二块为 位于第二非易失性存储器件中,用于擦除特定“超级”块并擦除特定“超级”块的第一和第二选定块,从而执行第二块的擦除,而不必等待完成第一个 块;以及在擦除第一和第二所选择的块期间指示第一和第二非易失性存储器件正在占用的状态,其中数字系统中的擦除操作的速度基本上增加,从而增加了数字系统的整体性能。
    • 9. 发明授权
    • Space management for managing high capacity nonvolatile memory
    • US6034897A
    • 2000-03-07
    • US283728
    • 1999-04-01
    • Petro EstakhriBerhanu ImanMin Guo
    • Petro EstakhriBerhanu ImanMin Guo
    • G06F12/02G11C8/12G11C16/04G11C16/08G11C16/10G11C16/16
    • G06F12/0246G11C16/04G11C16/08G11C16/102G11C16/16G11C8/12
    • In accordance with an embodiment of the present invention, a controller device is disclosed for use in a digital system having a host and nonvolatile memory devices. The controller device is coupled to the host and at least two nonvolatile memory devices. The host stores digital information in the nonvolatile memory unit and reads the stored digital information from the nonvolatile memory unit under the direction of the controller, the memory unit being organized into blocks of sectors of information. The controller device erases the digital information stored in the blocks of the nonvolatile memory devices in-parallel form. The controller device includes a space manager circuit responsive to address information from the host and operative to read, write or erase information in the nonvolatile memory unit based upon the host address information. The space manager assigns a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, forms `super` blocks, each `super` block having blocks arranged inparallel, identifies a particular `super` block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device, for erasure of the particular `super` block. The first block within the first nonvolatile memory device is first selected for erasure thereof and an erase operation to be performed on the selected first block is initiated. Thereafter, a second block within the second nonvolatile memory device is selected for erasure thereof and an erase operation to be performed on the selected second block is initiated. Thereafter, the first and second block of the particular `super` block are erased so that erasure of the second block is performed without waiting for completion of the erasure of the first block. The status of the first and second nonvolatile memory devices is indicated as being busy during erasure of the first and second blocks, wherein the speed of erase operations in the digital system is substantially increased due to the blocks of the `super` block being arranged in-parallel and overlapping of the erase operations of the blocks within the `super` blocks thereby increasing the overall performance of the digital system.