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    • 5. 发明授权
    • Cracking destructively overlapping operands in variable length instructions
    • 以可变长度指令破坏性地重叠操作数
    • US08645669B2
    • 2014-02-04
    • US12774299
    • 2010-05-05
    • Khary J. AlexanderFadi BusabaBrian CurranBruce GiameiChristian Jacobi
    • Khary J. AlexanderFadi BusabaBrian CurranBruce GiameiChristian Jacobi
    • G06F9/30
    • G06F9/30145G06F9/30032G06F9/30043G06F9/30149G06F9/3016
    • A method, information processing system, and computer program product manage computer executable instructions. At least one machine instruction for execution is received. The at least one machine instruction is analyzed. The machine instruction is identified as a predefined instruction for storing a variable length first operand in a memory location. Responsive to this identification and based on fields of the machine instruction, a relative location of a variable length second operand of the instruction with location of the first operand is determined. Responsive to the relative location having the predefined relationship, a first cracking operation is performed. The first cracking operation cracks the instruction into a first set of micro-ops (Uops) to be executed in parallel. The first set of Uops is for storing a first plurality of first blocks in the first operand. Each of said first block to be stored are identical. The first set Uops are executed.
    • 一种方法,信息处理系统和计算机程序产品管理计算机可执行指令。 接收至少一个用于执行的机器指令。 分析至少一个机器指令。 机器指令被识别为用于将可变长度的第一操作数存储在存储器位置中的预定义指令。 响应于该识别并且基于机器指令的字段,确定指令的可变长度第二操作数与第一操作数的位置的相对位置。 响应于具有预定关系的相对位置,执行第一裂解操作。 第一个破解操作将指令分解为并行执行的第一组微操作(Uop)。 第一组Uops用于在第一操作数中存储第一多个第一块。 要存储的所述第一块的每个都是相同的。 第一组Uops被执行。
    • 6. 发明申请
    • CRACKING DESTRUCTIVELY OVERLAPPING OPERANDS IN VARIABLE LENGTH INSTRUCTIONS
    • 在可变长度指令中打破破坏性重复操作
    • US20110276764A1
    • 2011-11-10
    • US12774299
    • 2010-05-05
    • Khary J. AlexanderFadi BusabaBrian CurranBruce GiameiChristian Jacobi
    • Khary J. AlexanderFadi BusabaBrian CurranBruce GiameiChristian Jacobi
    • G06F9/30G06F12/08G06F9/312
    • G06F9/30145G06F9/30032G06F9/30043G06F9/30149G06F9/3016
    • A method, information processing system, and computer program product manage computer executable instructions. At least one machine instruction for execution is received. The at least one machine instruction is analyzed. The machine instruction is identified as a predefined instruction for storing a variable length first operand in a memory location. Responsive to this identification and based on fields of the machine instruction, a relative location of a variable length second operand of the instruction with location of the first operand is determined. Responsive to the relative location having the predefined relationship, a first cracking operation is performed. The first cracking operation cracks the instruction into a first set of micro-ops (Uops) to be executed in parallel. The second set of Uops is for storing a first plurality of first blocks in the first operand. Each of said first block to be stored are identical. The first set Uops are executed.
    • 一种方法,信息处理系统和计算机程序产品管理计算机可执行指令。 接收至少一个用于执行的机器指令。 分析至少一个机器指令。 机器指令被识别为用于将可变长度的第一操作数存储在存储器位置中的预定义指令。 响应于该识别并且基于机器指令的字段,确定指令的可变长度第二操作数与第一操作数的位置的相对位置。 响应于具有预定关系的相对位置,执行第一裂解操作。 第一个破解操作将指令分解为并行执行的第一组微操作(Uop)。 第二组Uop用于在第一操作数中存储第一多个第一块。 要存储的所述第一块的每个都是相同的。 第一组Uops被执行。
    • 10. 发明申请
    • DECIMAL MULTIPLICATION FOR SUPERSCALER PROCESSORS
    • 超级处理器的十进制多路复用
    • US20060259530A1
    • 2006-11-16
    • US11460296
    • 2006-07-27
    • Fadi BusabaSteven CarloughChristopher KrygowskiJohn Rell
    • Fadi BusabaSteven CarloughChristopher KrygowskiJohn Rell
    • G06F7/38
    • G06F9/3001G06F7/496
    • A method for decimal multiplication in a superscaler processor comprising: obtaining a first operand and a second operand; establishing a multiplier and an effective multiplicand from the first operand and the second operand; and generating and accumulating a partial product term every two cycles. The partial product terms are created from the effective multiplicand and multiples of the multiplier, where the effective multiplicand is stored in a first register file, the multiples being ones times the effective multiplier, two times the effective multiplier, four times the effective multiplier and eight times the effective multiplier and the partial product terms are added to an accumulation of previous partial product terms shifted one digit right such that a digit shifted off is preserved as a result digit.
    • 一种用于在超标量处理器中进行十进制相乘的方法,包括:获得第一操作数和第二操作数; 从第一个操作数和第二个操作数建立乘数和有效的被乘数; 并且每两个周期产生和累积部分乘积项。 部分乘积项是从乘法器的有效乘数和乘数创建的,其中有效被乘数存储在第一个寄存器文件中,倍数是有效乘数的倍数,有效乘数的两倍,有效乘数的四倍和八倍 乘以有效乘数和部分乘积项添加到前一个部分乘积项的累积中,该乘积项被移位一位数字,使得数字移位被保留为结果位。