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1. 发明专利

JPS5283034A MEMORY UNIT DIAGNOSTIC SYSTEM 失效
公开(公告)号：JPS5283034A
公开(公告)日：1977-07-11
申请号：JP15903275
申请日：1975-12-29
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： TOYAMA TSUGIO , TAKAGI SHIGERU , OOBA SADAO , HATAKEYAMA SHIGEMITSU , ANDOU TETSUYA
IPC分类号： G06F12/16 , G06F11/00 , G06F11/22 , G11C29/00
摘要： PURPOSE:To increase the accuracy of diagnose, by limiting the occurrence range of error to a narrow range.

2. 发明专利

JPS5245845A RETREAT FAULT MONITORING SYSTEM OF LOGIC INFORMATION SIGNAL 失效
公开(公告)号：JPS5245845A
公开(公告)日：1977-04-11
申请号：JP12137875
申请日：1975-10-09
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO , HITACHI LTD , FUJITSU LTD
发明人： TSUJIMURA ATSUHIKO , TAKAGI SHIGERU , HATAKEYAMA SHIGEMITSU , AMANO YUTAKA , TOYAMA TSUGIO
IPC分类号： G06F11/20 , G01R31/00 , G06F11/00 , G06F11/30
摘要： PURPOSE:The fiip-flop circuit which holds detected fault information is restored from logic retreat state to normal state by fault monitor signal from monitor section, At this moment, the circuit is restored to its original state. In this way, the dipendability of the circuit can be increased.

3. 发明专利

JPS5247338A SIGNAL BUS BAR CONNECTION SYSTEM 失效
公开(公告)号：JPS5247338A
公开(公告)日：1977-04-15
申请号：JP12337975
申请日：1975-10-13
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： TAJIMA KIYOHIDE , OONISHI NOBORU , TSUJIMURA ATSUHIKO , AMANO YUTAKA , TOYAMA TSUGIO
IPC分类号： G06F12/06 , G06F3/00 , G06F13/00
摘要： PURPOSE:In order to secure betterment of transmission quality, the signal bus bar connection unit, which is corresponding to centrol unit and is shared with plural memories, is installed within memory frame.

4. 发明专利

JPS56123161A TEST SYSTEM FOR REMOTE SUBSCRIBER*S LINE CONCENTRATION STAGE OF EXCHANGE SYSTEM 失效
公开(公告)号：JPS56123161A
公开(公告)日：1981-09-28
申请号：JP2695280
申请日：1980-03-04
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： TANABE NOBUKAZU , SAKAMOTO KENICHI , YAMADA HAJIME , KOJIMA KIMIFUMI , TOYAMA TSUGIO
IPC分类号： H04M3/26 , H04M3/30
摘要： PURPOSE:To make a test by using a general talking circuit by providing the remote subscriber's line concentration stage of an exchange system with a testing circuit and by leading sound time slots to the subscriber's line testing device of a master station by alloting them to the testing circuit. CONSTITUTION:Prior to a test of the master station, a person in charge of maintenance assigns the number of a remote line concentration stage, the number of a testing circuit (subscriber's number) and the kind of the test. Then, subscriber's circuit testing device 4 is connected to remote line concentration stage 2 via master station distribution stage 3 and, according to the kinds of test, further connected to originating subscriber substituting circuit 24 for an origination test, incoming subscriber substituting circuit 25 for an incoming test, and line testing trunk 26 for a subscriber's circuit or subscriber's circuit test in remote line concentration stage 2. Further, the said circuit or trunk is connected to assigned subscribers circuit 22. After the said preparation for the test, the person in charge of the maintenance of the master station executes the test.

5. 发明专利

JPS6072450A LINE CONTROL SYSTEM 失效
公开(公告)号：JPS6072450A
公开(公告)日：1985-04-24
申请号：JP18142283
申请日：1983-09-29
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO
发明人： AKAO TAKASHI , TOYAMA TSUGIO , HOSHIDA KATSUNORI , ISHIKAWA KAZUNORI , KAWATANI IKUO
IPC分类号： G06F13/00 , H04L13/00 , H04L29/04
摘要： PURPOSE:To attain ease of extending job of a unit by connecting a unit mounting section and a selection with a connecting line having the maximum number of storage lines per unit and providing an address converting section between an address generating section and the selection section. CONSTITUTION:The selection section 13 and the unit mounting section are connected in advance by mXn of connecting lines S11-Smn, where (m) is the maximum mounting number of the units 14 and (n) is the maximum number of storage lines per unit, and the address generating section 12 is constituted to generate an address signal corresponding to the maximum number storage line (p). The address converting section 15 consists of memories or the like, the address signal is converted to designate a line individual section of the mounted units and its signal is supplied to the selection section 13. An address designating the line individual section is written in the said memory MEM. Thus, the connection between the selection section 13 and the individual section is performed by only mounting the units to the unit frame, the address signal is converted at the conversion section 15 by writing the address of the line individual section in the unit to the memory MEM, and the line individual section is designated without designating an idle connecting line.

6. 发明专利

JPS58123227A SIGNAL DETECTING CIRCUIT 失效
公开(公告)号：JPS58123227A
公开(公告)日：1983-07-22
申请号：JP566082
申请日：1982-01-18
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , NIPPON ELECTRIC CO
发明人： TOYAMA TSUGIO , AKAO TAKASHI , HOSHIDA KATSUNORI , ISHIKAWA KAZUNORI , MIYASHITA TETSUO
IPC分类号： H03K5/13 , G01R23/15 , G06F3/12 , H03K5/153 , H03K5/19 , H04M1/00 , H04M1/27
摘要： PURPOSE:To facilitate IC implementation by detecting a constant-frequency signal which is intermitted repeatedly through digital processing. CONSTITUTION:The input signal 1 of specific frequency which is intermitted at a specific period is digitized by an AD converter 2 and inputted to a frequency detector 3 which receives a high-speed clock 4. A monostable multivibrator 5 which outputs a little bit longer pulses than a signal frequency to be detected, a counter 6 and an FF7 generate output when the frequency of the input signal is greater than a prescribed value. A counter 8 and an FF9 which receive a clock 13 detect the prescribed-period continuation of the input signal 1. A decoder 10 and an FF11 output a detection output signal when the input signal 1 has the prescribed frequency and a prescribed intermittence period. This circuit is used to detect a busy-back tone, etc., in a telephone system.

7. 发明专利

JPS5583858A TEST METHOD OF FLAT CABLE 失效
公开(公告)号：JPS5583858A
公开(公告)日：1980-06-24
申请号：JP15650578
申请日：1978-12-20
申请人： NIPPON TELEGRAPH & TELEPHONE , FUJITSU LTD
发明人： KISHI SEISHICHI , KAWAKAMI TAKASHI , OOTSU YOSHIKATSU , TOYAMA TSUGIO
IPC分类号： H01B13/00 , G01R31/02
摘要： PURPOSE:To test transmission errors by classifying signal line pairs into remainder classes of rule m in order of arrangement and giving a complementary relation between test data, which is sent to signal line pairs belonging to one remainder group, and test data which is sent to all other signal line pairs. CONSTITUTION:8 Signals X0-X7 are stored in one flat cable, and 8 flat cables FC0-FC7 are used to transmit and receive signals between units. Data D and D are assigned to respective signal line pairs and have a complementary relation for each other. Signal line pairs are classified in order of arrangement with rule 5, and data D is sent to signal line pairs of remainder class 0, and data D having a complementary relation for D is sent to other signal line pairs. As a result, it can be decided whether a data group is transmitted and received correctly or not to test existence of inter-signal electromagnetic induction noise of the flat cable and normalcy of the flat cable and the signal transmission and receiving circuit.

8. 发明专利

JPH09321773A ACTIVE AND RESERVE SWITCHING METHOD 失效
公开(公告)号：JPH09321773A
公开(公告)日：1997-12-12
申请号：JP13623896
申请日：1996-05-30
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： TOYAMA TSUGIO , KAWASHIMA YUMIKO
IPC分类号： H04L1/22 , H04B1/74 , H04L12/28 , H04L12/713 , H04L12/775 , H04L12/931 , H04L12/951 , H04L12/56
摘要： PROBLEM TO BE SOLVED: To perform current/stand-by switching without generating the lost transfer data in an active/reserve switching method for a frame relay protocol processing part. SOLUTION: By a switch instruction from a control part 7, the content of a logic-physial transformation table 10 showing the logical number and the physical number of frame relay protocol processing parts 2-1 to 2-n is rewritten to multi-separate cell data through a relay line part 5 and a cell switch part 4 to transfer the same cell data added with copy display to the relay protocol processing parts 2-1 to 2-n of an active system and a reserved system. Next, the copy display identification parts 12 of the relay protocol processing parts 2-1 to 2-n identifies copy display, a cell-frame transformation part 9 composes cell data to be a frame, the stand-by system sends frames after the completing the composition of the frame to a subscriber's terminal equipment 8 through a time division switch part 1 and the current system stops cell-frame transforming processing after the completing the composition of the frame of the reserved system.

9. 发明专利

JPS6010845A PARITY ADDING SYSTEM 失效
公开(公告)号：JPS6010845A
公开(公告)日：1985-01-21
申请号：JP11695183
申请日：1983-06-30
申请人： FUJITSU LTD
发明人： TOYAMA TSUGIO
IPC分类号： H04L1/00 , H04L13/00 , H04L29/02
摘要： PURPOSE:To reduce the data processing time by reading a parity bit of reception data from a terminal device in an integrated circuit for asnychronous transmission and reception. CONSTITUTION:When the word length of a reception data R is (n-1) or no parity exists, a control signal S of a control register 115 becomes an ON-signal to bring the most significant bit of the reception data R to 0. When the word length of the content of the control register 115 is (n) or any parity exists, the control signal S becomes an OFF signal, the reception data R of a serial-parallel circuit 118 is transmitted directly to a reception data register 117 and also the presence of the parity is displayed. The presence of the parity is displayed in this way and the parity is read, then the time for parity generation is not needed.

10. 发明专利

JPH0358238A MULTIPLE SOLUTION DIAGNOSTIC SYSTEM 失效
公开(公告)号：JPH0358238A
公开(公告)日：1991-03-13
申请号：JP19468989
申请日：1989-07-27
申请人： FUJITSU LTD , FUJITSU DAIICHI TSUSHIN SOFT
发明人： TAKAHASHI KAZUO , TOYAMA TSUGIO , SHIBATA MEGUMI , SUGINO KOJI
IPC分类号： G06F11/22
摘要： PURPOSE:To shorten the diagnostic time by providing a first and a second correct solution holding means, an out-of-object classification holding means and a first - a third comparing means, deciding a processor to be diagnosed to be normal in the case an output of each comparing means does not exist, and deciding it to be abnormal in the case an output of a third comparing means exists. CONSTITUTION:A first comparing means 200 compares data a1x - a4x to be diagnosed, outputted from a processor 1 to be diagnosed with a correct solution held by a first correct solution holding means 100 at every classification, and outputs the data to be diagnosed of a discrepancy. A third comparing means 600 compares the data a2x outputted from a second comparing means 400 with a correct solution of the residual part held by a second correct solution holding means 500 at every classification, and outputs the data to be diagnosed of a discrepancy. Subsequently, in the case the data to be diagnosed, outputted from these comparing means do not exist, the processor 1 to be diagnosed is decided to be normal, and in the case the data to be diagnosed, outputted from the comparing means 600 exists, the processor 1 to be diagnosed is decided to be abnormal. In such a way, the diagnostic time of the processor for outputting the data of plural classifications having plural correct solutions can be shortened to the utmost.

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