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1. 发明专利

DE112012005548T5 Ausgangswertkorrekturverfahren für eine Sensorvorrichtung für eine physikalische Grösse, Ausgangskorrekturverfahren für einen Sensor für eine physikalische Grösse, Sensorvorrichtung für eine physikalische Grösse und Ausgangswertkorrekturvorrichtung für einen Sensor für eine physikalische Grösse 未知
公开(公告)号：DE112012005548T5
公开(公告)日：2014-09-11
申请号：DE112012005548
申请日：2012-12-28
申请人： FUJI ELECTRIC CO LTD
发明人： NISHIKAWA MUTSUO , UEMATSU KATSUYUKI , MATSUNAMI KAZUHIRO , ITO KEIICHI , SAITO KAZUNORI
IPC分类号： G01D3/028 , G01L9/00 , G01L19/04
摘要： Eine erste Erfassungseinheit (111) erfasst Anfangs-Ausgabewerte eines Sensors für eine physikalische Größe (101). Eine zweite Erfassungseinheit (112) erfasst Ziel-Ausgabewerte für den Sensor für eine physikalische Größe (101). Eine erste Berechnungseinheit (113) extrahiert erste Kennwerte, indem sie eine erste Kennlinienformel zweiter Ordnung, welche korrigierte Ausgangskennlinien des Sensors für eine physikalische Größe (101) angibt, auf der Grundlage der Anfangs-Ausgabewerte und der Ziel-Ausgabewerte des Sensors für eine physikalische Größe (101) berechnet. Die zweite Berechnungseinheit (114) extrahiert zweite Kennwerte, indem sie eine zweite Kennlinienformel zweiter Ordnung zum Korrigieren der ersten Kennwerte auf der Grundlage einer vorgeschriebenen Temperatur und der ersten Kennwerte berechnet. Eine Recheneinheit (104) berechnet einen korrigierten Ausgabewert für den Sensor für eine physikalische Größe (101) auf der Grundlage der ersten Kennlinienformel, welche durch Eingeben der zweiten Kennwerte in die zweite Kennlinienformel korrigiert wird. Folglich kann die Korrekturgenauigkeit verbessert werden, können die Kosten gesenkt werden und kann die Verarbeitungsgeschwindigkeit erhöht werden.

2. 发明专利

JPH07334391A INFORMATION PROCESSOR PROVIDED WITH TRANSMITTING FUNCTION AND TRANSMISSION MONITORING METHOD FOR THE SAME 失效
公开(公告)号：JPH07334391A
公开(公告)日：1995-12-22
申请号：JP12842394
申请日：1994-06-10
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G06F11/30 , G06F13/00
摘要： PURPOSE:To continue control and arithmetic as the information processor even in the case of any abnormality at a transmitting function by interrupting a main transmission processing program, calling a program counter value and a stack pointer value and continuously processing an interrupted information processing program when processing time exceeds the set time of a monitoring timer. CONSTITUTION:A main transmission processing program S4 equipped with a priority level higher than that of an information program S2 is arranged, and the monitoring timer constituted as one part of this main transmission processing program S4 and equipped with the set time within the term of routine interruption is provided to monitor the transmission processing time. That monitoring timer monitors the transmission processing time and when this time exceeds the set time of the monitoring timer, transmission abnormality is decided. Then, the main transmission processing program S4 is interrupted, the program count value and the stack pointer value stored in a memory 3A are called, and the interrupted information processing program S2 is continuously processed. Therefore, even when any abnormality is generated at the transmitting function, the control and arithmetic of an information processor 1 can be continued.

3. 发明专利

JPH05127779A MICROCOMPUTER SYSTEM AND ITS INITIALIZATION CONTROL METHOD 失效
公开(公告)号：JPH05127779A
公开(公告)日：1993-05-25
申请号：JP29257891
申请日：1991-11-08
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G06F1/24 , G06F13/00
摘要： PURPOSE:To places each microcomputer system in high-speed operation by making each microcomputer system detect all microcomputer systems signifying initialization end signals and start normal operation including a mutual communication. CONSTITUTION:For example, a microcomputer system SA completes initialization at time t1 and turns ON the initialization end signal A, but the initialization end signal B of a microcomputer SB is not turned ON, so no communication is started. When the microcomputer system SB ends the initialization at time t2, on the other hand, the initialization end signal B is turned ON, the ON state of the initialization end signal A of the microcomputer system SA is confirmed, and a communication signal CB1 is outputted to the microcomputer system SA to start a communication. Similarly, the microcomputer system SA once knowing that the initialization end signal B is turned ON at the time t2 outputs a communication signal CA1 to the microcomputer system SB to start the communication.

4. 发明专利

JPH0391008A ERROR PROCESSING SYSTEM FOR ASSEMBLED-TYPE MODULE UNIT DEVICE 失效
公开(公告)号：JPH0391008A
公开(公告)日：1991-04-16
申请号：JP22866089
申请日：1989-09-04
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G05B19/05 , G05B19/048 , G05B23/02
摘要： PURPOSE:To quickly recognize an error cause and recover a system by sending a code, which is assigned in accordance with the mode of the error detected by an input/output module, to a programmable controller PC through a terminal link cable. CONSTITUTION:Error is monitored in the normal operation; and if error occurs, a code assigning means in an assembled-type module unit device 4 assignes the error to a code and sends this code from the device 4 to a PC 1 through a terminal link cable 3. The PC 1 monitors the code in accordance with the code reception result by a loader 5 and judges the occurrence of error in an input/output module 2 and the error cause by this code. Thus, recognition of the trouble cause of the input/output module and recovery of the system are quickly performed.

5. 发明专利

JPH0272435A CENTRAL ARITHMETIC PROCESSOR 失效
公开(公告)号：JPH0272435A
公开(公告)日：1990-03-12
申请号：JP22341588
申请日：1988-09-08
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G06F9/48 , G06F9/46
摘要： PURPOSE:To surely accept the requests for execution of the interruption programs having low preference ranks even though the executing requests are frequently produced to the interruption programs having high preference ranks by executing the interruption processes in the order of storage of identification numbers. CONSTITUTION:A RAM 3 includes an execution flag 3-1 and a sequence table 3-2. The flag 3-1 stores the attribute information that shows whether a CPU 1 is executing an interruption program or not. The table 3-2 stores the identification numbers of the requested interruption programs in the order of their inputs. Then the CPU 1 executes the arithmetic program stored in a ROM 2 and then executes the interruption programs in the order of input of the executing requests by reference to the table 3-2. Thus the interruption programs of low preference ranks are surely executed even though the executing requests are frequently produced for the interruption programs of high preference ranks.

6. 发明专利

JPH03210601A INITIALIZING METHOD FOR PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPH03210601A
公开(公告)日：1991-09-13
申请号：JP561990
申请日：1990-01-12
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G05B19/05
摘要： PURPOSE:To give no influence to the normal processing of a programmable controller by setting an exclusive fixed time limit in a fixed period for execution of the initialization and performing the initialization of an input/output unit over plural periods when the time for initialization of the input/output unit exceeds a fixed level. CONSTITUTION:A programmable controller 1 is connected to the collective module units 2 via a bus cable 3. An exclusive fixed time limit is set within a fixed period for execution of the initialization of the controller 1. Then the initialization of an input/output unit is performed over plural periods when the time for initialization of the input/output unit exceeds a fixed level. In other words, a fixed time limit is set for initialization of the input/output unit and this unit is initialized in time division of plural periods. Thus it is not required to increase the scanning time despite a large number of input/output units for extension. As a result, no influence is given to the scanning time despite the extension of input/output units like the units 2, etc.

7. 发明专利

JPH03156505A PROGRAMMABLE CONTROLLER SYSTEM 失效
公开(公告)号：JPH03156505A
公开(公告)日：1991-07-04
申请号：JP29520089
申请日：1989-11-14
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G05B19/05
摘要： PURPOSE:To perform many interrupt processing to eliminate a need of a private interrupt signal line in a system by storing an interrupt signal together with an information signal and discriminating contents of the interrupt signal. CONSTITUTION:A reception circuit 51 writes the information signal and the interrupt signal received from a control object device 40 in a RAM 52. Signals in the RAM 52 are read out by a CPU 61 of a programmable controller 60. At this time, the CPU 61 reads out turning-on/off signals of contacts B0 and B1 from the RAM 52 through a bus switch 63 and discriminates turning-on/off states; and when turning-on of the contact B0 or B1 is discriminated, it is judged that execution of an interrupt program is indicated, and the interrupt program corresponding to the turned-on contact is read out from a user RAM 62 and is executed.

8. 发明专利

JPS6425206A SYSTEM FOR PROCESSING INPUT/OUTPUT OF PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPS6425206A
公开(公告)日：1989-01-27
申请号：JP17995987
申请日：1987-07-21
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G05B19/05 , G05B19/04 , G06F9/06
摘要： PURPOSE:To easily detect erroneous input, by storing attribute information representing whether or not an information area is unused in a storage area where input/output information is stored. CONSTITUTION:A programmable controller which performs the operation control of an external equipment is constituted of a processor which executes a sequence program, a memory device 2', etc. In each address of the memory device 2', an area 14 which stores null address information at a leading one bit is provided. And an area 15 which stores information to which the programmable controller is inputted and outputted is arranged following the area 14. In such a way, in the null address information area 14, '1' is stored when the information to be stored in the address is usable, and '0' when it is a null address. As a result, it is possible to detect whether or not a designated address is the null address.

9. 发明专利

JPH0854966A METHOD FOR INITIALIZING MICROCOMPUTER SYSTEM 失效
公开(公告)号：JPH0854966A
公开(公告)日：1996-02-27
申请号：JP18915794
申请日：1994-08-11
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI
IPC分类号： G06F11/14 , G06F1/24
摘要： PURPOSE:To prevent the runaway due to the abnormality of a RAM by performing the initialization of a CPU in a microcomputer board without using the CALL/RET instruction for which the RAM is used. CONSTITUTION:Steps S1 to S6 A are initialization processings for which a RAM is not used. Namely, at first, an interruption is inhibited (S2), a CPU internal register is initialized (S3) and the initialization of a CPU is performed (S4A). In this initialization of the CPU, the initialization is performed by using the macroinstruction of an assembler level corresponding to the CALL and RET for which an internal register is used in place of the RAM for a sub-routine processing. Next, a memory check is performed (S5A) and the presence or absence of an abnormality is discriminated (S5B). When the abnormality does not exist, a stack pointer is set (S6A) and the processing is proceeded to the initialization processing (S7) of a peripheral device for which the RAM is used. Therefore, the initialization processing of the microcomputer system can be performed without causing the runaway due to the abnormality of the RAM and the contents thereof can be known at the time of the abnormality of the RAM.

10. 发明专利

JPH0319002A INTERNAL PROCESSING METHOD FOR PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPH0319002A
公开(公告)日：1991-01-28
申请号：JP15368289
申请日：1989-06-16
申请人： FUJI ELECTRIC CO LTD
发明人： ITO KEIICHI , SAITO HIROKI
IPC分类号： G05B19/05
摘要： PURPOSE:To prevent the continuation of the same processing by discriminating the contents of the processing requests received right before execution of plural data processings respectively and requesting other processings based on the discriminated contents of the processing requests. CONSTITUTION:A programmable controller contains an input/output device 2 which carries out plural data processings for external equipments and a processor 1 which controls the data processings in accordance with the data processing state of the device 2. When an internal processing of the programmable controller is carried out, the data processing which is carried out right before the requests are produced for those data processings is discriminated. Based on this discrimination result, the data processing to be carried out first after said discrimination operation is decided. Thus the same processing request is never continuously produced.

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