专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07998846B2 3-D integrated circuit system and method 有权
标题翻译： 3-D集成电路系统及方法
公开(公告)号：US07998846B2
公开(公告)日：2011-08-16
申请号：US12209478
申请日：2008-09-12
申请人： Eunha Kim , Jeremy Wahl , Shenqing Fang , YouSeok Suh , Kuo-Tung Chang , Yi Ma , Rinji Sugino , Jean Yang
发明人： Eunha Kim , Jeremy Wahl , Shenqing Fang , YouSeok Suh , Kuo-Tung Chang , Yi Ma , Rinji Sugino , Jean Yang
IPC分类号： H01L21/263
CPC分类号： H01L21/02675 , H01L21/02592 , H01L21/02691
摘要： A semiconductor fabrication system and method are presented. A three dimensional multilayer integrated circuit fabrication method can include forming a first device layer and forming a second device layer on top of the first device layer with minimal detrimental heat transfer to the first layer by utilizing a controlled laser layer formation annealing process. A controlled laser crystallization process can be utilized and the controlled laser can include creating an amorphous layer; defining a crystallization area in the amorphous layer, where in the crystallization area is defined to promote single crystal growth (i.e. prevent multi-crystalline growth); and applying laser to the crystallization area, wherein the laser is applied in a manner that prevents undesired heat transfer to another layer.
摘要翻译：提出了半导体制造系统和方法。三维多层集成电路制造方法可以包括通过利用受控激光层形成退火工艺形成第一器件层并在第一器件层顶部形成第二器件层，并以最小的有害热传递到第一层。可以利用受控激光结晶过程，并且受控激光器可以包括产生非晶层; 限定非晶层中的结晶区域，其中结晶区域被限定为促进单晶生长（即防止多晶生长）; 以及将激光施加到结晶区域，其中以防止不希望的热传递到另一层的方式施加激光。

2. 发明授权

US08987092B2 Methods for fabricating memory cells having fin structures with semicircular top surfaces and rounded top corners and edges 有权
标题翻译：用于制造具有半圆形顶表面和圆角顶角和边缘的鳍结构的存储单元的方法
公开(公告)号：US08987092B2
公开(公告)日：2015-03-24
申请号：US12110974
申请日：2008-04-28
申请人： Inkuk Kang , Gang Xue , Shenqing Fang , Rinji Sugino , Yi Ma
发明人： Inkuk Kang , Gang Xue , Shenqing Fang , Rinji Sugino , Yi Ma
IPC分类号： H01L21/336 , H01L27/115 , H01L29/66 , H01L29/78
CPC分类号： H01L27/11568 , H01L29/66795 , H01L29/7854
摘要： Methods for fabricating a FIN structure with a semicircular top surface and rounded top surface corners and edges are disclosed. As a part of a disclosed method, a FIN structure is formed in a semiconductor substrate. The FIN structure includes a top surface having corners and edges. The FIN structure is annealed where the annealing causes the top surface to have a semicircular shape and the top surface corners and edges to be rounded.
摘要翻译：公开了制造具有半圆顶表面和圆顶顶表面拐角和边缘的FIN结构的方法。作为所公开的方法的一部分，在半导体衬底中形成FIN结构。 FIN结构包括具有拐角和边缘的顶表面。 FIN结构退火，其中退火导致顶表面具有半圆形形状，并且顶表面拐角和边缘被倒圆。

3. 发明授权

US09012333B2 Varied silicon richness silicon nitride formation 有权
标题翻译：各种硅富集氮化硅形成
公开(公告)号：US09012333B2
公开(公告)日：2015-04-21
申请号：US12556199
申请日：2009-09-09
申请人： Yi Ma , Shenqing Fang , Robert Ogle
发明人： Yi Ma , Shenqing Fang , Robert Ogle
IPC分类号： H01L21/469 , H01L21/318 , H01L21/02 , H01L21/28 , H01L21/314 , H01L29/423 , H01L29/51
CPC分类号： H01L29/518 , H01L21/0217 , H01L21/022 , H01L21/0228 , H01L21/28282 , H01L21/3141 , H01L21/3185 , H01L29/4234 , H01L29/511 , H01L29/792
摘要： A method, in one embodiment, can include forming a tunnel oxide layer on a substrate. In addition, the method can include depositing via atomic layer deposition a first layer of silicon nitride over the tunnel oxide layer. Note that the first layer of silicon nitride includes a first silicon richness. The method can also include depositing via atomic layer deposition a second layer of silicon nitride over the first layer of silicon nitride. The second layer of silicon nitride includes a second silicon richness that is different than the first silicon richness.
摘要翻译：在一个实施例中，一种方法可以包括在衬底上形成隧道氧化物层。此外，该方法可以包括通过原子层沉积在隧道氧化物层上沉积第一层氮化硅。注意，第一层氮化硅包括第一硅丰富度。该方法还可以包括通过原子层沉积在第一氮化硅层上沉积第二层氮化硅。第二层氮化硅包括与第一硅浓度不同的第二硅浓度。

4. 发明授权

US08818132B2 Camera calibration with lens distortion from low-rank textures 有权
标题翻译：相机校准与低等级纹理的镜头失真
公开(公告)号：US08818132B2
公开(公告)日：2014-08-26
申请号：US13310729
申请日：2011-12-03
申请人： Zhengdong Zhang , Yasuyuki Matsushita , Yi Ma
发明人： Zhengdong Zhang , Yasuyuki Matsushita , Yi Ma
IPC分类号： G06K9/36 , G06T7/00
CPC分类号： G06T7/0018 , G06T7/80 , G06T2207/20104 , H04N17/002
摘要： A “Camera Calibrator” provides various techniques for recovering intrinsic camera parameters and distortion characteristics by processing a set of one or more input images. These techniques are based on extracting “Transform Invariant Low-Rank Textures” (TILT) from input images using high-dimensional convex optimization tools for matrix rank minimization and sparse signal recovery. The Camera Calibrator provides a simple, accurate, and flexible method to calibrate intrinsic parameters of a camera even with significant lens distortion, noise, errors, partial occlusions, illumination and viewpoint change, etc. Distortions caused by the camera can then be automatically corrected or removed from images. Calibration is achieved under a wide range of practical scenarios, including using multiple images of a known pattern, multiple images of an unknown pattern, single or multiple images of multiple patterns, etc. Significantly, calibration is achieved without extracting or manually identifying low-level features such as corners or edges from the calibration images.
摘要翻译： “相机校准器”提供了通过处理一组一个或多个输入图像来恢复本征相机参数和失真特性的各种技术。这些技术基于使用用于矩阵秩最小化和稀疏信号恢复的高维凸优化工具从输入图像中提取“变换不变低阶纹理”（TILT）。相机校准器提供了一种简单，准确和灵活的校准相机内在参数的方法，即使有明显的镜头失真，噪点，错误，部分遮挡，照明和视点更改等。然后可以自动更正相机造成的失真或从图像中删除在广泛的实际情况下实现校准，包括使用已知图案的多个图像，未知图案的多个图像，多个图案的单个或多个图像等。显着地，在不提取或手动识别低级别的情况下实现校准特征如校准图像的拐角或边缘。

5. 发明授权

US08426839B1 Conducting bridge random access memory (CBRAM) device structures 有权
标题翻译：传导桥随机存取存储器（CBRAM）器件结构
公开(公告)号：US08426839B1
公开(公告)日：2013-04-23
申请号：US12767552
申请日：2010-04-26
申请人： Yi Ma , Chakravarthy Gopalan , Antonio R. Gallo , Janet Wang
发明人： Yi Ma , Chakravarthy Gopalan , Antonio R. Gallo , Janet Wang
IPC分类号： H01L45/00 , H01L29/04 , H01L29/12
CPC分类号： H01L45/085 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/142 , H01L45/1608 , H01L45/165 , H01L45/1658 , H01L45/1675 , H01L45/1683
摘要： A conductive bridging memory cell may include an ion conductor layer formed over an active electrode that is a source of conductive ions for the ion conductor; a conductive layer; and a barrier layer formed below the active layer and in contact with the conductive, the barrier layer substantially preventing a movement of conductive ions therethrough.
摘要翻译：导电桥接存储单元可以包括在作为离子导体的导电离子源的有源电极上形成的离子导体层; 导电层; 以及形成在有源层下方并与导体接触的阻挡层，阻挡层基本上防止导电离子通过其移动。

6. 发明授权

US07871942B2 Methods for manufacturing high dielectric constant film 有权
标题翻译：制造高介电常数膜的方法
公开(公告)号：US07871942B2
公开(公告)日：2011-01-18
申请号：US12057113
申请日：2008-03-27
申请人： Shreyas S. Kher , Pravin K. Narwankar , Khaled Z. Ahmed , Yi Ma
发明人： Shreyas S. Kher , Pravin K. Narwankar , Khaled Z. Ahmed , Yi Ma
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/31645 , C23C14/083 , C23C16/56 , H01L21/3141
摘要： Processes for making a high K (dielectric constant) film using an ultra-high purity hafnium containing organometallic compound are disclosed. Also described are devices incorporating high K films made with high purity hafnium containing organometallic compounds.
摘要翻译：公开了使用含有超高纯度铪的有机金属化合物制造高K（介电常数）膜的方法。还描述了包含用高纯度铪含有有机金属化合物制成的高K膜的装置。

7. 发明授权

US07659158B2 Atomic layer deposition processes for non-volatile memory devices 失效
标题翻译：用于非易失性存储器件的原子层沉积工艺
公开(公告)号：US07659158B2
公开(公告)日：2010-02-09
申请号：US12059782
申请日：2008-03-31
申请人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
发明人： Yi Ma , Shreyas S. Kher , Khaled Ahmed , Tejal Goyani , Maitreyee Mahajani , Jallepally Ravi , Yi-Chiau Huang
IPC分类号： H01L21/8238 , H01L29/788
CPC分类号： H01L29/42324 , H01L21/28273 , H01L29/7881
摘要： Embodiments of the invention provide memory devices and methods for forming memory devices. In one embodiment, a memory device is provided which includes a floating gate polysilicon layer disposed over source/drain regions of a substrate, a silicon oxynitride layer disposed over the floating gate polysilicon layer, a first aluminum oxide layer disposed over the silicon oxynitride layer, a hafnium silicon oxynitride layer disposed over the first aluminum oxide layer, a second aluminum oxide layer disposed over the hafnium silicon oxynitride layer, and a control gate polysilicon layer disposed over the second aluminum oxide layer. In another embodiment, a memory device is provided which includes a control gate polysilicon layer disposed over an inter-poly dielectric stack disposed over a silicon oxide layer disposed over the floating gate polysilicon layer. The inter-poly dielectric stack contains two silicon oxynitride layers separated by a silicon nitride layer.
摘要翻译：本发明的实施例提供了用于形成存储器件的存储器件和方法。在一个实施例中，提供了一种存储器件，其包括设置在衬底的源极/漏极区域上的浮置栅极多晶硅层，设置在浮置栅极多晶硅层上的氧氮化硅层，设置在氧氮化硅层上的第一氧化铝层，设置在所述第一氧化铝层上的铪硅氮化物层，设置在所述铪硅氮氧化物层上的第二氧化铝层，以及设置在所述第二氧化铝层上的控制栅极多晶硅层。在另一个实施例中，提供了一种存储器件，其包括设置在布置在浮置多晶硅层上方的氧化硅层上的多晶硅介质叠层之间的控制栅极多晶硅层。多晶硅间介质堆叠包含由氮化硅层分隔的两个氮氧化硅层。

8. 发明授权

US07602067B2 Hetero-structure variable silicon rich nitride for multiple level memory flash memory device 失效
标题翻译：异质结构可变富硅氮化物用于多级存储器闪存器件
公开(公告)号：US07602067B2
公开(公告)日：2009-10-13
申请号：US11957787
申请日：2007-12-17
申请人： Yi Ma , Robert Ogle
发明人： Yi Ma , Robert Ogle
IPC分类号： H01L29/40
CPC分类号： H01L21/28282 , H01L27/115 , H01L27/11568 , H01L29/42348 , H01L29/7923
摘要： Charge storage stacks containing hetero-structure variable silicon richness nitride for memory cells and methods for making the charge storage stacks are provided. The charge storage stack can contain a first insulating layer on a semiconductor substrate; n charge storage layers comprising silicon-rich silicon nitride on the first insulating layer, wherein numbers of the charge storage layers increase from the bottom to the top and a k-value of an n−1th charge storage layer is higher than a k-value of an nth charge storage layer; n−1 dielectric layers comprising substantially stoichiometric silicon nitride between each of the n charge storage layers; and a second insulating layer on the nth charge storage layers.
摘要翻译：提供了包含用于存储单元的异质结构可变富硅氮化物的电荷存储堆，以及用于制造电荷存储堆的方法。电荷存储堆可以包含半导体衬底上的第一绝缘层; n在第一绝缘层上形成包括富硅氮化物的存储层，其中电荷存储层的数量从底部增加到顶部，并且第n-1个电荷存储层的k值高于k值的第n电荷存储层; n-1个电介质层，其在n个电荷存储层中的每一个之间包含基本上化学计量的氮化硅; 以及第n电荷存储层上的第二绝缘层。

9. 发明申请

US20090065816A1 MODULATING THE STRESS OF POLY-CRYSTALINE SILICON FILMS AND SURROUNDING LAYERS THROUGH THE USE OF DOPANTS AND MULTI-LAYER SILICON FILMS WITH CONTROLLED CRYSTAL STRUCTURE 审中-公开
标题翻译：通过使用多晶硅和多层硅膜控制晶体结构来调节聚晶硅薄膜和周边层的应力
公开(公告)号：US20090065816A1
公开(公告)日：2009-03-12
申请号：US12206390
申请日：2008-09-08
申请人： KEVIN L. CUNNINGHAM , Yi Ma , Majeed A. Foad
发明人： KEVIN L. CUNNINGHAM , Yi Ma , Majeed A. Foad
IPC分类号： H01L21/20 , H01L29/04 , H01L29/78
CPC分类号： H01L29/7833 , C23C16/24 , H01L21/02532 , H01L21/02573 , H01L21/02592 , H01L21/02595 , H01L21/02609 , H01L21/0262 , H01L21/32155 , H01L29/6659 , H01L29/7845
摘要： In certain embodiments a method of forming a multi-layer silicon film is provided. A substrate is placed in a process chamber. An amorphous silicon film is formed on the substrate by flowing into the process chamber a first process gas comprising a silicon source gas. A polysilicon film is formed on the amorphous silicon film by flowing into the deposition chamber a first process gas mix comprising a silicon source gas and a first dilution gas mix comprising H2 and an inert gas at a first temperature. In certain embodiments, the polysilicon film has a crystal orientation which is dominated by the direction. In certain embodiments, the polysilicon film has a crystal orientation dominated by the orientation. Structures comprising a lower amorphous silicon film and an upper polysilicon film having a random grain structure or a columnar grain structure are provided as well.
摘要翻译：在某些实施方案中，提供了形成多层硅膜的方法。将基板放置在处理室中。通过在处理室中流入包括硅源气体的第一工艺气体，在衬底上形成非晶硅膜。通过在第一温度下流入沉积室中，形成包含硅源气体和包含H 2和惰性气体的第一稀释气体混合物的第一工艺气体混合物，在非晶硅膜上形成多晶硅膜。在某些实施例中，多晶硅膜具有由<220>方向支配的晶体取向。在某些实施方案中，多晶硅膜具有以<111>取向为主的晶体取向。还提供了包括下部非晶硅膜和具有随机晶粒结构或柱状晶粒结构的上部多晶硅膜的结构。

10. 发明申请

US20070049043A1 Nitrogen profile engineering in HI-K nitridation for device performance enhancement and reliability improvement 审中-公开
标题翻译：氮化硅工程在HI-K氮化中的设备性能提升和可靠性提高
公开(公告)号：US20070049043A1
公开(公告)日：2007-03-01
申请号：US11209472
申请日：2005-08-23
申请人： Shankar Muthukrishnan , Rahul Sharangpani , Tejal Goyani , Pravin Narwankar , Shreyas Kher , Yi Ma , Giuseppina Conti
发明人： Shankar Muthukrishnan , Rahul Sharangpani , Tejal Goyani , Pravin Narwankar , Shreyas Kher , Yi Ma , Giuseppina Conti
IPC分类号： H01L21/31
CPC分类号： H01L21/0234 , H01L21/02329 , H01L21/28202 , H01L21/3144 , H01L21/3145 , H01L21/31645 , H01L29/517
摘要： A method and apparatus for forming a nitrided gate dielectric. The method comprises incorporating nitrogen into a dielectric film using a plasma nitridation process to form a nitrided gate dielectric. The first step involves providing a substrate comprising a gate dielectric film. The second step involves inducing a voltage on the substrate. Finally, the substrate is exposed to a plasma comprising a nitrogen source while maintaining the voltage to form a nitrided gate dielectric on the substrate. In one embodiment, the voltage is induced on the substrate by applying a voltage to an electrostatic chuck supporting the substrate. In another embodiment, the voltage is induced on the substrate by applying a DC bias voltage to an electrode positioned adjacent the substrate.
摘要翻译：一种用于形成氮化栅极电介质的方法和装置。该方法包括使用等离子体氮化工艺将氮合并到电介质膜中以形成氮化栅极电介质。第一步涉及提供包括栅介质膜的衬底。第二步涉及在衬底上感应电压。最后，将衬底暴露于包含氮源的等离子体，同时保持电压以在衬底上形成氮化栅电介质。在一个实施例中，通过向支撑衬底的静电卡盘施加电压来在衬底上感应电压。在另一个实施例中，通过对邻近衬底定位的电极施加DC偏置电压来在衬底上感应出电压。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式