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1. 发明申请

US20070221610A1 Method using monolayer etch masks in combination with printed masks 失效
标题翻译：使用单层蚀刻掩模与印刷掩模组合的方法
公开(公告)号：US20070221610A1
公开(公告)日：2007-09-27
申请号：US11388718
申请日：2006-03-24
申请人： Eugene Chow , William Wong , Michael Chabinyc , Jeng Lu , Ana Arias
发明人： Eugene Chow , William Wong , Michael Chabinyc , Jeng Lu , Ana Arias
IPC分类号： H01B13/00 , B44C1/22
CPC分类号： H01L21/302 , H01L21/0271 , H01L21/0273 , H01L27/124 , H01L27/1288 , H01L27/1292 , H01L29/66765
摘要： A method to pattern films into dimensions smaller than the printed pixel mask size. A printed mask is deposited on a thin film on a substrate. The second mask layer is selectively deposited onto the film, but not to the printed mask. A third mask is then printed onto the substrate to pattern a portion of the second mask. Certain solvents are then used to remove the printed mask but not the mask layer on the thin film. The mask layer is then used to form a pattern on the thin film in combination with etching. The features formed in the thin film are smaller than the smallest dimension of the printed mask. The coated mask layer can be a self-assembled mono-layer or other material that selectively binds to the thin film.
摘要翻译：将薄膜图案尺寸小于印刷像素掩模尺寸的方法。印刷的掩模沉积在基底上的薄膜上。第二掩模层选择性地沉积在膜上，而不是印刷在掩模上。然后将第三掩模印刷到基底上以对第二掩模的一部分进行图案化。然后使用某些溶剂去除印刷的掩模，而不是薄膜上的掩模层。然后将掩模层与蚀刻结合在薄膜上形成图案。形成在薄膜中的特征小于印刷掩模的最小尺寸。涂覆的掩模层可以是选择性地结合薄膜的自组装单层或其它材料。

2. 发明申请

US20070221611A1 Method of manufacturing fine features for thin film transistors 有权
标题翻译：制造薄膜晶体管精细特征的方法
公开(公告)号：US20070221611A1
公开(公告)日：2007-09-27
申请号：US11388731
申请日：2006-03-24
申请人： Eugene Chow , William Wong , Michael Chabinyc , Ana Arias
发明人： Eugene Chow , William Wong , Michael Chabinyc , Ana Arias
IPC分类号： H01B13/00 , C23F1/00
CPC分类号： H01L29/4908 , H01L27/124 , H01L27/1292
摘要： A process for fabricating fine features such as small gate electrodes on a transistor. The process involves the jet-printing of a mask and the plating of a metal to fabricate sub-pixel and standard pixel size features in one layer. Printing creates a small sub-pixel size gap mask for plating a fine feature. A second printed mask may be used to protect the newly formed gate and etch standard pixel size lines connecting the small gates.
摘要翻译：一种在晶体管上制造诸如小栅电极的精细特征的工艺。该方法涉及一种掩模的喷墨印刷和金属镀层，以在一层中制造亚像素和标准像素尺寸特征。打印创建一个小的子像素大小的间隙掩模，用于电镀精细特征。可以使用第二印刷掩模来保护新形成的栅极并蚀刻连接小栅极的标准像素尺寸线。

3. 发明申请

US20050127357A1 Thin-film transistor array with ring geometry 有权
标题翻译：具有环形几何形状的薄膜晶体管阵列
公开(公告)号：US20050127357A1
公开(公告)日：2005-06-16
申请号：US10734429
申请日：2003-12-12
申请人： William Wong , Jeng Lu , Alberto Salleo , Michael Chabinyc , Raj Apte , Robert Street
发明人： William Wong , Jeng Lu , Alberto Salleo , Michael Chabinyc , Raj Apte , Robert Street
IPC分类号： H01L27/12 , H01L27/28 , H01L27/32 , H01L29/417 , H01L29/786 , H01L29/08
CPC分类号： H01L27/283 , H01L27/12 , H01L27/3262 , H01L27/3274 , H01L29/41733 , H01L29/78696 , H01L51/0541 , H01L51/0545
摘要： An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.
摘要翻译：描述了用于显示器或传感器装置的改进的晶体管阵列。显示器或传感器装置包括多个像素。每个像素包括宽度和长度。每个像素由晶体管寻址。寻址每个像素的晶体管具有通道宽度。每个通道宽度大于要寻址的像素的宽度或长度。通过制造具有非常长的沟道宽度的晶体管，可以容易地使用低迁移率半导体材料来制造显示器件。

4. 发明申请

US20050258428A1 Thin-film transistor array with ring geometry 有权
公开(公告)号：US20050258428A1
公开(公告)日：2005-11-24
申请号：US11190178
申请日：2005-07-25
申请人： William Wong , Jeng Lu , Alberto Salleo , Michael Chabinyc , Raj Apte , Robert Street
发明人： William Wong , Jeng Lu , Alberto Salleo , Michael Chabinyc , Raj Apte , Robert Street
IPC分类号： H01L27/12 , H01L27/28 , H01L27/32 , H01L29/417 , H01L29/786 , H01L29/04
CPC分类号： H01L27/283 , H01L27/12 , H01L27/3262 , H01L27/3274 , H01L29/41733 , H01L29/78696 , H01L51/0541 , H01L51/0545
摘要： An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.

5. 发明申请

US20060115945A1 Printed transistors 有权
标题翻译：印刷晶体管
公开(公告)号：US20060115945A1
公开(公告)日：2006-06-01
申请号：US11332577
申请日：2006-01-12
申请人： Michael Chabinyc , Ana Arias
发明人： Michael Chabinyc , Ana Arias
IPC分类号： H01L21/8238
CPC分类号： H01L51/0004 , B82Y10/00 , B82Y30/00 , H01L27/1285 , H01L27/1292 , H01L27/283 , H01L29/66742 , H01L51/0012 , H01L51/0541 , H01L51/0545
摘要： A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.
摘要翻译：通过将改性剂涂层施加到源极和漏极触点和/或向这些触点之间的沟道区域施加晶体管。选择改性剂涂层以调节源极/漏极/沟道区域中的表面能量图案，使得半导体印刷液体不被从通道区域拉出。例如，可以选择用于触点的改性剂涂层以具有与用于沟道区的改性涂层基本上相同的表面能。沉积在通道区域上的半导体印刷液体因此沉降就位（由于缺少表面能量差），并且在触点之间形成相对厚的有源半导体区域。或者，可以选择改性剂涂层以具有比通道区域中的改性剂涂层更低的表面能，其实际上导致半导体印刷液体被拉向通道区域。

6. 发明申请

US20080092807A1 Transistor Production Using Semiconductor Printing Fluid 有权
标题翻译：使用半导体印刷液的晶体管生产
公开(公告)号：US20080092807A1
公开(公告)日：2008-04-24
申请号：US11957384
申请日：2007-12-14
申请人： Michael Chabinyc , Ana Arias
发明人： Michael Chabinyc , Ana Arias
IPC分类号： B05C11/02
CPC分类号： H01L51/0004 , B82Y10/00 , B82Y30/00 , H01L27/1285 , H01L27/1292 , H01L27/283 , H01L29/66742 , H01L51/0012 , H01L51/0541 , H01L51/0545
摘要： A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.
摘要翻译：通过将改性剂涂层施加到源极和漏极触点和/或向这些触点之间的沟道区域施加晶体管。选择改性剂涂层以调节源极/漏极/沟道区域中的表面能量图案，使得半导体印刷液体不被从通道区域拉出。例如，可以选择用于触点的改性剂涂层以具有与用于沟道区的改性涂层基本上相同的表面能。沉积在通道区域上的半导体印刷液体因此沉降就位（由于缺少表面能量差）并且在触点之间形成相对厚的有源半导体区域。或者，可以选择改性剂涂层以具有比通道区域中的改性剂涂层更低的表面能，其实际上导致半导体印刷液体被拉向通道区域。

7. 发明申请

US20070158644A1 Organic thin-film transistor backplane with multi-layer contact structures and data lines 有权
标题翻译：具有多层接触结构和数据线的有机薄膜晶体管背板
公开(公告)号：US20070158644A1
公开(公告)日：2007-07-12
申请号：US11316551
申请日：2005-12-21
申请人： Michael Chabinyc , Rene Lujan , Ana Arias , Jackson Ho
发明人： Michael Chabinyc , Rene Lujan , Ana Arias , Jackson Ho
IPC分类号： H01L29/08
CPC分类号： H01L27/283 , H01L51/0037 , H01L51/0541 , H01L51/0545 , H01L51/105
摘要： A backplane circuit includes an array of organic thin-film transistors (OTFTs), each OTFT including a source contact, a drain contact, and an organic semiconductor region extending between the source and drain contacts. The drain contacts in each row are connected to an address line. The source and drain contacts and the address lines are fabricated using a multi-layer structure including a relatively thick base portion formed of a relatively inexpensive metal (e.g., aluminum or copper), and a relatively thin contact layer formed of a high work function, low oxidation metal (e.g., gold) that exhibits good electrical contact to the organic semiconductor, is formed opposite at least one external surface of the base, and is located at least partially in an interface region where the organic semiconductor contacts an underlying dielectric layer.
摘要翻译：背板电路包括有机薄膜晶体管（OTFT）的阵列，每个OTFT包括源极接触，漏极接触以及在源极和漏极接触之间延伸的有机半导体区域。每行的漏极触点连接到地址线。源极和漏极触点和地址线使用包括由相对便宜的金属（例如，铝或铜）形成的相对厚的基部的多层结构以及由高功函数形成的相对较薄的接触层制造，与有机半导体呈现良好的电接触的低氧化金属（例如，金）形成在与基底的至少一个外表面相对的位置，并且至少部分地位于有机半导体与下面的介电层接触的界面区域中。

8. 发明申请

US20050269570A1 Method of fabrication of printed transistors 有权
标题翻译：印刷晶体管的制造方法
公开(公告)号：US20050269570A1
公开(公告)日：2005-12-08
申请号：US10864570
申请日：2004-06-08
申请人： Michael Chabinyc , Ana Arias
发明人： Michael Chabinyc , Ana Arias
IPC分类号： H01L51/05 , H01L21/208 , H01L21/336 , H01L21/77 , H01L21/84 , H01L29/786 , H01L31/20 , H01L51/00
CPC分类号： H01L51/0004 , B82Y10/00 , B82Y30/00 , H01L27/1285 , H01L27/1292 , H01L27/283 , H01L29/66742 , H01L51/0012 , H01L51/0541 , H01L51/0545
摘要： A transistor is formed by applying modifier coatings to source and drain contacts and/or to the channel region between those contacts. The modifier coatings are selected to adjust the surface energy pattern in the source/drain/channel region such that semiconductor printing fluid is not drawn away from the channel region. For example, the modifier coatings for the contacts can be selected to have substantially the same surface energy as the modifier coating for the channel region. Semiconductor printing fluid deposited on the channel region therefore settles in place (due to the lack of a surface energy differential) and forms a relatively thick active semiconductor region between the contacts. Alternatively, the modifier coatings can be selected to have lower surface energies than the modifier coating in the channel region, which actually causes semiconductor printing fluid to be drawn towards the channel region.
摘要翻译：通过将改性剂涂层施加到源极和漏极触点和/或向这些触点之间的沟道区域施加晶体管。选择改性剂涂层以调节源极/漏极/沟道区域中的表面能量图案，使得半导体印刷液体不被从通道区域拉出。例如，可以选择用于触点的改性剂涂层以具有与用于沟道区的改性涂层基本上相同的表面能。沉积在通道区域上的半导体印刷液体因此沉降就位（由于缺少表面能量差）并且在触点之间形成相对厚的有源半导体区域。或者，可以选择改性剂涂层以具有比通道区域中的改性剂涂层更低的表面能，其实际上导致半导体印刷液体被拉向通道区域。

9. 发明授权

US07749916B2 Additive printed mask process and structures produced thereby 有权
标题翻译：添加印刷掩模工艺和由此生产的结构
公开(公告)号：US07749916B2
公开(公告)日：2010-07-06
申请号：US12046242
申请日：2008-03-11
申请人： William Wong , Scott Limb , Michael Chabinyc , Beverly Russo , Rene Lujan
发明人： William Wong , Scott Limb , Michael Chabinyc , Beverly Russo , Rene Lujan
IPC分类号： H01L21/31
CPC分类号： G02F1/133512 , B41M3/003 , B41M3/006 , G02F1/133516 , G03F7/2018 , Y10S438/942
摘要： A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.
摘要翻译：数字光刻工艺首先沉积由印刷图案掩模特征组成的掩模层。印刷图案掩模特征限定了可以沉积目标材料的间隙，优选通过数字光刻工艺。如果需要，目标材料被固化或硬化成目标特征。然后选择性地去除掩模层。剩余的目标特征然后可以用作曝光或蚀刻掩模，诸如流体容纳元件的物理结构等。可以在实现数字光刻的优点的同时获得精细特征宽度，更小的打印图案化掩模特征的最小宽度制造过程。

10. 发明申请

US20070172969A1 Additive printed mask process and structures produced thereby 有权
标题翻译：添加印刷掩模工艺和由此生产的结构
公开(公告)号：US20070172969A1
公开(公告)日：2007-07-26
申请号：US10536102
申请日：2006-01-20
申请人： William Wong , Scott Limb , Michael Chabinyc , Beverly Russo , Rene Lujan
发明人： William Wong , Scott Limb , Michael Chabinyc , Beverly Russo , Rene Lujan
IPC分类号： H01L21/00
CPC分类号： G02F1/133512 , B41M3/003 , B41M3/006 , G02F1/133516 , G03F7/2018 , Y10S438/942
摘要： A digital lithographic process first deposits a mask layer comprised of print patterned mask features. The print patterned mask features define gaps into which a target material may be deposited, preferably through a digital lithographic process. The target material is cured or hardened, if necessary, into target features. The mask layer is then selectively removed. The remaining target features may then be used as exposure or etch masks, physical structures such as fluid containment elements, etc. Fine feature widths, narrower the minimum width of the print patterned mask features, may be obtained while realizing the benefits of digital lithography in the manufacturing process.
摘要翻译：数字光刻工艺首先沉积由印刷图案掩模特征组成的掩模层。印刷图案掩模特征限定了可以沉积目标材料的间隙，优选通过数字光刻工艺。如果需要，目标材料被固化或硬化成目标特征。然后选择性地去除掩模层。剩余的目标特征可以用作曝光或蚀刻掩模，诸如流体容纳元件的物理结构等。可以在实现数字光刻的优点的同时获得精细特征宽度，打印图案化掩模特征的最小宽度更窄制造过程。

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