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1. 发明授权

US08781641B2 Method and apparatus for external processor thermal control 有权
标题翻译：外部处理器热控制的方法和装置
公开(公告)号：US08781641B2
公开(公告)日：2014-07-15
申请号：US12980648
申请日：2010-12-29
申请人： Eric C. Samson , John William Horigan , Robert T. Jackson , Ticky Thakkar
发明人： Eric C. Samson , John William Horigan , Robert T. Jackson , Ticky Thakkar
IPC分类号： G05D23/00
CPC分类号： G06F1/206
摘要： A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component would then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy.
摘要翻译：公开了一种用于节流计算机系统的从属组件以在接收到第一信号时降低计算系统的总体温度的系统和方法。第一信号可以来自主组件，指示主组件的温度已经超过其阈值温度。从组件可以发送第二信号以指示从组件的温度已超过其温度。然后，主组件将启动主组件的节流以降低计算系统的整体温度。主部件可以被节流到比从属部件小的程度。可以将第一组件指定为主组件，并且可以基于选择策略将第二组件指定为从组件。

2. 发明申请

US20110090640A1 METHOD AND APPARATUS FOR EXTERNAL PROCESSOR THERMAL CONTROL 有权
标题翻译：外部处理器热控制的方法和装置
公开(公告)号：US20110090640A1
公开(公告)日：2011-04-21
申请号：US12980648
申请日：2010-12-29
申请人： Eric C. Samson , John William Horigan , Robert T. Jackson , Shreekant Thakkar
发明人： Eric C. Samson , John William Horigan , Robert T. Jackson , Shreekant Thakkar
IPC分类号： G06F1/20
CPC分类号： G06F1/206
摘要： A system and method for throttling a slave component of a computer system to reduce an overall temperature of the computing system upon receiving a first signal is disclosed. The first signal may be from a master component indicating that a temperature for the master component has exceeded its threshold temperature. The slave component or the master component may be a central processing unit, a graphics memory and controller hub, or a central processing unit memory controller hub. The slave component may send a second signal to indicate that a temperature for the slave component has exceeded its temperature. The master component would then initiate throttling of the master component to reduce the overall temperature of the computing system. The master component may be throttled to a degree less than the slave component. A first component may be designated the master component and the second component may be designated the slave component based on a selection policy. The selection policy may be received from a user through a graphical user interface. The selection policy may be based on an action being performed by the computing system.
摘要翻译：公开了一种用于节流计算机系统的从属组件以在接收到第一信号时降低计算系统的总体温度的系统和方法。第一信号可以来自主组件，指示主组件的温度已经超过其阈值温度。从属组件或主组件可以是中央处理单元，图形存储器和控制器集线器，或中央处理单元存储器控制器集线器。从组件可以发送第二信号以指示从组件的温度已超过其温度。然后，主组件将启动主组件的节流以降低计算系统的整体温度。主部件可以被节流到比从属部件小的程度。可以将第一组件指定为主组件，并且可以基于选择策略将第二组件指定为从组件。可以通过图形用户界面从用户接收选择策略。选择策略可以基于由计算系统执行的动作。

3. 发明授权

US09400545B2 Method, apparatus, and system for energy efficiency and energy conservation including autonomous hardware-based deep power down in devices 有权
标题翻译：节能和节能的方法，装置和系统，包括设备中自主的基于硬件的深度断电
公开(公告)号：US09400545B2
公开(公告)日：2016-07-26
申请号：US13335738
申请日：2011-12-22
申请人： Inder M. Sodhi , Alon Naveh , Doron Rajwan , Ryan D. Wells , Eric C. Samson
发明人： Inder M. Sodhi , Alon Naveh , Doron Rajwan , Ryan D. Wells , Eric C. Samson
IPC分类号： G06F1/32
CPC分类号： G06F3/0625 , G06F1/3206 , G06F1/3278 , G06F1/3287 , G06F3/0634 , G06F3/0673 , Y02D10/157 , Y02D10/171
摘要： Embodiments of systems, apparatuses, and methods for energy efficiency and energy conservation including enabling autonomous hardware-based deep power down of devices are described. In one embodiment, a system includes a device, a static memory, and a power control unit coupled with the device and the static memory. The system further includes a deep power down logic of the power control unit to monitor a status of the device, and to transfer the device to a deep power down state when the device is idle. In the system, the device consumes less power when in the deep power down state than in the idle state.
摘要翻译：描述了能量效率和能量节约的系统，装置和方法的实施例，包括实现设备的自主的基于硬件的深度断电。在一个实施例中，系统包括与设备和静态存储器耦合的设备，静态存储器和功率控制单元。该系统还包括功率控制单元的深度掉电逻辑，用于监视设备的状态，并且当设备空闲时将设备传送到深度断电状态。在系统中，当处于深功率关闭状态时，器件消耗的功率小于空闲状态。

4. 发明授权

US09383813B2 Dynamic control of reduced voltage state of graphics controller component of memory controller 有权
公开(公告)号：US09383813B2
公开(公告)日：2016-07-05
申请号：US14937296
申请日：2015-11-10
申请人： Eric C. Samson , Aditya Navale
发明人： Eric C. Samson , Aditya Navale
IPC分类号： G06F1/32
CPC分类号： G06F1/3296 , G06F1/3218 , G06F1/3237 , G06F1/324 , Y02D10/126 , Y02D10/128 , Y02D10/172 , Y02D50/20
摘要： A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.

5. 发明申请

US20150012768A1 DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER 审中-公开
标题翻译：记忆控制器图形控制器组件的降低电压状态的动态控制
公开(公告)号：US20150012768A1
公开(公告)日：2015-01-08
申请号：US14497736
申请日：2014-09-26
申请人： Eric C. Samson , Aditya Navale
发明人： Eric C. Samson , Aditya Navale
IPC分类号： G06F1/32
CPC分类号： G06F1/3296 , G06F1/3218 , G06F1/3237 , G06F1/324 , Y02D10/126 , Y02D10/128 , Y02D10/172 , Y02D50/20
摘要： A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
摘要翻译：一种方法包括检测触发条件，并且响应于检测到触发条件，降低施加到存储器控制器的图形控制器组件的电压。电压的降低可能导致电压降低到维持图形控制器组件内的上下文信息所需的电压水平。

6. 发明申请

US20140032954A1 DYNAMIC CONTROL OF REDUCED VOLTAGE STATE OF GRAPHICS CONTROLLER COMPONENT OF MEMORY CONTROLLER 有权
标题翻译：记忆控制器图形控制器组件的降低电压状态的动态控制
公开(公告)号：US20140032954A1
公开(公告)日：2014-01-30
申请号：US13939707
申请日：2013-07-11
申请人： Eric C. Samson , Aditya Navale
发明人： Eric C. Samson , Aditya Navale
IPC分类号： G06F1/32
CPC分类号： G06F1/3296 , G06F1/3218 , G06F1/3237 , G06F1/324 , Y02D10/126 , Y02D10/128 , Y02D10/172 , Y02D50/20
摘要： A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
摘要翻译：一种方法包括检测触发条件，并且响应于检测到触发条件，降低施加到存储器控制器的图形控制器组件的电压。电压的降低可能导致电压降低到维持图形控制器组件内的上下文信息所需的电压水平。

7. 发明申请

US20120331321A1 Processor Core with Higher Performance Burst Operation with Lower Power Dissipation Sustained Workload Mode 有权
标题翻译：处理器核心，具有更高性能突发操作，功耗更低，持续工作负载模式
公开(公告)号：US20120331321A1
公开(公告)日：2012-12-27
申请号：US13169182
申请日：2011-06-27
申请人： Nikos Kaburlasos , Eric C. Samson , David Puffer , Lakshminarayan Jagannathan
发明人： Nikos Kaburlasos , Eric C. Samson , David Puffer , Lakshminarayan Jagannathan
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/3228 , G06F1/3287 , G06F1/3296 , G09G5/363 , G09G2330/021 , G09G2360/08 , Y02D10/126 , Y02D10/171 , Y02D10/172
摘要： A processor may operate at a first frequency level for a first time interval. The processor automatically may transition to a sleep state from the first frequency level after the first time interval. Then the processor automatically transitions from the sleep state to the first frequency level after a second time interval. As a result the processor may operate at a reduced power consumption and higher performance.
摘要翻译：处理器可以在第一时间间隔的第一频率级别操作。处理器自动地可以在第一时间间隔之后从第一频率电平转换到睡眠状态。然后处理器在第二时间间隔后自动从休眠状态转换到第一频率级。因此，处理器可以以降低的功率消耗和更高的性能来操作。

8. 发明申请

US20120192200A1 Load Balancing in Heterogeneous Computing Environments 审中-公开
标题翻译：负载平衡在异构计算环境中
公开(公告)号：US20120192200A1
公开(公告)日：2012-07-26
申请号：US13094449
申请日：2011-04-26
申请人： Jayanth N. Rao , Eric C. Samson
发明人： Jayanth N. Rao , Eric C. Samson
IPC分类号： G06F9/46
CPC分类号： G06F9/4893 , G06F2209/483 , Y02D10/24
摘要： Load balancing may be achieved in heterogeneous computing environments by first evaluating the operating environment and workload within that environment. Then, if energy usage is a constraint, energy usage per task for each device may be evaluated for the identified workload and operating environments. Work is scheduled on the device that maximizes the performance metric of the heterogeneous computing environment.
摘要翻译：通过首先评估该环境中的操作环境和工作负载，可以在异构计算环境中实现负载平衡。然后，如果能量使用是一个约束，则可以针对所识别的工作负载和操作环境来评估每个设备的每个任务的能量使用。在设备上安排工作，最大限度地提高异构计算环境的性能指标。

9. 发明申请

US20120169746A1 METHOD, APPARATUS, AND SYSTEM FOR ENERGY EFFICIENCY AND ENERGY CONSERVATION INCLUDING NON FRAME AWARE FREQUENCY SELECTION 有权
标题翻译：方法，装置和能源节能系统，包括非框架频率选择
公开(公告)号：US20120169746A1
公开(公告)日：2012-07-05
申请号：US13340129
申请日：2011-12-29
申请人： Eric C. Samson
发明人： Eric C. Samson
IPC分类号： G06F13/14
CPC分类号： G09G5/18 , G06F1/324 , G09G5/363 , G09G2310/08 , G09G2330/021 , G09G2360/02 , G09G2360/12
摘要： Systems and methods of adjusting a frequency of a graphics controller may include a logic to determine a metric associated with an input/output (I/O) queue. The metric may be used to determine whether an I/O limited condition exists. The I/O limited condition may be associated with a graphics controller. There may be a logic to cause a frequency of the graphics controller to be decreased when the I/O limited condition exists, and a logic to cause the frequency of the graphics controller to be increased when the I/O limited condition does not exist. The I/O limited condition may exist when a magnitude of the metric is equal to or greater than a first threshold. The I/O limited condition may not exist when the magnitude of the metric is equal to or less than a second threshold.
摘要翻译：调整图形控制器的频率的系统和方法可以包括确定与输入/输出（I / O）队列相关联的度量的逻辑。该度量可以用于确定是否存在I / O限制条件。 I / O限制条件可能与图形控制器相关联。当存在I / O限制条件时，可能存在导致图形控制器的频率降低的逻辑，并且当I / O限制条件不存在时，导致图形控制器的频率增加的逻辑。当度量的大小等于或大于第一阈值时，可能存在I / O限制条件。当度量的大小等于或小于第二阈值时，I / O限制条件可能不存在。

10. 发明授权

US08037334B2 Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idleness 有权
标题翻译：动态功率控制，用于根据其空闲程度降低内存控制器图形控制器组件的电压电平
公开(公告)号：US08037334B2
公开(公告)日：2011-10-11
申请号：US12537523
申请日：2009-08-07
申请人： Eric C. Samson , Aditya Navale
发明人： Eric C. Samson , Aditya Navale
IPC分类号： G06F1/32
CPC分类号： G06F1/3296 , G06F1/3218 , G06F1/3237 , G06F1/324 , Y02D10/126 , Y02D10/128 , Y02D10/172 , Y02D50/20
摘要： A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
摘要翻译：一种方法包括检测触发条件，并且响应于检测到触发条件，降低施加到存储器控制器的图形控制器组件的电压。电压的降低可能导致电压降低到维持图形控制器组件内的上下文信息所需的电压水平。

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