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    • 2. 发明授权
    • Transmitter and receiver using pseudo-orthogonal code
    • 发射机和接收机使用伪正交码
    • US08050355B2
    • 2011-11-01
    • US12136800
    • 2008-06-11
    • Jin Woong ChoYong Seong KimDo Hun KimSun Hee KimDae Ki Hong
    • Jin Woong ChoYong Seong KimDo Hun KimSun Hee KimDae Ki Hong
    • H04L27/36
    • H04J13/00H04J13/004
    • A transmitter using pseudo-orthogonal code includes a serial-to-parallel converter for converting serial transmission data into 9-bit parallel data, and a pseudo-orthogonal code memory for receiving the parallel data from the serial-to-parallel converter and outputting 16-bit pseudo-orthogonal code by using the received data as addresses. The pseudo-orthogonal code memory has the relationship of the input address and output code, as expressed in the following equation: c(i)=0.5×((−1)b2⊕(i1b1)⊕(i0b0) (−1)b5⊕i2⊕(i1b4)⊕(i0b3) (−1)b8⊕i3⊕(i1b7)⊕(i0b6) (−1)( b2⊕b5⊕b8)⊕i3⊕i2⊕(i1(b1⊕b4⊕b7))⊕(i0(b0⊕b3⊕b6))) where C(i) is a pseudo-orthogonal code value, i is each bit of the pseudo-orthogonal code, 0≦i≦15, and b0-b8 are a transmission data bit stream input in the memory as addresses. Accordingly, the transmission efficiency of the transmitter/receiver using orthogonal code can be remarkably improved.
    • 使用伪正交码的发射机包括用于将串行传输数据转换为9位并行数据的串并转换器,以及用于从串并转换器接收并行数据的伪正交码存储器,并输出16 通过使用接收到的数据作为地址来进行比特伪正交码。 伪正交码存储器具有输入地址和输出码的关系,如下式所示:c(i)= 0.5×(( - 1)b2⊕(i1b1)⊕(i0b0)(-1)b5 ⊕i2⊕(i1b4)⊕(i0b3)(-1)b8⊕i3⊕(i1b7)⊕(i0b6)(-1)(b2⊕b5⊕b8)⊕i3⊕i2⊕(i1(b1⊕b4⊕b7) )⊕(i0(b0⊕b3⊕b6)))其中C(i)是伪正交码值,i是伪正交码的每个位,0≦̸ i≦̸ 15和b0-b8是传输 数据位流作为地址输入到存储器中。 因此,可以显着提高使用正交码的发射机/接收机的传输效率。