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    • 5. 发明授权
    • Apparatus for constant amplitude coded bi-orthogonal demodulation
    • 用于恒幅编码双正交解调的装置
    • US07280468B2
    • 2007-10-09
    • US10649647
    • 2003-08-28
    • Sung-Jin KangJin-Woong ChoCheol-Hee ParkMin-Chul JuDae-Ki HongKyeung-Hak SeoMyoung-Jin Kim
    • Sung-Jin KangJin-Woong ChoCheol-Hee ParkMin-Chul JuDae-Ki HongKyeung-Hak SeoMyoung-Jin Kim
    • H04J11/00
    • H04J13/004H04J13/0077H04L1/0041H04L1/0061
    • A constant amplitude coded bi-orthogonal demodulator demodulates the received constant amplitude bi-orthogonal modulated data, cancels the parity bits to generate the serial data, detects the occurrence of an error by dividing the demodulated data into a plurality of groups of data, outputs the serial data as demodulated data if an error does not occur, sequentially converts bit polarities of data of groups in which an error occurs if the error detector detects the error, compares distances between the received bi-orthogonal modulated data and the constant amplitude coded bi-orthogonal modulated data, and selects, as demodulated data, data of which corresponding bit polarities are changed according to the comparison results.According to the present invention, power consumption is reduced, a power amplifier can be manufactured at an inexpensive cost, interference robustness can be ensured, and data can be transmitted at a high transmission rate and a variable transmission rate.
    • 一个恒定幅度编码的双正交解调器对接收到的恒幅双正交调制数据进行解调,取消奇偶校验位以产生串行数据,通过将解调数据分成多组数据来检测出错, 作为解调数据的串行数据如果不发生错误,则顺序地转换误差检测器检测到错误时发生错误的组的数据的位极性,比较接收到的双正交调制数据与恒幅编码的双向正交调制数据之间的距离, 正交调制数据,并根据比较结果选择相应位极性改变的数据作为解调数据。 根据本发明,能够降低能耗,能够以廉价的成本制造功率放大器,能够确保干扰稳定性,能够以高传输速度和可变传输速率传输数据。
    • 8. 发明授权
    • Zipper type VDSL system
    • 拉链式VDSL系统
    • US06862261B2
    • 2005-03-01
    • US09728141
    • 2000-12-01
    • Jong-Ho PaikYoung-Hwan YouJin-Woong ChoWon-Young YangYong-Soo Cho
    • Jong-Ho PaikYoung-Hwan YouJin-Woong ChoWon-Young YangYong-Soo Cho
    • H04L12/00H04L5/02H04L5/14H04S11/00
    • H04L5/143H04L5/023
    • Disclosed is a zipper type Very high bit-rate Digital Subscriber Line (VDSL) system which comprises a transmitter including an inverse fast Fourier transformer for performing an inverse fast Fourier transform on input data, and a cyclic extension adder for adding a cyclic extension for each symbol to the data output from the inverse fast Fourier transformer and outputting the data to a transmission channel; and a receiver including a cyclic extension remover for removing the cyclic extension from the data received through the transmission channel, and a fast Fourier transformer for performing a fast Fourier transform on the data output from the cyclic extension remover. The cyclic extension adder copies a first predetermined number of data starting from the leading part of the input symbol data received from the inverse fast Fourier transformer into a first cyclic suffix for removing interference between symbols and maintaining orthogonality between sub-carriers; adds the first cyclic suffix to the end of the symbol data; copies a second predetermined number of data subsequent to the first predetermined number of data into a second cyclic suffix for maintaining orthogonality between upstream and downstream; and adds the second cyclic suffix to the end of the first cyclic suffix.
    • 公开了一种拉链式非常高比特率数字用户线(VDSL)系统,其包括:发射机,包括用于对输入数据进行快速傅里叶逆变换的快速傅立叶逆变换器;以及循环扩展加法器,用于为每个 符号表示为从快速傅里叶逆变换器输出的数据,并将数据输出到传输通道; 以及接收机,包括用于从通过传输信道接收的数据中去除循环扩展的循环扩展删除器,以及用于对从循环扩展删除器输出的数据执行快速傅里叶变换的快速傅里叶变换器。 循环扩展加法器将从快速傅立叶逆变换逆变换器接收的输入符号数据的前导部分开始的第一预定数量的数据复制到第一循环后缀中,以消除符号之间的干扰并维持子载波之间的正交性; 将第一个循环后缀添加到符号数据的末尾; 将第一预定数量的数据之后的第二预定数量的数据复制到用于维持上游和下游之间的正交性的第二循环后缀中; 并将第二循环后缀添加到第一个循环后缀的末尾。
    • 9. 发明授权
    • Apparatus for compensating a channel distortion in a bluetooth system
    • 用于补偿蓝牙系统中的信道失真的装置
    • US06751273B1
    • 2004-06-15
    • US09643086
    • 2000-08-21
    • Cheol-Hee ParkJong Ho PaikYoung Hwan YouMin-Chul JuJin-Woong Cho
    • Cheol-Hee ParkJong Ho PaikYoung Hwan YouMin-Chul JuJin-Woong Cho
    • H04B110
    • H04B1/715H04B1/62H04L25/0224
    • An apparatus for compensating a channel distortion in a Bluetooth system to process a received signal having access codes comprises a multiplier for multiplying the received signal by a previously obtained channel distortion compensation signal to thereby provide a multiplied signal; a demodulator for demodulating access codes of the multiplied signal to thereby output demodulated received access codes as a demodulated signal; a correlation detection circuit for detecting correlation values between the demodulated received access codes and the access codes of the received signal previously stored therein to detect a start point of the received signal, thereby providing detected access codes having corresponding correlation values greater than a predetermined threshold and providing an enable signal if there are one or more correlation values greater than the predetermined threshold; and a channel distortion compensation circuit for performing a channel distortion compensation based on the detected access codes and a reference signal obtained by re-modulating the access codes of the received signal in response to the enable signal to thereby provide a channel distortion compensation signal.
    • 用于补偿蓝牙系统中的信道失真以处理具有接入码的接收信号的装置包括乘法器,用于将接收信号乘以先前获得的信道失真补偿信号,从而提供相乘的信号; 解调器,用于解调相乘信号的存取码,从而输出解调的接收的接入码作为解调信号; 相关检测电路,用于检测解调的接收接入码与先前存储在其中的接收信号的接入码之间的相关值,以检测接收信号的起始点,从而提供具有大于预定阈值的相应相关值的检测到的接入码, 如果存在大于所述预定阈值的一个或多个相关值,则提供使能信号; 以及信道失真补偿电路,用于根据检测到的接入码和通过响应于使能信号重新调制接收信号的接入码而获得的参考信号来执行信道失真补偿,从而提供信道失真补偿信号。
    • 10. 发明授权
    • Transmitter and receiver using pseudo-orthogonal code
    • 发射机和接收机使用伪正交码
    • US08050355B2
    • 2011-11-01
    • US12136800
    • 2008-06-11
    • Jin Woong ChoYong Seong KimDo Hun KimSun Hee KimDae Ki Hong
    • Jin Woong ChoYong Seong KimDo Hun KimSun Hee KimDae Ki Hong
    • H04L27/36
    • H04J13/00H04J13/004
    • A transmitter using pseudo-orthogonal code includes a serial-to-parallel converter for converting serial transmission data into 9-bit parallel data, and a pseudo-orthogonal code memory for receiving the parallel data from the serial-to-parallel converter and outputting 16-bit pseudo-orthogonal code by using the received data as addresses. The pseudo-orthogonal code memory has the relationship of the input address and output code, as expressed in the following equation: c(i)=0.5×((−1)b2⊕(i1b1)⊕(i0b0) (−1)b5⊕i2⊕(i1b4)⊕(i0b3) (−1)b8⊕i3⊕(i1b7)⊕(i0b6) (−1)( b2⊕b5⊕b8)⊕i3⊕i2⊕(i1(b1⊕b4⊕b7))⊕(i0(b0⊕b3⊕b6))) where C(i) is a pseudo-orthogonal code value, i is each bit of the pseudo-orthogonal code, 0≦i≦15, and b0-b8 are a transmission data bit stream input in the memory as addresses. Accordingly, the transmission efficiency of the transmitter/receiver using orthogonal code can be remarkably improved.
    • 使用伪正交码的发射机包括用于将串行传输数据转换为9位并行数据的串并转换器,以及用于从串并转换器接收并行数据的伪正交码存储器,并输出16 通过使用接收到的数据作为地址来进行比特伪正交码。 伪正交码存储器具有输入地址和输出码的关系,如下式所示:c(i)= 0.5×(( - 1)b2⊕(i1b1)⊕(i0b0)(-1)b5 ⊕i2⊕(i1b4)⊕(i0b3)(-1)b8⊕i3⊕(i1b7)⊕(i0b6)(-1)(b2⊕b5⊕b8)⊕i3⊕i2⊕(i1(b1⊕b4⊕b7) )⊕(i0(b0⊕b3⊕b6)))其中C(i)是伪正交码值,i是伪正交码的每个位,0≦̸ i≦̸ 15和b0-b8是传输 数据位流作为地址输入到存储器中。 因此,可以显着提高使用正交码的发射机/接收机的传输效率。