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    • 1. 发明授权
    • Dynamic device address assignment mechanism for a data processing system
    • 用于数据处理系统的动态设备地址分配机制
    • US4373181A
    • 1983-02-08
    • US173586
    • 1980-07-30
    • Douglas R. ChisholmHobart L. Kurtz, Jr.
    • Douglas R. ChisholmHobart L. Kurtz, Jr.
    • G06F13/14G06F12/02G06F12/06G06F9/30
    • G06F12/0661
    • A peripheral device address assignment mechanism is described which does not require the use of plugboards or jumpers. This mechanism enables a host processor to select any desired peripheral device and set its device address to any desired value at any desired time. This is accomplished by providing each peripheral device control unit with a loadable device address register for holding the device address assigned to its peripheral device. Each device control unit is further provided with circuitry responsive to the appearance of a unique I/O command on the processor I/O bus and to the activation of a unique set of the I/O bus data lines by the processor for loading into its device address register the desired device address value as supplied thereto by the processor via the I/O bus.
    • 描述了外围设备地址分配机制,其不需要使用插板或跳线。 该机制使得主机处理器能够在任何期望的时间选择任何所需的外围设备并将其设备地址设置为任何所需的值。 这通过为每个外围设备控制单元提供一个可装载的设备地址寄存器来实现,用于保持分配给其外围设备的设备地址。 每个设备控制单元还提供有响应于在处理器I / O总线上出现唯一I / O命令的电路以及由处理器激活一组唯一I / O总线数据线,以将其加载到其中 设备地址通过I / O总线注册处理器提供的所需设备地址值。