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1. 发明申请

US20120135577A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20120135577A1
公开(公告)日：2012-05-31
申请号：US13304936
申请日：2011-11-28
申请人： Doo-Young LEE , Ki Il Kim , Myeong-Cheol Kim , Do-Hyoung Kim , Do-Hsing Lee
发明人： Doo-Young LEE , Ki Il Kim , Myeong-Cheol Kim , Do-Hyoung Kim , Do-Hsing Lee
IPC分类号： H01L21/336 , H01L21/28
CPC分类号： H01L29/78 , H01L21/76829 , H01L21/76832 , H01L21/76895 , H01L21/76897 , H01L29/66545
摘要： A method of manufacturing a semiconductor device, including the second sacrificial layer receiving a gate structure include a metal and a spacer on a sidewall of the gate structure therethrough being formed on a substrate. The second sacrificial layer is removed. A second etch stop layer and an insulating interlayer are sequentially formed on the gate structure, the spacer and the substrate. An opening passing through the insulating interlayer is formed to expose a portion of the gate structure, a portion of the spacer and a portion of the second etch stop layer on a portion of the substrate. The second etch stop layer being exposed through the opening is removed. The contact being electrically connected to the gate structure and the substrate and filling the opening is formed. The semiconductor device having the metal gate electrode and the shared contact has a desired leakage current characteristic and resistivity characteristics.
摘要翻译：包括接收栅极结构的第二牺牲层的半导体器件的制造方法包括在基板上形成的栅极结构的侧壁上的金属和间隔物。去除第二牺牲层。在栅极结构，间隔物和衬底上依次形成第二蚀刻停止层和绝缘中间层。形成通过绝缘中间层的开口以暴露栅极结构的一部分，间隔物的一部分和第二蚀刻停止层的一部分在衬底的一部分上。去除通过开口露出的第二蚀刻停止层。形成与栅极结构和基板电连接并填充开口的触点。具有金属栅电极和共用触点的半导体器件具有期望的漏电流特性和电阻率特性。

2. 发明申请

US20160111506A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20160111506A1
公开(公告)日：2016-04-21
申请号：US14744722
申请日：2015-06-19
申请人： Doo-Young LEE , Sang-Hyun LEE , Myung-Hoon JUNG , Do-Hyoung KIM
发明人： Doo-Young LEE , Sang-Hyun LEE , Myung-Hoon JUNG , Do-Hyoung KIM
IPC分类号： H01L29/417 , H01L27/088 , H01L29/45
CPC分类号： H01L27/088 , H01L21/28114 , H01L21/76804 , H01L21/76805 , H01L21/76831 , H01L21/76843 , H01L21/76897 , H01L21/823425 , H01L21/823475 , H01L23/485 , H01L27/0207 , H01L27/0886 , H01L27/1104 , H01L29/41758 , H01L29/41775 , H01L29/45 , H01L29/78
摘要： A semiconductor device includes a first gate pattern and a second gate pattern on a substrate, the first gate pattern having a first height and the second gate pattern having a second height, an insulating pattern on the substrate covering the first and second gate patterns, the insulating pattern including a trench exposing the substrate between the first and second gate patterns, a spacer contacting at least a portion of a sidewall of the insulating pattern within the trench, the spacer spaced apart from the first and second gate patterns and having a third height larger than the first and second heights, and a contact structure filling the trench.
摘要翻译：半导体器件包括在衬底上的第一栅极图案和第二栅极图案，第一栅极图案具有第一高度，第二栅极图案具有第二高度，衬底上的绝缘图案覆盖第一和第二栅极图案，绝缘图案，包括在第一和第二栅极图案之间暴露衬底的沟槽，间隔物接触沟槽内的绝缘图案的侧壁的至少一部分，间隔物与第一和第二栅极图案间隔开并具有第三高度大于第一和第二高度，以及填充沟槽的接触结构。

3. 发明申请

US20160308016A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20160308016A1
公开(公告)日：2016-10-20
申请号：US15059519
申请日：2016-03-03
申请人： Hyoseok CHOI , Hwichan JUN , Yoonhae KIM , Chulsung KIM , Heungsik PARK , Doo-Young LEE
发明人： Hyoseok CHOI , Hwichan JUN , Yoonhae KIM , Chulsung KIM , Heungsik PARK , Doo-Young LEE
IPC分类号： H01L29/45 , H01L29/78 , H01L29/06
CPC分类号： H01L29/41791 , H01L29/66545 , H01L29/66795 , H01L29/7845 , H01L29/7848 , H01L29/785
摘要： Provided is a semiconductor device including a substrate with an active pattern, a gate electrode crossing the active pattern, a source/drain region in an upper portion of the active pattern at a side of the gate electrode, the source/drain region including a recess region at an upper region thereof, a contact electrically connected to the source/drain region, the contact including a lower portion provided in the recess region, and a metal silicide layer provided at a lower region of the recess region and between the source/drain region and the contact.
摘要翻译：提供了一种半导体器件，其包括具有有源图案的衬底，与有源图案交叉的栅电极，在栅电极侧的有源图案的上部中的源极/漏极区域，源极/漏极区域包括凹部区域，其电连接到源极/漏极区域，触点包括设置在凹部区域中的下部，以及金属硅化物层，设置在凹部区域的下部区域和源极/漏极之间地区和联系人。

4. 发明申请

US20080061352A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080061352A1
公开(公告)日：2008-03-13
申请号：US11935160
申请日：2007-11-05
申请人： Doo-Young LEE , Yoo-Chul KONG , Jong-Chul PARK , Sang-Sup JEONG
发明人： Doo-Young LEE , Yoo-Chul KONG , Jong-Chul PARK , Sang-Sup JEONG
IPC分类号： H01L29/788
CPC分类号： H01L28/91 , H01L21/76838 , H01L27/10814 , H01L27/10855 , H01L27/10885
摘要： A semiconductor device includes a word line structure that extends in a first direction on an active region defined on a substrate. First and second contact pads are formed on the active region at both sides of the word line structure. Bit line structures are electrically connected to the first contact pad and extend in a second direction substantially perpendicular to the first direction. An insulation layer structure is formed on the substrate having the bit line structures. A storage node contact plug is electrically connected to the second contact pad through the insulation layer structure. A storage node electrode, which may be part of a capacitor, is formed on the storage node contact plug. The storage node contact plug has a lower portion and an upper portion having a width wider than that of the lower portion, with vertical sides perpendicular to the first and second directions.
摘要翻译：半导体器件包括在限定在衬底上的有源区上沿第一方向延伸的字线结构。第一和第二接触垫形成在字线结构两侧的有源区上。位线结构电连接到第一接触焊盘并沿基本垂直于第一方向的第二方向延伸。在具有位线结构的基板上形成绝缘层结构。存储节点接触插头通过绝缘层结构电连接到第二接触垫。作为电容器的一部分的存储节点电极形成在存储节点接触插头上。存储节点接触插头具有下部和具有比下部的宽度宽的上部，其垂直方向垂直于第一和第二方向。

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