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    • 3. 发明授权
    • Analog semiconductor device and method of fabricating the same
    • 模拟半导体器件及其制造方法
    • US06215142B1
    • 2001-04-10
    • US09217342
    • 1998-12-21
    • Jae Dong LeeMyung Hwan Cha
    • Jae Dong LeeMyung Hwan Cha
    • H01L2972
    • H01L27/0629
    • An analog semiconductor device capable of preventing open of interconnection lines and notching due to step between transistor and capacitor regions is disclosed. An analog semiconductor device according to the present invention, includes a semiconductor substrate; a first, a second, and a third isolating layer of trench type formed on the substrate and defining a transistor region and a capacitor region, respectively; a lower electrode of a capacitor formed in the surface of the substrate of the capacitor region; an oxide layer formed under the lower electrode and insulating the lower electrode and the substrate; an gate insulating layer formed on the substrate of the transistor region; an dielectric layer formed on the lower electrode; a gate formed on the gate insulating layer; an upper electrode of the capacitor formed on the dielectric layer.
    • 公开了一种能够防止互连线断开和由于晶体管和电容器区域之间的步骤而引起的开槽的模拟半导体器件。根据本发明的模拟半导体器件包括半导体衬底; 分别形成在衬底上并分别限定晶体管区域和电容器区域的第一,第二和第三沟槽隔离层; 形成在电容器区域的基板的表面中的电容器的下电极; 形成在所述下电极下方并使所述下电极和所述基板绝缘的氧化物层; 形成在晶体管区域的基板上的栅极绝缘层; 形成在下电极上的电介质层; 形成在栅极绝缘层上的栅极; 形成在电介质层上的电容器的上电极。