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1. 发明申请

US20110256688A1 SEMICONDUCTOR COMPONENT AND METHODS FOR PRODUCING A SEMICONDUCTOR COMPONENT 有权
公开(公告)号：US20110256688A1
公开(公告)日：2011-10-20
申请号：US13156970
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/76
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

2. 发明授权

US07468307B2 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US07468307B2
公开(公告)日：2008-12-23
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/76
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

3. 发明申请

US20070018195A1 Semiconductor structure and method 有权
标题翻译：半导体结构与方法
公开(公告)号：US20070018195A1
公开(公告)日：2007-01-25
申请号：US11476497
申请日：2006-06-28
申请人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Walter Hartner , Andreas Meiser , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/74
CPC分类号： H01L21/743 , H01L23/535 , H01L29/0653 , H01L29/7809 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.
摘要翻译：半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。可以在隔离沟槽内形成与半导体衬底的接触。

4. 发明授权

US07982284B2 Semiconductor component including an isolation structure and a contact to the substrate 有权
标题翻译：半导体元件包括隔离结构和与衬底的接触
公开(公告)号：US07982284B2
公开(公告)日：2011-07-19
申请号：US11477076
申请日：2006-06-28
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/763 , H01L27/105
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

5. 发明申请

US20080012090A1 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20080012090A1
公开(公告)日：2008-01-17
申请号：US11477076
申请日：2006-06-28
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/00
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

6. 发明授权

US08637378B2 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US08637378B2
公开(公告)日：2014-01-28
申请号：US13156970
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/763 , H01L27/105
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

7. 发明授权

US08476734B2 Semiconductor component and methods for producing a semiconductor component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US08476734B2
公开(公告)日：2013-07-02
申请号：US13156987
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L21/763 , H01L27/105
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

8. 发明申请

US20110233721A1 SEMICONDUCTOR COMPONENT AND METHODS FOR PRODUCING A SEMICONDUCTOR COMPONENT 有权
标题翻译：半导体元件的制造方法和半导体元件的制造方法
公开(公告)号：US20110233721A1
公开(公告)日：2011-09-29
申请号：US13156987
申请日：2011-06-09
申请人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
发明人： Andreas Meiser , Walter Hartner , Hermann Gruber , Dietrich Bonart , Thomas Gross
IPC分类号： H01L29/06
CPC分类号： H01L21/76802 , H01L21/76286 , H01L21/76877 , H01L21/84 , H01L27/1203
摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.
摘要翻译：半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

9. 发明申请

US20070018274A1 Semiconductor circuit arrangement and method 审中-公开
标题翻译：半导体电路的布置和方法
公开(公告)号：US20070018274A1
公开(公告)日：2007-01-25
申请号：US11478912
申请日：2006-06-30
申请人： Dietrich Bonart , Walter Hartner , Hermann Gruber , Andreas Meiser
发明人： Dietrich Bonart , Walter Hartner , Hermann Gruber , Andreas Meiser
IPC分类号： H01L29/00
CPC分类号： H01L27/0805 , H01L28/60
摘要： One aspect of the present invention relates to a semiconductor circuit arrangement and to a method for producing the latter. One aspect of the invention is that, as a result of a connecting trench structure and an isolation trench structure of a semiconductor circuit being in direct spatial proximity with respect to one another, an additional capacitor device is formed. The capacitance of said capacitor device is connected as a usable capacitance for the semiconductor circuit and is connected to the latter.
摘要翻译：本发明的一个方面涉及一种半导体电路装置及其制造方法。本发明的一个方面是，由于半导体电路的连接沟槽结构和隔离沟槽结构相对于彼此直接空间接近，所以形成附加的电容器器件。所述电容器件的电容被连接作为用于半导体电路的可用电容并连接到该电容器。

10. 发明申请

US20140042591A1 CAPACITOR ARRANGEMENTS AND METHOD FOR MANUFACTURING A CAPACITOR ARRANGEMENT 有权
标题翻译：电容器布置和制造电容器布置的方法
公开(公告)号：US20140042591A1
公开(公告)日：2014-02-13
申请号：US13571453
申请日：2012-08-10
申请人： Dietrich Bonart
发明人： Dietrich Bonart
IPC分类号： H01L29/92 , H01L21/02
CPC分类号： H01L27/0805 , H01L27/0629 , H01L27/0811 , H01L29/1608 , H01L29/66181 , H01L29/861 , H01L29/872 , H01L29/93 , H01L29/94
摘要： In various embodiments, a capacitor arrangement is provided, which may include a substrate; a plurality of first doped regions and a plurality of second doped regions, wherein the first doped regions are doped with dopants of a first conductivity type and the second doped regions are doped with dopants of a second conductivity type being opposite to the first conductivity type, and wherein the plurality of first doped regions and the plurality of second doped regions are alternatingly arranged next to each other in the substrate; a dielectric layer disposed over the plurality of first doped regions and the plurality of second doped regions; an electrode disposed over the dielectric layer; a first terminal electrically coupled to each doped region of the plurality of first doped regions and the plurality of second doped regions; and a second terminal electrically coupled to the electrode.
摘要翻译：在各种实施例中，提供电容器布置，其可以包括基板; 多个第一掺杂区域和多个第二掺杂区域，其中所述第一掺杂区域掺杂有第一导电类型的掺杂剂，并且所述第二掺杂区域掺杂有与所述第一导电类型相反的第二导电类型的掺杂剂，并且其中所述多个第一掺杂区域和所述多个第二掺杂区域在所述衬底中彼此相邻地交替布置; 设置在所述多个第一掺杂区域和所述多个第二掺杂区域上的电介质层; 设置在电介质层上的电极; 电耦合到所述多个第一掺杂区域和所述多个第二掺杂区域中的每个掺杂区域的第一端子; 以及电耦合到所述电极的第二端子。

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