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1. 发明申请

US20080054461A1 RELIABLE WAFER-LEVEL CHIP-SCALE PACKAGE SOLDER BUMP STRUCTURE IN A PACKAGED SEMICONDUCTOR DEVICE 审中-公开
标题翻译：包装半导体器件中可靠的水平切片尺寸包装焊接结构
公开(公告)号：US20080054461A1
公开(公告)日：2008-03-06
申请号：US11847512
申请日：2007-08-30
申请人： Dennis Lang , Sonbol Vaziri , James Naylor , Eric Woolsey , Chung-Lin Wu , Mike Gruenhagen , Neill Thornton
发明人： Dennis Lang , Sonbol Vaziri , James Naylor , Eric Woolsey , Chung-Lin Wu , Mike Gruenhagen , Neill Thornton
IPC分类号： H01L23/48 , H01L21/00
CPC分类号： H01L24/05 , H01L23/3114 , H01L23/3192 , H01L24/11 , H01L24/12 , H01L2224/0401 , H01L2224/05022 , H01L2224/05567 , H01L2224/05571 , H01L2224/05572 , H01L2224/05599 , H01L2224/13006 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2224/13099 , H01L2924/00012 , H01L2224/05552
摘要： A wafer level chip scale package (WLCSP) includes a packaged semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions, and encapsulation material surrounding the semiconductor die except for at least a portion of each of the solder bumps.
摘要翻译：晶片级芯片级封装（WLCSP）包括具有多个焊料凸块焊盘的封装半导体器件，每个焊料凸块焊盘上方的图案化钝化区域，每个焊料凸块焊盘上的图案化凸块下金属化（UBM）区域，以及钝化区域，UBM区域和钝化区域的一部分上的聚酰亚胺区域，形成在每个UBM区域上的焊料凸块以及围绕半导体管芯的封装材料，除了每个焊料凸块的至少一部分之外。

2. 发明申请

US20100117231A1 RELIABLE WAFER-LEVEL CHIP-SCALE SOLDER BUMP STRUCTURE 审中-公开
标题翻译：可靠的水平切割尺寸焊接结构
公开(公告)号：US20100117231A1
公开(公告)日：2010-05-13
申请号：US12690179
申请日：2010-01-20
申请人： Dennis Lang , Sonbol Vaziri , James Kent Naylor , Eric Woolsey , Chung-Lin Wu , Mike Gruenhagen , Neill Thornton
发明人： Dennis Lang , Sonbol Vaziri , James Kent Naylor , Eric Woolsey , Chung-Lin Wu , Mike Gruenhagen , Neill Thornton
IPC分类号： H01L23/498
CPC分类号： H01L23/3114 , H01L24/05 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/05022 , H01L2224/05557 , H01L2224/05558 , H01L2224/13022 , H01L2224/13023 , H01L2224/131 , H01L2224/16 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01022 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/05042 , H01L2924/14 , H01L2224/13099
摘要： A wafer level chip scale package (WLCSP) includes a semiconductor device with a plurality of solder bump pads, patterned passivation regions above each of the solder bump pads, a patterned under bump metallization (UBM) region on each of the solder bump pads and the passivation regions, a polyimide region over a portion of the UBM regions and the passivation regions, solder bumps formed on each of the UBM regions.
摘要翻译：晶片级芯片级封装（WLCSP）包括具有多个焊料凸块焊盘的半导体器件，每个焊料凸块焊盘上方的图案化钝化区域，每个焊料凸块焊盘上的图案化凸点下金属化（UBM）区域，以及钝化区域，UBM区域的一部分上的聚酰亚胺区域和钝化区域，形成在每个UBM区域上的焊料凸块。

3. 发明授权

US07655539B2 Dice by grind for back surface metallized dies 有权
标题翻译：用于后表面金属化模具研磨的骰子
公开(公告)号：US07655539B2
公开(公告)日：2010-02-02
申请号：US12103878
申请日：2008-04-16
申请人： Craig Hendricks , Eric Woolsey , Jim Murphy
发明人： Craig Hendricks , Eric Woolsey , Jim Murphy
IPC分类号： H01L21/78
CPC分类号： H01L21/78
摘要： Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.
摘要翻译：描述了半导体器件处理和用于将半导体晶片切割成具有背面金属化的多个单独的裸片的方法。这些方法包括在晶片的前表面提供具有预切割街道的晶片，将侧壁屏蔽机构施加到晶片的前表面，以便基本上填充预切割的街道，使晶片的背表面变薄，以便将晶片（例如，通过研磨，蚀刻或两者）切割并将侧壁掩蔽机构的一部分从晶片的背面暴露出来，并将诸如金属的材料施加到切割晶片的背面。这些方法可以防止金属沉积在模具侧壁上，并且可以允许单个模具的分离，而不会使金属从一个或多个相邻模具的背面剥离。还描述了其它实施例。

4. 发明申请

US20100081257A1 DICE BY GRIND FOR BACK SURFACE METALLIZED DIES 审中-公开
标题翻译：用于后表面金属切割的颗粒
公开(公告)号：US20100081257A1
公开(公告)日：2010-04-01
申请号：US12625075
申请日：2009-11-24
申请人： Craig W. Hendricks , Eric Woolsey , Jim Murphy
发明人： Craig W. Hendricks , Eric Woolsey , Jim Murphy
IPC分类号： H01L21/302
CPC分类号： H01L21/78
摘要： Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.
摘要翻译：描述了半导体器件处理和用于将半导体晶片切割成具有背面金属化的多个单独的裸片的方法。这些方法包括在晶片的前表面提供具有预切割街道的晶片，将侧壁屏蔽机构施加到晶片的前表面，以便基本上填充预切割的街道，使晶片的背表面变薄，以便将晶片（例如，通过研磨，蚀刻或两者）切割并将侧壁掩蔽机构的一部分从晶片的背面暴露出来，并将诸如金属的材料施加到切割晶片的背面。这些方法可以防止金属沉积在模具侧壁上，并且可以允许单个模具的分离，而不会使金属从一个或多个相邻模具的背面剥离。还描述了其它实施例。

5. 发明申请

US20090261388A1 DICE BY GRIND FOR BACK SURFACE METALLIZED DIES 有权
标题翻译：用于后表面金属切割的颗粒
公开(公告)号：US20090261388A1
公开(公告)日：2009-10-22
申请号：US12103878
申请日：2008-04-16
申请人： Craig Hendricks , Eric Woolsey , Jim Murphy
发明人： Craig Hendricks , Eric Woolsey , Jim Murphy
IPC分类号： H01L21/302 , H01L29/78
CPC分类号： H01L21/78
摘要： Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.
摘要翻译：描述了半导体器件处理和用于将半导体晶片切割成可具有背面金属化的多个单独的裸片的方法。这些方法包括在晶片的前表面提供具有预切割街道的晶片，将侧壁屏蔽机构施加到晶片的前表面，以便基本上填充预切割的街道，使晶片的背表面变薄，从而将晶片（例如，通过研磨，蚀刻或两者）切割并将侧壁掩蔽机构的一部分从晶片的背面暴露出来，并将诸如金属的材料施加到切割晶片的背面。这些方法可以防止金属沉积在模具侧壁上，并且可以允许单个模具的分离，而不会使金属从一个或多个相邻模具的背面剥离。还描述了其它实施例。

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