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1. 发明授权

US06391768B1 Process for CMP removal of excess trench or via filler metal which inhibits formation of concave regions on oxide surface of integrated circuit structure 有权
标题翻译：用于CMP去除多余沟槽或通过填充金属的方法，其抑制在集成电路结构的氧化物表面上形成凹陷区域
公开(公告)号：US06391768B1
公开(公告)日：2002-05-21
申请号：US09703616
申请日：2000-10-30
申请人： Dawn M. Lee , Jayanthi Pallinti , Weidan Li , Ming-Yi Lee
发明人： Dawn M. Lee , Jayanthi Pallinti , Weidan Li , Ming-Yi Lee
IPC分类号： H01L214763
CPC分类号： H01L21/7684
摘要： A process-is disclosed for planarizing an integrated circuit structure by chemical mechanical polishing (CMP) after filling, with at least one metal, a plurality of trenches and/or vias formed in a silicon oxide layer on the integrated circuit structure. The process, which is capable of inhibiting formation of concave surface portions on the silicon oxide surface, during the CMP process, in regions where said trenches and/or vias are closely spaced apart, comprises forming, over a layer of silicon oxide of an integrated circuit structure, an antireflective coating (ARC) layer of dielectric material capable of functioning as a stop layer in a CMP process to remove metal; and using this ARC layer as a stop layer to assist in removal of excess metal used to fill trenches and/or vias formed in the oxide layer. The particular material chosen for the ARC layer should have a lower etch rate, in a CMP process to remove metal, than does the underlying oxide dielectric layer. Trenches and/or vias are formed through the ARC layer and the oxide dielectric layer. These trenches and/or vias are then filled by depositing at least one metal layer over the ARC layer. Excess trench and/or via filler metal is then removed from the top surface of the ARC layer by subjecting the metal to a CMP step which is selective to the ARC layer, thereby permitting the ARC layer to function as a CMP stop layer which protects the underlying oxide dielectric layer from exposure to the CMP process. Since the ARC layer has a lower etch rate, in the CMP process to remove metal, than does the oxide dielectric layer, the formation of dished or concave regions in the surface is inhibited, including those regions where the trenches and/or vias are closely spaced apart.
摘要翻译：公开了一种用于在填充之后通过化学机械抛光（CMP）对集成电路结构进行平面化的工艺，其中至少一个金属，形成在集成电路结构上的氧化硅层中的多个沟槽和/或通孔。在CMP工艺期间，能够阻止在氧化硅表面上形成凹面部分的工艺，其中所述沟槽和/或通孔紧密间隔开的区域中，包括在集成的电路结构，能够在CMP工艺中用作去除金属的停止层的介电材料的抗反射涂层（ARC）层; 并且使用该ARC层作为停止层来辅助去除用于填充形成在氧化物层中的沟槽和/或通孔的多余金属。选择用于ARC层的特定材料在CMP工艺中应该具有比底层氧化物介电层更低的去除金属的蚀刻速率。通过ARC层和氧化物介电层形成沟槽和/或通孔。然后通过在ARC层上沉积至少一个金属层来填充这些沟槽和/或通孔。然后通过对金属进行对ARC层有选择性的CMP步骤，从ARC层的顶表面去除过量的沟槽和/或通孔填充金属，从而允许ARC层用作CMP停止层，其保护潜在的氧化物介电层暴露于CMP工艺。由于ARC层具有较低的蚀刻速率，所以在除去金属的CMP工艺中，与氧化物电介质层相比，抑制了表面上的凹陷或凹陷区域的形成，包括沟槽和/或通孔密切的区域间隔开

2. 发明授权

US06607967B1 Process for forming planarized isolation trench in integrated circuit structure on semiconductor substrate 有权
标题翻译：在半导体衬底上形成集成电路结构中的平面化隔离沟槽的工艺
公开(公告)号：US06607967B1
公开(公告)日：2003-08-19
申请号：US09714000
申请日：2000-11-15
申请人： Jayanthi Pallinti , Dawn M. Lee , Ronald J. Nagahara
发明人： Jayanthi Pallinti , Dawn M. Lee , Ronald J. Nagahara
IPC分类号： H01L2176
CPC分类号： H01L21/76229 , H01L21/31053
摘要： A process is disclosed for planarizing a semiconductor substrate after filling isolation trenches in the substrate with dielectric material wherein the respective thicknesses of a liner layer of dielectric material blanket deposited over the upper surface of the substrate and in the trenches, and/or a filler layer of dielectric material blanket deposited over the liner layer to fill the trenches, may not be uniform. The planarization process include: removing portions of the filler layer over the liner layer on the upper surface of the substrate until portions of the underlying liner layer on the upper surface of the substrate are exposed; treating the exposed portions of the liner layer to inhibit removal of the exposed liner layer portions; continuing to remove the remainder of the filler layer on the liner layer over the upper surface of the substrate until all of the underlying liner layer on the upper surface of the substrate is exposed; and then removing the liner layer over the upper surface of the substrate and over the filler layer in the trenches until all of the liner layer is removed from the upper surface of the substrate; whereby removal of all of the filler layer on the liner layer over the upper surface of the substrate, while inhibiting removal of the liner layer over the upper surface of the substrate until such filler layer removal on the liner layer over the upper surface of the substrate is completed, will result in formation of a planarized surface on the upper surface of the substrate, and the upper surfaces of the filler layer and the liner layer in the trenches.
摘要翻译：公开了一种用于在用介电材料填充衬底中的隔离沟槽之后对半导体衬底进行平面化的工艺，其中介电材料的衬垫层的相应厚度沉积在衬底的上表面和沟槽中，和/或填充层沉积在衬层上以填充沟槽的介电材料毯可能不均匀。平坦化工艺包括：在衬底的上表面上的衬垫层上去除填料层的部分，直到衬底的上表面上的下层衬垫层的部分露出; 处理衬里层的暴露部分以阻止暴露的衬垫层部分的去除; 继续在衬底的上表面上去除衬垫层上的填充层的剩余部分，直到衬底的上表面上的所有下面的衬垫层露出; 然后在衬底的上表面上并在沟槽中的填料层上除去衬垫层，直到衬底的所有层从衬底的上表面去除; 从而在衬底的上表面上去除衬垫层上的所有填料层，同时抑制衬底层在衬底的上表面上的移除，直到衬底上的填料层在衬底的上表面上移除将导致在基板的上表面上形成平坦化的表面，并且在沟槽中形成填料层和衬垫层的上表面。

3. 发明授权

US5769696A Chemical-mechanical polishing of thin materials using non-baked carrier film 失效
标题翻译：使用非烘烤载体薄膜的薄材料的化学机械抛光
公开(公告)号：US5769696A
公开(公告)日：1998-06-23
申请号：US388057
申请日：1995-02-10
申请人： Dawn M. Lee , Subramanian Venkatkrishnan
发明人： Dawn M. Lee , Subramanian Venkatkrishnan
IPC分类号： B24B37/30 , H01L21/306 , H01L21/3105 , H01L21/321 , B24B5/00
CPC分类号： H01L21/3212 , B24B37/30 , H01L21/31053
摘要： Planarization of a patterned semiconductor wafer is effected by chemical-mechanical polishing using a carrier assembly comprising a carrier film adhesively bonded to a base plate, preferably by a pressure sensitive adhesive. Chemical-mechanical polishing is preferably conducted employing three phases of different pressures to prevent wafer slippage.
摘要翻译：图案化半导体晶片的平面化通过化学机械抛光来实现，其使用载体组件进行化学机械抛光，所述载体组件优选通过压敏粘合剂将载体膜粘合到基板上。化学机械抛光优选用不同压力的三相进行，以防止晶片滑动。

4. 发明授权

US06531397B1 Method and apparatus for using across wafer back pressure differentials to influence the performance of chemical mechanical polishing 失效
标题翻译：用于跨晶片背压差的方法和装置，以影响化学机械抛光的性能
公开(公告)号：US06531397B1
公开(公告)日：2003-03-11
申请号：US09005364
申请日：1998-01-09
申请人： Ronald J. Nagahara , Dawn M. Lee
发明人： Ronald J. Nagahara , Dawn M. Lee
IPC分类号： H01L21302
CPC分类号： B24B37/30
摘要： Methods and apparatus for planarizing the surface of a semiconductor wafer by applying non-uniform pressure distributions across the back side of the wafer are disclosed. According to one aspect of the present invention, a chemical mechanical polishing apparatus for polishing a first surface of a semiconductor wafer includes a polishing pad which polishes the first surface of the semiconductor wafer. The apparatus also includes a first mechanism which is used to hold, or otherwise support, the wafer during polishing, and a second mechanism that is used to apply a non-uniform pressure distribution through the first mechanism, directly onto a second surface of the wafer. The second mechanism is further used to facilitate polishing the first surface of the semiconductor wafer such that the first surface of the semiconductor wafer is evenly polished. In one embodiment, the second mechanism is arranged to apply both positive pressure and negative pressure substantially simultaneously across the second surface of the semiconductor wafer.
摘要翻译：公开了通过在晶片的背面施加不均匀的压力分布来平坦化半导体晶片的表面的方法和装置。根据本发明的一个方面，一种用于抛光半导体晶片的第一表面的化学机械抛光装置包括：抛光衬垫，其抛光半导体晶片的第一表面。该装置还包括用于在抛光期间保持或以其他方式支撑晶片的第一机构，以及用于将非均匀压力分布通过第一机构施加到第二机构的第二机构，直接施加到晶片的第二表面上。第二机构还用于促进对半导体晶片的第一表面进行抛光，使得半导体晶片的第一表面被均匀地抛光。在一个实施例中，第二机构被布置成在半导体晶片的第二表面上基本上同时施加正压和负压。

5. 发明授权

US5941761A Shaping polishing pad to control material removal rate selectively 失效
标题翻译：整形抛光垫选择性地控制材料去除率
公开(公告)号：US5941761A
公开(公告)日：1999-08-24
申请号：US921758
申请日：1997-08-25
申请人： Ronald J. Nagahara , Dawn M. Lee
发明人： Ronald J. Nagahara , Dawn M. Lee
IPC分类号： B24B53/007 , B24B53/017 , B24B53/00
CPC分类号： B24B53/017
摘要： An end effector to facilitate conditioning of a surface of a polishing pad used in chemical-mechanical polishing of an substrate surface is described. The end effector includes a rigid body including a contact surface capable of being attached to a conditioning disk and having a predetermined non-planar region that is adapted to at least one of (i) effectively maintain a non-planar area on the surface of the polishing pad and (ii) shape the polishing pad, when the end effector is employed to condition the polishing pad.
摘要翻译：描述了用于促进对衬底表面的化学机械抛光中使用的抛光垫的表面进行调节的端部执行器。端部执行器包括刚性体，其包括能够附接到调节盘的接触表面，并具有预定的非平面区域，该非平面区域适于以下至少一个：（i）有效地保持表面上的非平面区域抛光垫和（ii）当使用端部执行器调节抛光垫时，抛光抛光垫的形状。

6. 发明授权

US6066266A In-situ chemical-mechanical polishing slurry formulation for compensation of polish pad degradation 失效
标题翻译：用于补偿抛光垫退化的原位化学机械抛光浆料配方
公开(公告)号：US6066266A
公开(公告)日：2000-05-23
申请号：US112403
申请日：1998-07-08
申请人： Richard S. Osugi , Ronald J. Nagahara , Dawn M. Lee
发明人： Richard S. Osugi , Ronald J. Nagahara , Dawn M. Lee
IPC分类号： B24B37/04 , B24B49/02 , B24B49/12 , B24B49/18 , H01L21/3105 , H01L21/321 , B44C1/22
CPC分类号： H01L21/3212 , B24B37/042 , B24B49/02 , B24B49/12 , B24B49/183 , H01L21/31053
摘要： A process for compensating for degradation of a first polishing pad during polishing on the first polishing pad of a plurality of substrate surfaces that have substantially similar film stacks is described. The process includes: (a) characterizing a test polishing pad, which characterization includes determining changes in film removal rates of layers of the film stack during polishing of the plurality of the substrate surfaces on the test polishing pad; (b) polishing a first substrate surface on the first polishing pad, which is substantially similar to the test polishing pad, under a first set of polishing conditions; and (c) polishing a second substrate surface on the first polishing pad under a second set of polishing conditions. A difference between the second set of polishing conditions and the first set of polishing conditions is designed to minimize the changes in the film removal rates of the layers of the film stack and thereby compensate for degradation of the first polishing pad.
摘要翻译：描述了在具有基本上相似的膜堆叠的多个基板表面的第一抛光垫上的抛光期间补偿第一抛光垫的劣化的过程。该方法包括：（a）表征测试抛光垫，该表征包括确定在测试抛光垫上的多个基板表面的抛光期间薄膜叠层的膜去除速率的变化; （b）在第一组抛光条件下抛光第一抛光垫上基本上类似于测试抛光垫的第一衬底表面; 和（c）在第二组抛光条件下抛光第一抛光垫上的第二衬底表面。设计第二组抛光条件与第一组抛光条件之间的差异，以最小化膜堆叠层的膜去除速率的变化，从而补偿第一抛光垫的劣化。

7. 发明授权

US5816900A Apparatus for polishing a substrate at radially varying polish rates 失效
标题翻译：用于以径向变化的抛光速率抛光衬底的装置
公开(公告)号：US5816900A
公开(公告)日：1998-10-06
申请号：US895659
申请日：1997-07-17
申请人： Ron J. Nagahara , Dawn M. Lee
发明人： Ron J. Nagahara , Dawn M. Lee
IPC分类号： B24B37/24 , B24B57/02 , B24B19/22
CPC分类号： B24B37/24 , B24B57/02
摘要： A polishing apparatus and method is disclosed, whereby fluid is delivered at dissimilar flow rates and pressures across a wafer. The fluid is delivered either directly to the wafer or through a polishing pad. Changing the fluid delivery allows the removal properties of the fluid to polish material from the wafer surface based on the location of that material relative to the center of the wafer. The fluid delivery system and the polishing pad oscillate relative to a rotating wafer. The radius of oscillation is relatively small compared to the size of the wafer to allow removal along one or more concentric rings and/or circles across the wafer.
摘要翻译：公开了一种抛光装置和方法，其中以不同的流速和压力在晶片上输送流体。流体直接输送到晶片或通过抛光垫。基于该材料相对于晶片中心的位置，改变流体输送允许流体的去除特性从晶片表面抛光材料。流体输送系统和抛光垫相对于旋转的晶片振荡。与晶片的尺寸相比，振荡的半径相对较小，以允许沿着晶片上的一个或多个同心环和/或圆去除。

8. 发明授权

US06168508A Polishing pad surface for improved process control 失效
标题翻译：抛光垫表面，用于改进过程控制
公开(公告)号：US06168508A
公开(公告)日：2001-01-02
申请号：US08918293
申请日：1997-08-25
申请人： Ronald J. Nagahara , Dawn M. Lee
发明人： Ronald J. Nagahara , Dawn M. Lee
IPC分类号： B24D1100
CPC分类号： B24B37/24 , B24B37/26
摘要： A polishing pad for chemical-mechanical polishing of an integrated circuit surface is described. The polishing pad includes a first polishing area having a first value of a physical property; and a second polishing area having a second value of said physical property, which said second value is different from the first value, such that during chemical-mechanical polishing of an integrated circuit surface, the integrated circuit rotates and oscillates on the polishing pad so that a substantial portion of the integrated circuit surface contacts both the first and second polishing areas, wherein a width of said first and second polishing areas is greater than about 40 mils.
摘要翻译：描述了用于集成电路表面的化学机械抛光的抛光垫。抛光垫包括具有物理性质的第一值的第一抛光区域; 以及具有所述物理性质的第二值的第二抛光区域，所述第二值不同于第一值，使得在集成电路表面的化学机械抛光期间，集成电路在抛光垫上旋转并振荡，使得集成电路表面的大部分接触第一和第二抛光区域，其中所述第一和第二抛光区域的宽度大于约40密耳。

9. 发明授权

US6106371A Effective pad conditioning 失效
标题翻译：有效垫调节
公开(公告)号：US6106371A
公开(公告)日：2000-08-22
申请号：US961383
申请日：1997-10-30
申请人： Ronald J. Nagahara , Dawn M. Lee
发明人： Ronald J. Nagahara , Dawn M. Lee
IPC分类号： B24B37/26 , B24B53/007 , B24B53/017 , B24D13/14 , B24B1/00
CPC分类号： B24B37/26 , B24B53/017 , B24D13/14
摘要： An end effector to facilitate conditioning a surface of a polishing pad used in chemical-mechanical polishing of a substrate surface is described. The end effector includes an inwardly recessing contact surface capable of attaching to a conditioning disk having a conditioning surface such that the conditioning surface conforms to a substantial portion of the polishing pad, which protrudes outwardly under operation and thereby effectively conditions a substantial portion of the polishing pad. The present invention also describes a conditioning disk for effectively conditioning a surface of a polishing pad used in chemical-mechanical polishing of a substrate surface. The conditioning disk includes (i) a second surface capable of attaching to a contact surface of an end effector and (ii) an inwardly recessing conditioning surface that conforms to a substantial portion of said polishing pad, which protrudes outwardly under operation, and thereby effectively conditions the polishing pad. Processes and a chemical-mechanical polishing apparatuses employing the inventive end effectors or conditioning disks are also described.
摘要翻译：描述了一种端部执行器，以便于调节用于衬底表面的化学机械抛光的抛光垫的表面。末端执行器包括向内凹入的接触表面，其能够附接到具有调节表面的调节盘，使得调节表面符合抛光垫的大部分，其在操作下向外突出，从而有效地调节抛光的大部分垫。本发明还描述了一种用于有效调节用于衬底表面的化学机械抛光的抛光垫的表面的调节盘。调节盘包括（i）能够附接到端部执行器的接触表面的第二表面和（ii）符合在操作中向外突出的所述抛光垫的大部分的向内凹陷的调节表面，从而有效地调节抛光垫。还描述了采用本发明的末端效应器或调节盘的方法和化学机械抛光装置。

10. 发明授权

US5944585A Use of abrasive tape conveying assemblies for conditioning polishing pads 失效
标题翻译：研磨带输送组件用于调节抛光垫的使用
公开(公告)号：US5944585A
公开(公告)日：1999-08-31
申请号：US942991
申请日：1997-10-02
申请人： Ronald J. Nagahara , Dawn M. Lee
发明人： Ronald J. Nagahara , Dawn M. Lee
IPC分类号： B24B21/12 , B24B53/007 , B24B53/017 , B24B1/00
CPC分类号： B24B53/017 , B24B21/12
摘要： A conveying assembly in a conditioning sub-assembly for conveying a conditioning surface to a polishing pad during conditioning is described. The conveying assembly includes an arm and a guiding component connected to the arm and adapted to guide the conditioning surface about the conveying assembly, thereby allowing another area of the conditioning surface to advance and become available for conditioning.
摘要翻译：描述了在调节子组件中用于在调节期间将调理表面传送到抛光垫的输送组件。输送组件包括臂和连接到臂的引导部件，并且适于引导调节表面围绕输送组件，从而允许调理表面的另一区域前进并变得可用于调理。

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