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1. 发明申请

US20170291956A1 HER3 Inhibition in Low-grade Serous Ovarian Cancers 审中-公开
公开(公告)号：US20170291956A1
公开(公告)日：2017-10-12
申请号：US15325336
申请日：2015-07-15
申请人： David Livingston , Joyce Liu , Ronny Drapkin
发明人： David Livingston , Joyce Liu , Ronny Drapkin
IPC分类号： C07K16/32 , A61K39/395 , C12N15/113 , A61K45/06
CPC分类号： C07K16/32 , A61K39/3955 , A61K45/06 , A61K2039/55 , C07K2317/34 , C07K2317/56 , C07K2317/73 , C07K2317/76 , C12N15/111 , C12N15/1135 , C12N15/1138 , C12N2310/14 , C12N2320/31
摘要： Methods of treatment of cancer are provided. In particular, methods of treatment of low-grade serous ovarian cancers by inhibiting signaling of an EGFR family member are provided.

2. 发明公开

US20240342834A1 Apparatus of Inner Light Layer Formed by Multibeam Interference for Processing Object in Optical Turbid Medium 审中-公开
公开(公告)号：US20240342834A1
公开(公告)日：2024-10-17
申请号：US18594335
申请日：2024-03-04
申请人： Joyce Liu , Shangqing Liu
发明人： Joyce Liu , Shangqing Liu
IPC分类号： B23K26/50 , A61B18/00 , A61B18/20 , B23K26/03 , B23K26/0622 , G02B17/00
CPC分类号： B23K26/50 , A61B18/20 , B23K26/032 , B23K26/0622 , A61B2018/00577 , A61B2018/00625 , A61B2018/2035 , A61B2018/2065 , G02B17/004
摘要： This non-provisional application is a continuation-in-part application filed under 37 CFR 1.53(b) that claims the benefit of United States 35 USC 120 from non-provisional application with U.S. application Ser. No. 18/237,911 filed on Aug. 25, 2023, and from non-provisional application with Pub. No. US 2022/0258277 A1 filed on Feb. 12, 2021. This invention discloses an apparatus of processing object in optical turbid medium using multibeam interference. This invention creates the apparatus having important usages, such as medical no incision laser surgery with deep treating depth, underwater wireless long-distance communication, small attenuation light energy delivery in optical turbid medium. The disclosed apparatus has excellent performance. For example, the created laser scalpel can treat tissue at depths of more than 5 cm in human body with high 3D precision of about 1 μm. The effective light energy delivery distance including underwater wireless communication distance of more than 1000 m in clear seawater.

3. 发明授权

US06727589B2 Dual damascene flowable oxide insulation structure and metallic barrier 有权
标题翻译：双镶嵌可流动氧化物绝缘结构和金属屏障
公开(公告)号：US06727589B2
公开(公告)日：2004-04-27
申请号：US09725862
申请日：2000-11-30
申请人： Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
发明人： Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
IPC分类号： H01L2348
CPC分类号： H01L21/76843 , H01L21/31116 , H01L21/76807 , H01L21/76814 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/7684
摘要： A method and structure for protecting a flowable oxide insulator in a semiconductor by oxidizing sidewalls of the FOX insulator, optionally nitridizing the oxidized FOX sidewalls, and then covering all surfaces of a trough or plurality of troughs in the FOX insulator, including the sidewalls, with a conductive secondary protective layer. In a multiple layer damascene structure, the surface of the FOX insulator is also oxidized, an additional oxide layer is deposited thereon, and a nitride layer deposited on the oxide layer. Then steps are repeated to obtain a comparable damascene structure. The materials can vary and each damascene layer may be either a single damascene or a dual damascene layer.
摘要翻译：一种通过氧化FOX绝缘体的侧壁来保护半导体中的可流动的氧化物绝缘体的方法和结构，可选地将氧化的FOX侧壁氮化，然后覆盖包括侧壁在内的FOX绝缘体中的槽或多个槽的所有表面，导电二级保护层。在多层镶嵌结构中，FOX绝缘体的表面也被氧化，在其上沉积另外的氧化物层，并且沉积在氧化物层上的氮化物层。然后重复步骤以获得可比较的镶嵌结构。材料可以变化，并且每个镶嵌层可以是单镶嵌层或双镶嵌层。

4. 发明授权

US06348736B1 In situ formation of protective layer on silsesquioxane dielectric for dual damascene process 有权
标题翻译：在双镶嵌工艺中在倍半硅氧烷电介质上原位形成保护层
公开(公告)号：US06348736B1
公开(公告)日：2002-02-19
申请号：US09429257
申请日：1999-10-29
申请人： Vincent J. McGahay , John P. Hummel , Joyce Liu , Rebecca Mih , Kamalesh Srivastava , Robert Cook , Stephen E. Greco
发明人： Vincent J. McGahay , John P. Hummel , Joyce Liu , Rebecca Mih , Kamalesh Srivastava , Robert Cook , Stephen E. Greco
IPC分类号： H01L2348
CPC分类号： H01L21/76831 , H01L21/02134 , H01L21/02137 , H01L21/0234 , H01L21/02362 , H01L21/31144 , H01L21/3122 , H01L21/3124 , H01L21/76807
摘要： Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. A first protective layer is formed in situ on the dielectric material, such as by exposing the material to an oxygen-containing or flourine containing plasma. Also, by performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. The first protective layer and the surface protective covering can be formed by essentially identical processes. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.
摘要翻译：抗蚀剂显影剂可以攻击一些先进的介电材料，例如可以用作集成电路芯片的表面和形成在介电材料表面上的布线层之间的绝缘体的倍半硅氧烷材料。在电介质材料上原位形成第一保护层，例如通过将材料暴露于含氧或含氟的等离子体中。此外，通过进行抗蚀剂剥离或蚀刻工艺，其中将反应物材料从电介质材料外部供应或从电介质材料释放出来，可以形成非常薄的中间材料的表面保护覆盖层，其不能抵抗显影剂或多个可能损坏可流动的氧化物材料的其他材料。第一保护层和表面保护层可以通过基本相同的方法形成。因此，与芯片形成牢固的连接和通孔的双镶嵌工艺可以与具有特别低介电常数的先进电介质相兼容，以最小化导体电容并支持快速的信号传播和抗噪声性，即使导体彼此间隔紧密。

5. 发明授权

US06221780B1 Dual damascene flowable oxide insulation structure and metallic barrier 失效
标题翻译：双镶嵌可流动氧化物绝缘结构和金属屏障
公开(公告)号：US06221780B1
公开(公告)日：2001-04-24
申请号：US09408351
申请日：1999-09-29
申请人： Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
发明人： Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
IPC分类号： H01L21311
CPC分类号： H01L21/76843 , H01L21/31116 , H01L21/76807 , H01L21/76814 , H01L21/76826 , H01L21/76829 , H01L21/76831 , H01L21/7684
摘要： A method and structure for protecting a flowable oxide insulator in a semiconductor by oxidizing sidewalls of the FOX insulator, optionally nitridizing the oxidized FOX sidewalls, and then covering all surfaces of a trough or plurality of troughs in the FOX insulator, including the sidewalls, with a conductive secondary protective layer. In a multiple layer damascene structure, the surface of the FOX insulator is also oxidized, an additional oxide layer is deposited thereon, and a nitride layer deposited on the oxide layer. Then steps are repeated to obtain a comparable damascene structure. The materials can vary and each damascene layer may be either a single damascene or a dual damascene layer.
摘要翻译：一种通过氧化FOX绝缘体的侧壁来保护半导体中的可流动的氧化物绝缘体的方法和结构，可选地将氧化的FOX侧壁氮化，然后覆盖包括侧壁在内的FOX绝缘体中的槽或多个槽的所有表面，导电二级保护层。在多层镶嵌结构中，FOX绝缘体的表面也被氧化，在其上沉积另外的氧化物层，并且沉积在氧化物层上的氮化物层。然后重复步骤以获得可比较的镶嵌结构。材料可以变化，并且每个镶嵌层可以是单镶嵌层或双镶嵌层。

6. 发明申请

US20220258277A1 Laser Beam Processing Apparatuses and Correspondent Method Using Multi-beam Interference 有权
公开(公告)号：US20220258277A1
公开(公告)日：2022-08-18
申请号：US17175511
申请日：2021-02-12
申请人： Joyce Liu
发明人： Joyce Liu
IPC分类号： B23K26/0622 , B23K26/06 , B23K26/067 , B23K26/21 , B23K26/362 , B23K26/382 , B23K26/18 , A61B18/20
摘要： The invention relates to apparatuses and correspondent method of laser beam processing for various materials with strong light absorption and scattering. The apparatuses can be used for medical no incision laser surgery, long distance underwater or atmosphere light communication, less attenuation light energy delivery in optical turbid media, and so on. This invention is a new use of the imaging method using multiple beam interference to create destructive interference in the beam propagation path to reduce the illumination light intensity and so to reduce absorption and scattering of the materials, and to create constructive interference to produce high composite light intensity which forms an inner light layer to illuminate, process the inner object in the materials. The apparatuses are practicable and have great performance. Compared with the traditional apparatuses, for example, the created laser scalpel can treat tissue at depths of more than 5 cm in human body without incision and with high 3D precision of about 1 μm. The effective light energy delivery distance is more than 1000 m in clear seawater.

7. 发明申请

US20050260819A1 REDUCED DIELECTRIC CONSTANT SPACER MATERIALS INTEGRATION FOR HIGH SPEED LOGIC GATES 失效
标题翻译：减少电介质间隔材料高速逻辑门集成
公开(公告)号：US20050260819A1
公开(公告)日：2005-11-24
申请号：US10709652
申请日：2004-05-20
申请人： Michael Belyansky , Joyce Liu , Hsing Jen Wann , Richard Wise , Hongwen Yan
发明人： Michael Belyansky , Joyce Liu , Hsing Jen Wann , Richard Wise , Hongwen Yan
IPC分类号： H01L21/316 , H01L21/336 , H01L21/4763 , H01L27/088 , H01L29/78 , H01L29/786
CPC分类号： H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： An FET transistor has a gate disposed between a source and a drain; a gate dielectric layer disposed underneath the gate; and a spacer on a side of the gate. The gate dielectric layer is conventional oxide and the spacer has a reduced dielectric constant (k). The reduced dielectric constant (k) may be less than 3.85, or it may be less than 7.0 (˜nitride), but greater than 3.85 (˜oxide). Preferably, the spacer comprises a material which can be etched selectively to the gate dielectric layer. The spacer may be porous, and a thin layer is deposited on the porous spacer to prevent moisture absorption. The spacer may comprise a material selected from the group consisting of Black Diamond, Coral, TERA and Blok type materials. Pores may be formed in the spacer material by exposing the spacers to an oxygen plasma.
摘要翻译： FET晶体管具有设置在源极和漏极之间的栅极; 设置在栅极下方的栅介质层; 和在门侧的间隔物。栅极电介质层是常规的氧化物，间隔物具有降低的介电常数（k）。降低的介电常数（k）可以小于3.85，或者可以小于7.0（〜氮化物），但大于3.85（〜氧化物）。优选地，间隔物包括可以选择性地蚀刻到栅极介电层的材料。间隔物可以是多孔的，并且在多孔间隔物上沉积薄层以防止吸湿。间隔物可以包括选自黑钻石，珊瑚，TERA和Blok型材料的材料。可以通过将间隔物暴露于氧等离子体来在间隔物材料中形成孔。

8. 发明授权

US06479884B2 Interim oxidation of silsesquioxane dielectric for dual damascene process 有权
标题翻译：双重镶嵌工艺的倍半硅氧烷电介质的中间氧化
公开(公告)号：US06479884B2
公开(公告)日：2002-11-12
申请号：US09893786
申请日：2001-06-29
申请人： Robert Cook , Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
发明人： Robert Cook , Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
IPC分类号： H01L2358
CPC分类号： H01L21/76808 , H01L2221/1063
摘要： Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. By performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.
摘要翻译：抗蚀剂显影剂可以攻击一些先进的介电材料，例如可以用作集成电路芯片的表面和形成在介电材料表面上的布线层之间的绝缘体的倍半硅氧烷材料。通过进行抗蚀剂剥离或蚀刻工艺，其中将反应物材料从电介质材料外部供应或释放出来，可以形成非常薄的中间材料的表面保护覆盖层，其不能抵抗显影剂或多种其它材料这可能会损坏可流动的氧化物材料。因此，与芯片形成牢固的连接和通孔的双镶嵌工艺可以与具有特别低介电常数的先进电介质相兼容，以最小化导体电容并支持快速的信号传播和抗噪声性，即使导体彼此间隔紧密。

9. 发明授权

US06329280B1 Interim oxidation of silsesquioxane dielectric for dual damascene process 失效
公开(公告)号：US06329280B1
公开(公告)日：2001-12-11
申请号：US09311470
申请日：1999-05-13
申请人： Robert Cook , Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
发明人： Robert Cook , Stephen E. Greco , John P. Hummel , Joyce Liu , Vincent J. McGahay , Rebecca Mih , Kamalesh Srivastava
IPC分类号： H01L214763
CPC分类号： H01L21/76808 , H01L2221/1063
摘要： Resist developers can attack some advanced dielectric materials such as silsesquioxane materials which can be used as an insulator between a surface of an integrated circuit chip and wiring layers formed on the surface of the dielectric material. By performing a resist stripping or etching process in which a reactant material is supplied externally or liberated from the dielectric material, an extremely thin surface protective covering of an intermediate material may be formed which is impervious to resist developers or any of a plurality of other materials which may damage the flowable oxide material. A dual Damascene process for forming robust connections and vias to the chip can thus be made compatible with advanced dielectrics having particularly low dielectric constants to minimize conductor capacitance and support fast signal propagation and noise immunity even where conductors are closely spaced to each other.

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