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1. 发明授权

US07064361B1 NPN transistor having reduced extrinsic base resistance and improved manufacturability 有权
标题翻译： NPN晶体管具有降低的外部基极电阻和改进的可制造性
公开(公告)号：US07064361B1
公开(公告)日：2006-06-20
申请号：US10865634
申请日：2004-06-10
申请人： David Howard , Marco Racanelli , Greg D. U'Ren
发明人： David Howard , Marco Racanelli , Greg D. U'Ren
IPC分类号： H01L29/739
CPC分类号： H01L29/66287 , H01L21/8249 , H01L29/1004 , H01L29/167 , H01L29/66242 , H01L29/66272
摘要： According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-germanium heterojunction bipolar transistor. The base layer can be, for example, silicon-germanium. According to this exemplary embodiment, the NPN bipolar transistor further comprises a cap layer situated over the base layer, where a portion of the cap layer is situated over the extrinsic base region, and where the portion of the cap layer situated over the extrinsic base region comprises an indium dopant. The cap layer may be, for example, polycrystalline silicon. According to this exemplary embodiment, the NPN bipolar transistor may further comprise an emitter situated over the intrinsic base region. The emitter may be, for example, polycrystalline silicon.
摘要翻译：根据一个示例性实施例，NPN双极晶体管包括位于集电极上方的基极层，其中基极层包含本征基极区域和外部基极区域。 NPN双极晶体管可以是例如NPN硅 - 锗异质结双极晶体管。基层可以是例如硅 - 锗。根据该示例性实施例，NPN双极晶体管还包括位于基极层之上的覆盖层，其中覆盖层的一部分位于外部本体区域之上，并且其中覆盖层的位于外部基极区域之上的部分包括铟掺杂剂。盖层可以是例如多晶硅。根据该示例性实施例，NPN双极晶体管还可以包括位于本征基极区域上方的发射极。发射极可以是例如多晶硅。

2. 发明授权

US07235861B1 NPN transistor having reduced extrinsic base resistance and improved manufacturability 有权
标题翻译： NPN晶体管具有降低的外部基极电阻和改进的可制造性
公开(公告)号：US07235861B1
公开(公告)日：2007-06-26
申请号：US11003572
申请日：2004-12-02
申请人： David Howard , Marco Racanelli , Greg D. U'Ren
发明人： David Howard , Marco Racanelli , Greg D. U'Ren
IPC分类号： H01L29/73
CPC分类号： H01L29/66287 , H01L29/66242
摘要： A method for fabricating an NPN bipolar transistor comprises forming a base layer on a top surface of a substrate. The NPN bipolar transistor may be an NPN silicon-germanium heterojunction bipolar transistor. The method for fabricating the NPN bipolar transistor may further comprise a cap layer situated over the base layer. According to this embodiment, the method for fabricating the NPN bipolar transistor further comprises fabricating an emitter over the base layer, where the emitter defines an intrinsic and an extrinsic base region of the base layer. The emitter may comprise, for example, polycrystalline silicon. The method for fabricating the NPN bipolar transistor further comprises implanting germanium in the extrinsic base region of the base layer so as to make the extrinsic base region substantially amorphous. The method for fabricating the NPN bipolar transistor further comprises implanting boron in the extrinsic base region of the base layer.
摘要翻译：一种用于制造NPN双极晶体管的方法，包括在衬底的顶表面上形成基层。 NPN双极晶体管可以是NPN硅 - 锗异质结双极晶体管。制造NPN双极晶体管的方法还可以包括位于基极层之上的覆盖层。根据该实施例，用于制造NPN双极晶体管的方法还包括在基极层上制造发射极，其中发射极限定基极层的本征和非本征基极区域。发射极可以包括例如多晶硅。制造NPN双极晶体管的方法还包括将锗掺杂在基层的外部基极区域中，以使外部基极区域基本上无定形。用于制造NPN双极晶体管的方法还包括在基层的外部基极区域中注入硼。

3. 发明授权

US06893931B1 Reducing extrinsic base resistance in an NPN transistor 有权
标题翻译：降低NPN晶体管的外部基极电阻
公开(公告)号：US06893931B1
公开(公告)日：2005-05-17
申请号：US10290955
申请日：2002-11-07
申请人： David Howard , Marco Racanelli , Greg D. U'Ren
发明人： David Howard , Marco Racanelli , Greg D. U'Ren
IPC分类号： H01L21/331
CPC分类号： H01L29/66287 , H01L29/66242
摘要： A method for fabricating an NPN bipolar transistor comprises forming a base layer on a top surface of a substrate. The NPN bipolar transistor may be an NPN silicon-germanium heterojunction bipolar transistor. The method for fabricating the NPN bipolar transistor may further comprise a cap layer situated over the base layer. According to this embodiment, the method for fabricating the NPN bipolar transistor further comprises fabricating an emitter over the base layer, where the emitter defines an intrinsic and an extrinsic base region of the base layer. The emitter may comprise, for example, polycrystalline silicon. The method for fabricating the NPN bipolar transistor further comprises implanting germanium in the extrinsic base region of the base layer so as to make the extrinsic base region substantially amorphous. The method for fabricating the NPN bipolar transistor further comprises implanting boron in the extrinsic base region of the base layer.
摘要翻译：一种用于制造NPN双极晶体管的方法，包括在衬底的顶表面上形成基层。 NPN双极晶体管可以是NPN硅 - 锗异质结双极晶体管。制造NPN双极晶体管的方法还可以包括位于基极层之上的覆盖层。根据该实施例，用于制造NPN双极晶体管的方法还包括在基极层上制造发射极，其中发射极限定基极层的本征和非本征基极区域。发射极可以包括例如多晶硅。制造NPN双极晶体管的方法还包括将锗掺杂在基层的外部基极区域中，以使外部基极区域基本上无定形。用于制造NPN双极晶体管的方法还包括在基层的外部基极区域中注入硼。

4. 发明授权

US06830982B1 Method for reducing extrinsic base resistance and improving manufacturability in an NPN transistor 有权
标题翻译：降低外部碱性电阻并提高NPN晶体管可制造性的方法
公开(公告)号：US06830982B1
公开(公告)日：2004-12-14
申请号：US10290976
申请日：2002-11-07
申请人： David Howard , Marco Racanelli , Greg D. U'Ren
发明人： David Howard , Marco Racanelli , Greg D. U'Ren
IPC分类号： H01L21331
CPC分类号： H01L29/66287 , H01L21/8249 , H01L29/1004 , H01L29/167 , H01L29/66242 , H01L29/66272
摘要： According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-germanium heterojunction bipolar transistor. The base layer can be, for example, silicon-germanium. According to this exemplary embodiment, the NPN bipolar transistor further comprises a cap layer situated over the base layer, where a portion of the cap layer is situated over the extrinsic base region, and where the portion of the cap layer situated over the extrinsic base region comprises an indium dopant. The cap layer may be, for example, polycrystalline silicon. According to this exemplary embodiment, the NPN bipolar transistor may further comprise an emitter situated over the intrinsic base region. The emitter may be, for example, polycrystalline silicon.
摘要翻译：根据一个示例性实施例，NPN双极晶体管包括位于集电极上方的基极层，其中基极层包含本征基极区域和外部基极区域。 NPN双极晶体管可以是例如NPN硅 - 锗异质结双极晶体管。基层可以是例如硅 - 锗。根据该示例性实施例，NPN双极晶体管还包括位于基极层之上的覆盖层，其中覆盖层的一部分位于外部本体区域之上，并且其中覆盖层的位于外部基极区域之上的部分包括铟掺杂剂。盖层可以是例如多晶硅。根据该示例性实施例，NPN双极晶体管还可以包括位于本征基极区域上方的发射极。发射极可以是例如多晶硅。

5. 发明授权

US06673688B1 Method for eliminating collector-base band gap in an HBT 有权
标题翻译：消除HBT中的集电极带隙的方法
公开(公告)号：US06673688B1
公开(公告)日：2004-01-06
申请号：US10301885
申请日：2002-11-21
申请人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
发明人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
IPC分类号： H01L218222
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of germanium, where the concentration of germanium decreases between a first depth and a second depth in the base. According to this exemplary embodiment, the base of the heterojunction bipolar transistor further comprises a concentration of a diffusion suppressant of a base dopant, where the concentration of the diffusion suppressant decreases between a third depth and a fourth depth so as to counteract a change in band gap in the base between the first depth and the second depth. For example, the diffusion suppressant can be carbon and the base dopant can be boron. For example, the concentration of diffusion suppressant may decrease between the third depth and fourth depth so as to counteract the change in band gap at approximately the second depth.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括具有锗浓度的基底，其中锗的浓度在基底中的第一深度和第二深度之间降低。根据该示例性实施例，异质结双极晶体管的基极还包括基极掺杂剂的扩散抑制剂的浓度，其中扩散抑制剂的浓度在第三深度和第四深度之间减小以抵消带的变化在第一深度和第二深度之间的基底中的间隙。例如，扩散抑制剂可以是碳，碱性掺杂剂可以是硼。例如，扩散抑制剂的浓度可以在第三深度和第四深度之间减小，以抵消大致在第二深度处的带隙的变化。

6. 发明授权

US06680235B1 Method for fabricating a selective eptaxial HBT emitter 有权
标题翻译：制造选择性高能HBT发射体的方法
公开(公告)号：US06680235B1
公开(公告)日：2004-01-20
申请号：US10302308
申请日：2002-11-22
申请人： Greg D. U'Ren , Marco Racanelli , Klaus F. Schuegraf
发明人： Greg D. U'Ren , Marco Racanelli , Klaus F. Schuegraf
IPC分类号： H01L218222
CPC分类号： H01L29/66242 , H01L29/0817 , H01L29/7378
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises an epitaxial emitter selectively situated on the top surface of the base. For example, the epitaxial emitter may be N-type single-crystal silicon. The heterojunction bipolar transistor further comprises an etch stop layer situated on the top surface of the base, where the etch stop layer is in contact with the epitaxial emitter. The heterojunction bipolar transistor further comprises a first spacer and a second spacer situated on the etch stop layer, where the epitaxial emitter is situated between the first and second spacer. The first spacer and the second spacer, for example, may be LPCVD silicon nitride. The heterojunction bipolar transistor further comprises a dielectric layer deposited on the first and second spacers. The heterojunction bipolar transistor further comprises an antireflective coating layer deposited over the dielectric layer.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括具有顶表面的基极。异质结双极晶体管还包括选择性地位于基底的顶表面上的外延发射体。例如，外延发射极可以是N型单晶硅。异质结双极晶体管还包括位于基底顶表面上的蚀刻停止层，其中蚀刻停止层与外延发射体接触。异质结双极晶体管还包括位于蚀刻停止层上的第一间隔物和第二间隔物，其中外延发射体位于第一和第二间隔物之间。例如，第一间隔物和第二间隔物可以是LPCVD氮化硅。异质结双极晶体管还包括沉积在第一和第二间隔物上的电介质层。异质结双极晶体管还包括沉积在电介质层上的抗反射涂层。

7. 发明授权

US06617619B1 Structure for a selective epitaxial HBT emitter 有权
标题翻译：用于选择性外延HBT发射极的结构
公开(公告)号：US06617619B1
公开(公告)日：2003-09-09
申请号：US10067034
申请日：2002-02-04
申请人： Greg D. U'Ren , Marco Racanelli , Klaus F. Schuegraf
发明人： Greg D. U'Ren , Marco Racanelli , Klaus F. Schuegraf
IPC分类号： H01L310328
CPC分类号： H01L29/66242 , H01L29/0817 , H01L29/7378
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises an epitaxial emitter selectively situated on the top surface of the base. For example, the epitaxial emitter may be N-type single-crystal silicon. The heterojunction bipolar transistor further comprises an etch stop layer situated on the top surface of the base, where the etch stop layer is in contact with the epitaxial emitter. The heterojunction bipolar transistor further comprises a first spacer and a second spacer situated on the etch stop layer, where the epitaxial emitter is situated between the first and second spacer. The first spacer and the second spacer, for example, may be LPCVD silicon nitride. The heterojunction bipolar transistor further comprises a dielectric layer deposited on the first and second spacers. The heterojunction bipolar transistor further comprises an antireflective coating layer deposited over the dielectric layer.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括具有顶表面的基极。异质结双极晶体管还包括选择性地位于基底的顶表面上的外延发射体。例如，外延发射极可以是N型单晶硅。异质结双极晶体管还包括位于基底顶表面上的蚀刻停止层，其中蚀刻停止层与外延发射体接触。异质结双极晶体管还包括位于蚀刻停止层上的第一间隔物和第二间隔物，其中外延发射体位于第一和第二间隔物之间。例如，第一间隔物和第二间隔物可以是LPCVD氮化硅。异质结双极晶体管还包括沉积在第一和第二间隔物上的电介质层。异质结双极晶体管还包括沉积在电介质层上的抗反射涂层。

8. 发明授权

US06759674B2 Band gap compensated HBT 有权
标题翻译：带隙补偿HBT
公开(公告)号：US06759674B2
公开(公告)日：2004-07-06
申请号：US10066871
申请日：2002-02-04
申请人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
发明人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
IPC分类号： H01L2906
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/161 , H01L29/167 , H01L29/7378
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of a first material at a first depth, where the first material impedes the diffusion of a base dopant. The first material also causes a change in band gap at the first depth in the base. According to this exemplary embodiment, the base further includes a concentration of a second material, where the concentration of second material increases at the first depth so as to counteract the change in band gap.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括在第一深度处具有第一材料的浓度的基底，其中第一材料阻止基底掺杂剂的扩散。第一种材料还导致基底中第一深度处的带隙的变化。根据该示例性实施例，基底还包括第二材料的浓度，其中第二材料的浓度在第一深度增加以抵消带隙的变化。

9. 发明授权

US06639256B2 Structure for eliminating collector-base band gap discontinuity in an HBT 有权
标题翻译：用于消除HBT中的集电极 - 带隙不连续性的结构
公开(公告)号：US06639256B2
公开(公告)日：2003-10-28
申请号：US10066872
申请日：2002-02-04
申请人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
发明人： Greg D. U'Ren , Klaus F. Schuegraf , Marco Racanelli
IPC分类号： H01L310328
CPC分类号： H01L29/66242 , H01L29/1004 , H01L29/7378
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of germanium, where the concentration of germanium decreases between a first depth and a second depth in the base. According to this exemplary embodiment, the base of the heterojunction bipolar transistor further comprises a concentration of a diffusion suppressant of a base dopant, where the concentration of the diffusion suppressant decreases between a third depth and a fourth depth so as to counteract a change in band gap in the base between the first depth and the second depth. For example, the diffusion suppressant can be carbon and the base dopant can be boron. For example, the concentration of diffusion suppressant may decrease between the third depth and fourth depth so as to counteract the change in band gap at approximately the second depth.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括具有锗浓度的基底，其中锗的浓度在基底中的第一深度和第二深度之间降低。根据该示例性实施例，异质结双极晶体管的基极还包括基极掺杂剂的扩散抑制剂的浓度，其中扩散抑制剂的浓度在第三深度和第四深度之间减小以抵消带的变化在第一深度和第二深度之间的基座中的间隙。例如，扩散抑制剂可以是碳，碱性掺杂剂可以是硼。例如，扩散抑制剂的浓度可以在第三深度和第四深度之间减小，以抵消大致在第二深度处的带隙的变化。

10. 发明授权

US07498620B1 Integration of phosphorus emitter in an NPN device in a BiCMOS process 有权
标题翻译：在BiCMOS工艺中将磷发射体集成到NPN器件中
公开(公告)号：US07498620B1
公开(公告)日：2009-03-03
申请号：US11525457
申请日：2006-09-21
申请人： Greg D. U'Ren
发明人： Greg D. U'Ren
IPC分类号： H01L29/739
CPC分类号： H01L29/7378 , H01L21/8249 , H01L27/0623 , H01L29/0817 , H01L29/0821 , H01L29/66242
摘要： According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium heterojunction bipolar transistor, for example. The heterojunction bipolar transistor further includes a cap layer situated on the base, where the cap layer includes a barrier region. The barrier region can comprises carbon and has a thickness, where the thickness of the barrier region determines a depth of an emitter-junction of the heterojunction bipolar transistor. An increase in the thickness of the barrier region can cause a decrease in the depth of the emitter-base junction. According to this exemplary embodiment, the heterojunction bipolar transistor further includes an emitter situated over the cap layer, where the emitter comprises an emitter dopant, which can be phosphorus. A diffusion retardant in the barrier region of the cap layer impedes diffusion of the emitter dopant.
摘要翻译：根据一个示例性实施例，异质结双极晶体管包括位于衬底上的基极。例如，异质结双极晶体管可以是NPN硅 - 锗异质结双极晶体管。异质结双极晶体管还包括位于基底上的覆盖层，其中覆盖层包括阻挡区。阻挡区域可以包括碳并且具有厚度，其中阻挡区域的厚度确定异质结双极晶体管的发射极结的深度。阻挡区域的厚度的增加可能导致发射极 - 基极结的深度减小。根据该示例性实施例，异质结双极晶体管还包括位于覆盖层上方的发射极，其中发射极包括发射极掺杂剂，其可以是磷。盖层的阻挡区域中的扩散阻挡剂阻止发射体掺杂剂的扩散。

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