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    • 1. 发明申请
    • Data processing apparatus and method for handling address translation for access requests issued by processing circuitry
    • 用于处理由处理电路发出的访问请求的地址转换的数据处理装置和方法
    • US20090292899A1
    • 2009-11-26
    • US12153617
    • 2008-05-21
    • David Hennah MANSELLRichard Roy GRISENTHWAITE
    • David Hennah MANSELLRichard Roy GRISENTHWAITE
    • G06F12/10
    • G06F12/1009G06F12/1036
    • A data processing apparatus has address translation circuitry which is responsive to an access request specifying a virtual address, to perform a multi-stage address translation process to produce, via at least one intermediate address, a physical address in memory corresponding to the virtual address. The address translation circuitry references a storage unit, with each entry of the storage unit storing address translation information for one or more virtual addresses. Each entry has a field indicating whether the address translation information is consolidated address translation information or partial address translation information. If when processing an access request, it is determined that the relevant entry in the storage unit provides consolidated address translation information, the address translation circuitry produces a physical address directly from the consolidated address translation information. If on the other hand the relevant entry stores partial address translation information, the address translation circuitry produces an intermediate address from the partial address translation information and then performs the remainder of the multi-stage address translation process. Such an approach provides the performance benefits associated with a consolidated entry mechanism within the storage unit, whilst also allowing certain problem cases to be handled correctly and in an efficient manner.
    • 数据处理装置具有响应于指定虚拟地址的访问请求的地址转换电路,以执行多级地址转换处理,以通过至少一个中间地址产生与虚拟地址相对应的存储器中的物理地址。 地址转换电路参考存储单元,存储单元的每个条目存储一个或多个虚拟地址的地址转换信息。 每个条目具有指示地址转换信息是合并地址转换信息还是部分地址转换信息的字段。 如果当处理访问请求时,确定存储单元中的相关条目提供合并的地址转换信息,地址转换电路直接从合并地址转换信息产生物理地址。 如果相关条目存储部分地址转换信息,则地址转换电路从部分地址转换信息产生中间地址,然后执行多级地址转换处理的剩余部分。 这种方法提供了与存储单元内的综合进入机制相关联的性能优点,同时还允许以正确和有效的方式处理某些问题情况。
    • 2. 发明申请
    • CONTROLLING GENERATION OF DEBUG EXCEPTIONS
    • 控制调试异常的生成
    • US20120198278A1
    • 2012-08-02
    • US13296445
    • 2011-11-15
    • Michael John WILLIAMSRichard Roy GRISENTHWAITE
    • Michael John WILLIAMSRichard Roy GRISENTHWAITE
    • G06F11/273
    • G06F11/3656G06F9/4812
    • A data processing apparatus for performing data processing operations in response to execution of program instructions and debug circuitry for performing operations. The data processing apparatus includes a data store for storing a current debug exception mask value. The data processing circuitry is configured to set the mask value to a first value in the data store in response to executing critical code and on termination of execution of the critical code to reset the mask value to not store the first value. The data processing circuitry is configured, in response to receipt of a control signal indicating a debug exception is to be taken, to allow the exception to be taken if the mask value is not set to the first value and not to allow said exception to be taken if the mask value is set to the first value.
    • 一种用于响应于程序指令的执行和用于执行操作的调试电路执行数据处理操作的数据处理装置。 数据处理装置包括用于存储当前调试异常掩码值的数据存储器。 数据处理电路被配置为响应于执行关键代码并且终止关键代码的执行而将掩码值设置在数据存储器中的第一值以重置掩码值以不存储第一值。 数据处理电路被配置为响应于接收到指示调试异常的控制信号,以允许在掩码值未被设置为第一值而不允许所述异常为 如果掩码值被设置为第一个值则采取。